CN101297391B - 具有用于间距倍增的间隔物的掩膜图案及其形成方法 - Google Patents

具有用于间距倍增的间隔物的掩膜图案及其形成方法 Download PDF

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CN101297391B
CN101297391B CN2006800398455A CN200680039845A CN101297391B CN 101297391 B CN101297391 B CN 101297391B CN 2006800398455 A CN2006800398455 A CN 2006800398455A CN 200680039845 A CN200680039845 A CN 200680039845A CN 101297391 B CN101297391 B CN 101297391B
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古尔特杰·S·桑胡
柯克·D·普拉尔
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Abstract

在不执行间隔物蚀刻的情况下形成间距倍增工艺中的间隔物(175)。而在衬底(110)上形成心轴(145)，且接着使所述心轴(145)的侧面在例如氧化、氮化或硅化步骤中反应以形成可相对于所述心轴(145)的未反应部分选择性地移除的材料。选择性地移除所述未反应部分以留下独立式间隔物(175)的图案。所述独立式间隔物(175)可用作用于例如蚀刻所述衬底(110)的随后加工步骤的掩膜。

Description

具有用于间距倍增的间隔物的掩膜图案及其形成方法
相关申请案的交叉参考
本申请案涉及以下：2004年9月2日申请的颁发给阿巴切夫(Abatchev)等人的标题为“使用间距倍增的集成电路制造方法”(Method for Integrated Circuit FabricationUsing Pitch Multiplication)的第10/934,778号美国专利申请案；和2005年3月15日申请的颁发给阮(Tran)等人的标题为“相对于光刻特征的间距减小的图案”(Pitch ReducedPatterns Relative To Photolithography Features)的第60/662,323号美国专利临时申请案。
技术领域
本发明大体上涉及集成电路制造，且更确切地说涉及掩膜技术。
背景技术
由于许多因素，包括对增加的便携性、计算能力、存储器容量及能效的需求，因此不断将集成电路制造得更加密集。不断减小形成集成电路的组成特征(例如，电装置及互连线)的大小以促进此缩放。
减小的特征大小的趋势(例如)在例如动态随机存取存储器(DRAM)、快闪存储器、静态随机存取存储器(SRAM)、铁电(FE)存储器等的存储器电路或装置中是显而易见的。这些存储器装置通常包含数百万个称为存储器单元的相同电路元件。例如常规DRAM中的基于电容器的存储器单元通常由两个电装置组成：存储电容器及存取场效应晶体管。每一存储器单元是可存储一个位(二进制数字)的数据的可寻址位置。位可通过晶体管写入到单元且可通过感测电容器中的电荷来读取。一些存储器技术使用可既充当存储装置由充当切换器的元件(例如，使用经银掺杂的硫属化物玻璃的树枝状存储器)，而一些非易失性存储器并不是对每一单元均需要切换器(例如磁电阻RAM)。通常，通过减小构成存储器单元的电装置的大小及存取存储器单元的导线的大小可使存储器装置变得更小。另外，可通过在存储器装置中的给定面积上装配更多存储器单元来增加存储容量。
特征大小的不断减小对用于形成所述特征的技术提出甚至更高的要求。举例而言，通常用光刻来使例如导线的特征图案化。当图案包括如阵列中的重复特征时，间距的概念可用于描述这些特征的大小。间距定义为两个相邻特征的相同点之间的距离。这些特征通常由相邻特征之间的间隔界定，所述间隔一般由例如绝缘体的材料填充。因此，间距可视为特征的宽度与位于所述特征的一侧将所述特征与相邻特征隔开的间隔的宽度的总和。然而，由于例如光学及光或辐射波长的因素，光刻技术每一者均具有最小间距，低于所述最小间距，特定光刻技术无法可靠地形成特征。因此，光刻技术的最小间距是继续减小特征大小的障碍。
“间距加倍”或“间距倍增”是一种使光刻技术的能力扩展超出其最小间距的方法。在图1A-1F中说明且在颁发给劳瑞(Lowrey)等人的第5,328,810号美国专利中描述了间距倍增方法，所述专利的全部揭示内容以引用的方式并入本文中。参看图1A，线10的图案是在光致抗蚀剂层中经光刻形成，所述光致抗蚀剂层级于消耗性材料层20上，所述消耗性材料层又位于衬底30上。如图1B所示，接着使用蚀刻(优选各向异性蚀刻)将所述图案转移到层20，从而形成占位符或心轴40。如图1C所示，可剥离光致抗蚀剂线10且各向同性地蚀刻心轴40以增加相邻心轴40之间的距离。如图1D所示，随后将间隔物材料层50沉积于心轴40上。接着在心轴40的侧面形成间隔物60，意即，从另一材料的侧壁延伸或起初形成为从此处延伸的材料。如图1E所示，通过执行间隔物蚀刻(意即，通过优先地、定向地从水平表面70与80蚀刻间隔物材料)来完成间隔物的形成。如图1F所示，接着移除剩余心轴40，仅留下间隔物60，其一起充当用于图案化的掩膜。因此，在给定间距原先包括界定一个特征及一个间隔的图案的情况下，现在相同的宽度包括两个特征及两个间隔，其中所述间隔由(例如)间隔物60界定。因此，有效地降低光刻技术可能实现的最小特征大小。
虽然在以上实例中间距实际上是减半的，但常规上将间距的这种减小称为间距的“加倍”，或更通常称为间距“倍增”。因此，常规上因某一因素而引起的间距“倍增”实际上涉及通过所述因素减小间距。本文保留所述常规术语。
应了解，蚀刻工艺可以不同速率移除表面的不同部分。举例而言，由于局部温度差异可引起局部蚀刻速率的差异，因此心轴40的修整蚀刻可能会横跨衬底而以不同速率蚀刻心轴40的侧壁。这些非均匀性接着可转移到形成于侧壁上的间隔物60，且最终导致使用间隔物60在衬底30中图案化的特征的非均匀性。
此外，用于形成心轴40的材料通常应与各工艺步骤相容，例如，所述材料一般为可利用合适的选择性各向同性蚀刻(执行修整蚀刻)的材料及可利用合适的选择性各向异性蚀刻以形成各种图案及用于图案转移步骤(例如，用于从上覆光致抗蚀剂转移图案)的材料。而心轴40的材料可限制稍后沉积的材料(例如，间隔物材料)的选择，因为稍后沉积的材料的沉积条件通常不应对心轴40产生负面影响。除相容蚀刻及沉积材料的其它要求外，各向同性蚀刻的要求会限制用于间距倍增的材料的选择，从而限制加工范围。
因此，存在对扩展间距倍增的能力的方法的需求。
发明内容
根据本发明的一个方面，提供一种半导体加工方法。所述方法包含在衬底上提供临时特征。所述临时特征包含第一材料。所述第一材料与化学物质反应以形成包含所述第一材料与所述化学物质之间的反应的产物的掩膜特征。随后选择性地移除未反应的第一材料。
根据本发明的另一方面，提供一种半导体加工方法。所述方法包含横跨衬底上的一个区域形成多个由临时材料形成的临时占位符。临时占位符由间隔隔开。使一些临时材料转化为另一材料以形成多个间隔物。所述另一材料形成多个掩膜特征。选择性地移除未转化的临时材料。穿过由所述多个间隔物界定的掩膜图案加工所述衬底。
根据本发明的另一方面，提供一种形成在集成电路中形成重复特征的阵列的方法。所述方法包含在衬底上的光致抗蚀剂层中用光刻界定多个光致抗蚀剂特征以形成图案。光致抗蚀剂特征每一者具有用光刻界定的宽度。将所述图案转移到所述光致抗蚀剂层下的心轴材料层以在所述衬底上的某一层级上形成多个心轴。所述心轴每一者具有大体上等于所述光致抗蚀剂特征的宽度的宽度。转移所述图案后，在不蚀刻心轴的情况下，在所述心轴的层级上形成多个间隔物。间隔物之间的距离小于所述心轴的宽度。将由所述间隔物界定的图案转移到衬底以形成重复特征的阵列。
根据本发明的另一方面，提供一种制造集成电路的方法。所述方法包含在所述集成电路的一个区域中提供心轴。在所述心轴上沉积材料层。所述材料层经各向同性蚀刻以在所述心轴的侧面留下暴露的间隔物。
根据本发明的另一方面，提供一种位于经部分制造的集成电路上的中间掩膜图案。所述掩膜图案包含多个隔开的心轴，所述心轴每一者具有位于其顶表面上的顶盖层。前间隔物材料层级于每一顶盖层上。所述部分制造的集成电路在每一心轴的侧面进一步包含间隔物。所述间隔物包含前间隔物材料与心轴材料的组合。前间隔物材料也在相邻间隔物之间延伸。
附图说明
通过具体实施方式和附图将更好地理解本发明，附图用以说明而不是限制本发明，且其中：
图1A-1F为根据现有技术间距加倍方法的一系列用于形成导线的掩膜图案的示意性横截面侧视图；
图2为根据本发明的优选实施例的经部分形成的集成电路的示意性横截面侧视图；
图3为根据本发明的优选实施例，在光致抗蚀剂层中形成特征后图2的经部分形成的集成电路的示意性横截面侧视图；
图4为根据本发明的优选实施例，穿过硬掩膜层蚀刻后，图3的经部分形成的集成电路的示意性横截面侧视图；
图5为根据本发明的优选实施例，将图案从硬掩膜层转移到心轴材料层以在临时层中形成心轴图案后，图4的经部分形成的集成电路的示意性横截面侧视图；
图6为根据本发明的优选实施例，在沉积前间隔物材料层后，图5的经部分形成的集成电路的示意性横截面侧视图；
图7为根据本发明的优选实施例，在使前间隔物材料层起反应以在心轴侧壁上形成间隔物后，图6的经部分形成的集成电路的示意性横截面侧视图；
图8为根据本发明的优选实施例，选择性移除未反应的前间隔物材料后，图7的经部分形成的集成电路的示意性横截面侧视图；
图9为根据本发明的优选实施例，移除硬掩膜层后图8的经部分形成的集成电路的示意性横截面侧视图；
图10为根据本发明的优选实施例，选择性移除未反应心轴材料后图9的经部分形成的集成电路的示意性横截面侧视图；
图11为根据本发明的优选实施例，将由间隔物形成的图案转移到间隔物下方的硬掩膜层后，图10的经部分形成的集成电路的示意性横截面侧视图；
图12为根据本发明的优选实施例，移除间隔物后图11的经部分形成的集成电路的示意性横截面侧视图；
图13为根据本发明的优选实施例，将掩膜层中的图案转移到下伏衬底后，图12的经部分形成的集成电路的示意性横截面侧视图；
图14为根据本发明的优选实施例，具有设置在间隔物与衬底之间的硬掩膜及额外掩膜层的经部分形成的集成电路的示意性横截面侧视图；
图15为根据本发明的优选实施例，将间隔物图案转移到额外掩膜层及下伏衬底后，图14的经部分形成的集成电路的示意性横截面侧视图；及
图16为根据本发明的一些优选实施例，在通过气相反应在心轴的侧面形成间隔物后，图5的经部分形成的集成电路的示意性横截面侧视图。
具体实施方式
在本发明的优选实施例中，在掩膜工艺中，通过与例如心轴的临时特征反应形成例如间隔物的掩膜特征。间隔物优选形成于心轴的侧面且无需修整蚀刻所述心轴。心轴优选与至少一种其它材料或化学物质反应以形成间隔物，所述间隔物包含为所述反应的产物的间隔物材料。优选在心轴的顶部水平表面上形成顶盖层(cap layer)以抑制所述表面上的反应。因此，反应优选发生在心轴的侧面且将侧壁心轴材料转化为间隔物材料。接着优选移除未反应的心轴材料以留下独立式间隔物图案。优选在无需间隔物蚀刻的情况下，意即，在不执行优先从水平表面移除间隔物材料的定向蚀刻的情况下，形成间隔物。移除心轴材料后，可在掩膜中使用独立式间隔物图案以随后加工下伏衬底。
可通过各种工艺来实现将心轴材料转化成间隔物材料，所述工艺包括(例如)氧化、氮化、硅化及聚合。举例而言，在心轴的侧面形成材料层(例如，通过在所述心轴上执行共形毯覆式沉积)且通过(例如)执行退火使所述心轴与所述材料层反应。在其它实施例中，可将心轴暴露于一种或一种以上气态反应物以形成间隔物材料，或可将心轴暴露于能量(例如，光)或其它试剂(例如，催化剂)以(例如)通过使心轴材料的暴露的侧壁聚合或交联来使所述暴露的心轴材料转化为另一材料。
有利地，因为通过使部分心轴转化为间隔物材料来形成间隔物，所以没必要修整所述心轴。由于间隔物形成为延伸进入心轴，且因此与如果间隔物形成于心轴的侧壁上的情况相比，可使间隔物与心轴靠得更近。形成间隔物反应的程度可影响间隔物的厚度与其之间的间隔。有利地，间隔物分离可类似于典型间距倍增工艺中执行心轴修整蚀刻后实现的分离。此外，因为修整蚀刻是不必要的，所以用于心轴的材料的选择并不局限于与所述修整蚀刻相容的材料。另外，可有利地避免间隔物蚀刻。应了解间隔物蚀刻可环绕间隔物的上边缘。因为所述环绕(例如)有效地降低间隔物的纵横比及/或促使在向间隔物下方的任一层施加蚀刻剂或其它材料的过程中蚀刻剂或其它材料不均匀分布，所以所述环绕可能是不合乎需要的。有利地，根据优选实施例形成的间隔物可具有更均匀的方形形状。此外，与在优选实施例中移除未反应的材料相比，间隔物蚀刻可更具侵袭性且可更高程度地腐蚀下伏材料。
现在将参看各图，其中相同数字始终指相同部分。应了解所述图不必按比例绘制。
最初，形成一个序列的材料层以允许在衬底上形成间隔物。
图2展示经部分形成的集成电路100的横截面侧视图。虽然优选实施例可用于形成任何集成电路，但其尤其有利地应用于形成具有电装置的重复图案或阵列的装置，所述电装置的重复图案或阵列包括例如DRAM、相变RAM、可编程导体(PCRAM)、ROM或快闪存储器(包括与非快闪存储器)的易失性及非易失性存储器装置的存储器单元阵列，或具有逻辑或门阵列的集成电路。举例而言，所述逻辑阵列可为具有类似于存储器阵列的磁心阵列及具有支持逻辑的外围设备的场可编程门阵列(FPGA)。因此，集成电路100可为(例如)可包括逻辑阵列与嵌入式存储器两者的存储器芯片或处理器，或为具有逻辑或门阵列的任何其它集成电路。
继续参看图2，优选在衬底110上提供各种掩膜层120-150。应了解，衬底160可为硅晶圆或为位于晶圆上的任何结构或材料层。举例而言，衬底100可包含绝缘膜。
如下所讨论，将蚀刻层120-150以形成用于使衬底110图案化的掩膜。优选在考虑用于本文所讨论的各图案形成及图案转移步骤的化学物质及工艺条件的基础上选择用于层120-150的材料。因为最上层可选择性界定层120与衬底110之间的层优选起作用以将源于可选择性界定层120的图案转移到衬底110，如下所述，可选择性界定层120与衬底110之间的层130-150优选经选择以使得其可在各个阶段相对于其它暴露材料选择性地蚀刻。应了解，当一种材料的蚀刻速率比周围材料大至少约5倍、优选大至少约10倍、更优选大至少约20倍且最优选大至少约40倍时，认为是选择性或优先蚀刻所述材料。因为位于衬底110上的层120-150的目标为允许在所述衬底110上形成明确界定的图案，因此应了解如果使用其它适当材料、化学物质及/或工艺条件，则可省略或取代层120-150中的一者或一者以上。举例而言，如果需要抗反射涂层的分辨率增强特性，则在一些实施例中，可在层120与130之间形成所述抗反射涂层。在下文进一步讨论的其它实施例中，可在层150与衬底110之间添加额外掩膜层以形成相对于衬底110具有经改进的蚀刻选择性的掩膜。视情况，如果有适当的蚀刻化学物质可用，可省略层150且可使用间隔物175(图10)作为掩膜以(例如)在无任何插入材料的情况下使衬底图案化。用于本文所讨论的各层的示范性材料包括氧化硅、氮化硅、硅、非晶碳、介电抗反射涂层(DARC、富含硅的氮氧化硅)及有机底部抗反射涂层(BARC)，视应用而定，所述材料中的每一者均可相对于至少2或3种其它材料选择性地蚀刻。
除选择用于各层的适当材料以外，优选根据与本文所述的蚀刻化学物质及工艺条件的相容性而选择层120-150的厚度。举例而言，当通过选择性地蚀刻下伏层将图案从上覆层转移到下伏层时，将两层的材料移除到一定程度。上层优选足够厚以使得其在图案转移过程中不会损耗。
可选择性界定层120优选位于硬掩膜层130上，如下文所讨论，所述硬掩膜层130优选可充当顶盖层以屏蔽心轴145(图5)使其免受反应剂损坏。层130位于心轴层140上，心轴层140位于第二硬掩膜或蚀刻停止层150上，层150位于待穿过掩膜而加工(例如，蚀刻)的衬底110上。可选择性界定层120优选是光可界定的，例如由光致抗蚀剂形成，包括此项技术已知的任何光致抗蚀剂。举例而言，所述光致抗蚀剂可为任何与157nm、193nm、248nm或365nm波长系统、193nm波长浸没系统、远紫外线系统(包括13.7nm波长系统)或电子束光刻系统相容的光致抗蚀剂。另外，可使用无掩膜光刻来界定可选择性界定层120。优选光阻材料的实例包括氟化氩(ArF)敏感光致抗蚀剂，意即，适合与ArF光源一起使用的光致抗蚀剂；及氟化氪(KrF)敏感光致抗蚀剂，意即，适合与KrF光源一起使用的光致抗蚀剂。ArF光致抗蚀剂优选与利用相对短波长的光(例如，193nm)的光刻系统一起使用。KrF光阻材料优选与较长波长的光刻系统(例如248nm系统)一起使用。在其它实施例中，层120及任何随后的光致抗蚀剂层可由可经纳米压印光刻图案化的光致抗蚀剂形成，例如，通过使用模具或机械力以使所述光致抗蚀剂图案化。
用于硬掩膜层130的材料优选包含无机材料。示范性材料包括(不限于)氧化硅及氮化硅。在所说明的实施例中，硬掩膜层130包含氮化硅。心轴层140优选由可转化为间隔物材料的材料形成，所述间隔物材料又提供相对于未反应的心轴材料、硬掩膜层130及间隔物材料下方的材料而言良好的蚀刻选择性。在所说明的实施例中，心轴材料为硅。
优选基于用于间隔物175(图11)及用于下伏衬底110的材料选择用于第二硬掩膜层150的材料。在层150用作蚀刻衬底110的掩膜的情况下，层150优选由能耐受待穿过所述掩膜进行的衬底110的所需加工(例如，蚀刻、掺杂、氧化等等)且可相对于间隔物175(图11)选择性地蚀刻的材料形成。举例而言，第二硬掩膜层150可为氮化物，例如氮化硅，或可为氧化物，例如氧化硅。在所说明的实施例中，第二硬掩膜层150包含氧化硅。
本文所讨论的各层可由此项技术已知的各种方法形成。举例而言，旋涂式涂布工艺可用于形成光可界定的层、BARC及旋涂式介电氧化层。例如溅镀、化学气相沉积(CVD)及/或原子层沉积(ALD)的各种气相沉积工艺可用于形成各种硬掩膜层、顶盖层和心轴层。另外，可使一些层(例如层140)反应以形成其它层。举例而言，硅层140的顶表面可使用氮前驱物氮化以形成氮化硅层，而非使用硅及氮前驱物沉积氮化硅层，所述氮化硅层可用作随后产生的心轴用的硬掩膜层或顶盖层(如鉴于以下讨论此将更好地理解)。
已形成所需层的堆叠，接下来形成间隔物图案。
参看图3，在光可界定层120中形成包含间隔或沟槽122的图案，其由光可界定的材料形成的特征124定界。沟槽122可由(例如)使用248nm或193nm光的光刻形成，其中将层120穿过主光罩而暴露在辐射下并接着显影。显影后，剩余光界定材料形成例如图示的线124(仅在横截面中展示)的掩膜特征。有利地，可形成具有约120nm或更小、或约80nm或更小的宽度的线124以形成具有约100nm或更小的间距的间隔物。
参看图4，将光致抗蚀剂特征124及沟槽122的图案转移到硬掩膜层130。虽然如果硬掩膜层130足够薄以使得其可在不会不当地加宽转移图案中的间隔的情况下被蚀刻穿过，则湿式(各向同性)蚀刻也可为合适的，但此转移优选使用例如使用含CF4、CF4/H2、CF4/O2、SF6或NF3的等离子的蚀刻的各向异性蚀刻完成。
参看图5，将光可界定层120及硬掩膜层130中的图案转移到心轴层140以形成心轴或临时占位符145。所述转移优选使用各向异性蚀刻使用(例如)含HBr/HCl或CHCl3/Cl2的等离子完成。心轴145的宽度优选大体上与线124的宽度相似，例如心轴145优选具有约120nm或更小、或约80nm或更小的宽度。
参看图6，在心轴145的侧壁上沉积前间隔物材料，意即，将经反应以形成间隔物的材料。优选将前间隔物材料作为层170毯覆式沉积于心轴145上。在所说明的实施例中，形成层170的前间隔物材料为钛。所述沉积可由此项技术已知的各种方法(包括例如，CVD及ALD)完成。如下文所讨论，优选选择层170的厚度以提供足够的材料以便在使前间隔物材料170与心轴145反应后形成具有所需宽度的间隔物175(图7)。
参看图7，接着使钛前间隔物层170与心轴145相互反应以形成间隔物175，在所说明的实施例中，所述间隔物175由硅化钛组成。应了解，心轴145优选具备顶盖层以使反应集中在心轴145的侧壁上。在所说明的实施例中，硬掩膜层130优选充当顶盖层以通过防止钛前间隔物层170与心轴145的顶表面之间接触来防止心轴145的上部发生反应。在其它实施例中，无论是否存在硬掩膜层130，均可(例如)通过使心轴145的上部沉积或反应来单独形成顶盖层。
优选使层170及心轴145经受高温(例如，退火)以引起自对准硅化反应。举例而言，可在约550-800℃、更优选约650-680℃的温度下使经部分制造的集成电路100经受约5-90秒、更优选约20-60秒的快速热处理(RTP)。
应了解，在与心轴145的硅反应的层170中的反应程度及钛量与退火的温度及持续时间有关。因此，有利地，可根据间隔物175的期望宽度及/或分离距离而选择例如退火温度及持续时间的反应条件。举例而言，可使心轴145与层170反应，直到分离距离为约80nm或更小、或优选约50nm或更小。
在其它实施例中，钛层170在心轴145的侧壁上的部分优选完全反应。有利地，因为层170的厚度一般限制在所述反应形成的间隔物175的最大宽度上，所以使这些部分完全反应允许用于退火的更大的工艺窗口(process window)且良好控制间隔物175的宽度。举例而言，因为层170的材料的量(例如，宽度)通常限制间隔物175的生长，尤其在层170的方向上的生长，所以可通过使层170沉积到既定宽度，而使退火的持续时间及/或温度超出形成所述宽度的间隔物175所需的持续时间及/或温度。
参看图8，选择性地移除层170中未反应的钛以将间隔物175留在心轴145的侧面处。所述移除可通过湿式或干式蚀刻完成。湿式蚀刻可具有降低的成本及对间隔物175的结构更低损坏的优点。适当蚀刻的实例为包括H2O、H2O2及NH4OH的湿式蚀刻。间隔物175优选是亚光刻的，意即，其具有在用于形成所述间隔物图案的光刻技术的分辨率限度以下的临界尺寸(例如，宽度)，在此情况下，所述光刻技术用于图案化层120。
参看图9，相对于间隔物175选择性地移除氮化硅顶盖层130。此移除可使用干式蚀刻或湿式蚀刻完成，例如使用热磷酸完成。
接着，如图10中所示，选择性地移除未反应的心轴材料以形成独立式间隔物175的图案。可使用干式或湿式蚀刻进行此移除。示范性湿式蚀刻包含HF、HNO3及H2O。在间隔物175的下方可提供硬掩膜层150以保护衬底110且允许移除未反应的心轴材料而不会无意中移除衬底110中的材料。因此，可有利地形成间距约为最初经由光刻形成的光致抗蚀剂线124与间隔122(图3)的间距的一半的间隔物175。当光致抗蚀剂线124具有约200nm的间距时，可形成具有约100nm或更小的间距的间隔物175。
应了解，因为间隔物175形成于心轴145的侧壁中，因此间隔物175通常遵循心轴145的轮廓，且因此通常形成闭合环。应了解，在使用间距倍增的图案来形成例如导线的特征的情况下，可使用额外加工步骤来切断或以其它方式阻止图案转移到这些环的末端处，以使得每一环形成两个个别的、非连接的线。举例而言，此可通过(例如)将保护材料层沉积在所述环上、图案化所述保护层以在待维持的线部分周围形成保护掩膜、且接着蚀刻掉环的未受保护部分(例如末端)来完成。2004年8月31日申请的颁发给阮(Tran)等人的第10/931,771号美国专利申请案中揭示了用于切断环的末端的适当方法，所述专利的全部揭示内容以引用的方式并入本文中。
参看图11，除了在移除间隔物期间保护衬底110外，在要将间隔物175的图案转移到衬底110的情况下，硬掩膜层150优选允许相对于衬底110的经改进的蚀刻选择性。如以上所讨论，在所说明的实施例中，硬掩膜层150是由氧化硅形成。优选使用各向异性蚀刻(例如含CHF3、CF4或C2F6等离子的蚀刻)将间隔物175的图案转移到层150。如果硬掩膜层150足够薄，则应了解也可用湿式蚀刻来以最小底切(undercutting)完成图案转移。
接下来，可使用硬掩膜层150使下伏衬底110图案化。
应了解，可在蚀刻衬底110之前或之后移除间隔物175。在硬掩膜层150的材料相对于衬底110的材料提供良好的蚀刻选择性的情况下，例如在间隔物175不需补充硬掩膜层150的情况下，优选可在将图案转移到衬底110之前移除间隔物175。间隔物的移除可使用(例如)稀释HF湿式蚀刻完成。移除间隔物有利地降低间隔的纵横比，且使间隔物175的倒塌或变形引起图案变化的可能性降到最小(尤其在间隔物175极高及/或极窄的情况下)，其中所述间隔是穿过其进行加工的间隔，例如，蚀刻剂须穿过所述间隔到达衬底110。因此，如图11所示，可移除间隔物175以促进衬底的蚀刻。
参看图13，可使用(例如)对衬底110的材料具有选择性的蚀刻或蚀刻组合来将硬掩膜层150中的图案转移到衬底110。除穿过掩膜蚀刻衬底外，在其它实施例中，也可能穿过层150中的掩膜进行其它类型的加工。其它加工的非限定性实例包括植入、扩散掺杂、剥离图案化沉积、氧化、氮化等。
参看图14，在其它实施例中，尤其其中衬底110难以蚀刻或其中需要穿过掩膜的长期的加工时，可在间隔物175与衬底110之间形成一个或一个以上额外掩膜材料插入层。举例而言，如阮(Tran)等人在2005年3月15日申请的标题为“相对于光刻特征的间距减小的图案”(Pitch Reduced Patterns Relative To Photolithography Features)的共同待决的第60/662,323号美国专利临时申请案，代理人案号第MICRON.316PR(微米参考号2004-1130.00/US)号中所讨论的，可提供额外层160，所述申请案的全部揭示内容以引用的方式并入本文中。
继续参看图14，层150优选包含相对于间隔物175、层160及心轴145(图9)具有良好的蚀刻选择性的材料。层160优选由非晶碳形成，其有利地能耐受许多用于移除衬底110中的硅材料的蚀刻化学物质。
参看图15，可将由间隔物175界定的图案转移到层160，所述层160接着用作用于使衬底110图案化的主掩膜160。有利地，在其它实施例中，由于当蚀刻非晶碳时极限选择性的可用性，可在移除间隔物175之后使用经图案化的硬掩膜层150以将图案从层150转移到层160，以使得用于将图案转移到主掩膜层160的掩膜具有更低且更均匀的纵横比的特征。在其它实施例中，硬掩膜层150本身可与合适的其它材料结合而由非晶碳形成。
在其它实施例中，衬底110与间隔物175之间可不存在插入层，例如无硬掩膜层150。在此种情况下，尤其当间隔物材料相对于衬底具有良好的蚀刻选择性时，在无任何插入硬掩膜层的情况下，可穿过间隔物175的图案加工衬底110。
应了解，根据优选实施例形成间隔物会提供大量优点。举例而言，心轴修整蚀刻是不必要的且可消除可能由此修整蚀刻引起的间隔物不均匀性。事实上，前间隔物层170的沉积及形成间隔物反应(例如，退火)的程度决定间隔物的宽度及间隔物的间隔两者。此外，因为不执行修整蚀刻，由于不再要求与修整蚀刻相容，所以可扩大可用于形成心轴的材料的范围。因此，可提高加工灵活性。另外，定向间隔物蚀刻是不必要的，从而允许与形成具有对称形状的肩状物的间隔物175及将对下伏层的损坏减到最小有关的优点。
虽然在优选实施例中间隔物蚀刻有利地是不必要的，但是在一些布置中，在使前间隔物材料与心轴材料反应之前，可在前间隔物材料层170上执行间隔物蚀刻以在心轴的侧面形成由前间隔物材料形成的间隔物特征。这些间隔物特征接着可与心轴材料反应以形成间隔物175，其可相对于心轴材料及下伏材料选择性地蚀刻。
也应了解，虽然在所说明的实施例中参考特定加工步骤及材料加以讨论，但可进行多种修改。举例而言，除硅化钛以外，多种硅化物可用于形成间隔物。形成金属硅化物的其它金属的实例包括钽、铪及镍。在以上实例中，这些金属可沉积在心轴上且经退火以形成金属硅化物。在其它布置中，材料的组合可为相反的。举例而言，心轴145可为金属的且硅层沉积在心轴上以形成金属硅化物。另外，心轴145可包含非晶碳且层170可包含与非晶碳反应的各种其它材料。举例而言，层170可包含硅以形成碳化硅间隔物175，或层170可包含金属以形成金属碳化物。
参看图16，应了解虽然将间隔物175的形成说明为沉积的金属层与心轴反应的固态反应，但间隔物175可由除固态反应物间的反应以外的各种工艺形成。在一些实施例中，心轴145可与气态反应物反应以形成间隔物，包括非硅化物的间隔物。举例而言，硅心轴145的硅化可通过使心轴145暴露在气态金属反应物(例如，TiCl4、WF6等等)中完成，或金属心轴145的气相硅化可通过使心轴145暴露在气态硅反应物(例如，SiH4)中完成。另外，氧化硅间隔物可通过使硅心轴暴露在氧化剂中形成，或在顶盖层为非氮化硅的适当材料的情况下，可通过使硅心轴暴露在反应性氮物质中形成氮化硅。在其它实施例中，心轴145可为碳物质，例如非晶碳、光致抗蚀剂或碳掺杂材料(例如，如第6,515,355号美国专利中揭示的，所述专利的全部揭示内容以引用的方式并入本文)，其可转化为聚合物或经交联形成间隔物175。转化可通过暴露于能量(例如，光)或其它试剂(例如，催化剂)中引起。间隔物175形成后，可如以上关于图9-15所讨论的加工经部分制造的集成电路100。
另外，虽然以上为便于说明及描述而讨论了两种材料，但应了解可使两种以上材料反应以形成所需间隔物材料，例如，与气相反应物反应形成的SiOxNy。这些额外材料可通过以下方式来反应：例如，形成相互重叠的前间隔物材料的沉积多层，接着执行退火来反应；及/或沉积单个前间隔物材料层、执行退火以使所述层与心轴材料反应，接着沉积前间隔物材料的一个或一个以上额外层，接着执行退火。在其它实施例中，可以气态反应物形式引入额外材料以作为前间隔物材料的沉积层的替代或补充。
此外，虽然心轴的形成中优选不执行修整蚀刻，但如果需要的话可执行修整蚀刻。举例而言，显影之后可使光致抗蚀剂层经受修整蚀刻，及/或可使心轴经受修整蚀刻。此修整蚀刻可用于形成异常靠近在一起的间隔物。
另外，形成心轴后可形成顶盖层。举例而言，(例如)在类似于离子植入的工艺中，心轴上部可与定向施加的反应物反应以形成顶盖层。
此外，在心轴无顶盖层的情况下形成间隔物。举例而言，金属层可共形沉积在心轴上且心轴的上部及侧面均可反应。例如，接着可通过以下方式移除经过反应的上部：定向干式蚀刻或通过用填充物金属填充心轴之间的空白间隔、执行化学机械抛光以移除上部，接着移除填充物金属。
与间隔物一样，也应了解其它材料可用于本文所讨论的各种其它层及部分。如以上所讨论，可使用的任何其它材料优选提供相对于在选择性蚀刻步骤期间暴露的材料的适当的蚀刻选择性。此外，衬底110可包括不同材料，例如不同材料层或衬底的不同横向区域中的不同材料。为将由间隔物界定的图案转移到此衬底，如果单个化学物质不足以蚀刻所有不同材料，则可使用一系列不同化学物质(优选干式蚀刻化学物质)来连续蚀刻穿过这些不同材料。
也应了解，视所使用的化学物质而定，可蚀刻上覆的间隔物及硬掩膜层。在一些情况下，为获得优良的蚀刻选择性，优选使用额外掩膜层160(图14)。对于主掩膜层160使用非晶碳有利地提供对常规蚀刻化学物质、尤其是用于蚀刻含硅材料的蚀刻化学物质的优良的耐受性。因此，主掩膜层160可作为掩膜有效地用于蚀刻穿过多个衬底层或用于形成高纵横比的沟槽。
又，本文所讨论的掩膜可用于形成各种集成电路特征，包括(不限于)导电性互连线、连接垫及各种电装置的部件，例如电容器及晶体管，尤其用于存储器与逻辑阵列或平板显示器(其中需密集重复图案)的电容器及晶体管。同样地，虽然为便于说明而以规则间隔及规则宽度的线来说明，但掩膜可具有带可变间隔的特征。又，虽然以在单个层级上形成间隔物来说明，但在其它实施例中间隔物可形成于多个垂直层级上且在单个层级上合并以形成掩膜图案。
另外，光致抗蚀剂层120中形成的图案的间距可增加一倍以上。举例而言，通过使用间隔物175作为常规间距倍增工艺的心轴可使图案的间距进一步倍增，所述工艺中在间隔物175周围形成额外间隔物，接着移除间隔物175，接着在先前在间隔物175周围形成的间隔物周围形成间隔物等。
也可在整个集成电路制造工艺中多次使用优选实施例以在多个垂直层级中形成特征，所述层级可是垂直邻接或非邻接及垂直分离的。在此种情况下，每一待图案化的个别层级将构成衬底110。另外，一些优选实施例可与其它优选实施例组合或与此项技术已知的其它掩膜方法组合以在同一衬底110的不同区上或在不同垂直层级上形成特征。
因此，所属领域的技术人员应了解，在不偏离本发明的范围的情况下，可对上述方法及结构进行这些及多种其它省略、添加及修改。希望所有此种修改及变化均属于本发明的范围内，本发明的范围由随附权利要求书界定。

Claims (26)

1.一种半导体加工方法，其包括：
横跨衬底上的区域形成多个由临时材料形成的临时占位符，所述临时占位符由间隔分离；
形成上覆在所述临时占位符中每一者的顶表面上的顶盖层；
将一些所述临时材料转化成另一材料以形成多个间隔物，所述另一材料形成多个掩膜特征，所述顶盖层抑制所述顶表面上的反应；
其后选择性地移除所述顶盖层；
选择性地移除未转化的临时材料；以及
穿过由所述多个间隔物界定的掩膜图案来加工所述衬底。
2.根据权利要求1所述的方法，其中转化一些所述临时材料包括选择性地使所述临时占位符的侧壁与化学物质反应。
3.根据权利要求2所述的方法，其中选择性地使所述临时占位符的侧壁反应包括执行退火，其中选择反应条件包括基于所述掩膜特征的所需临界尺寸来选择所述退火的温度和持续时间。
4.根据权利要求2所述的方法，其中选择性地使所述临时占位符的侧壁反应包括通过在所述临时占位符上毯覆式沉积包括固相反应物的层而使所述侧壁与所述固相反应物发生反应。
5.根据权利要求4所述的方法，其中转化一些所述临时材料包括使所述层的包括所述固相反应物的部分与所述临时材料反应，且进一步包括优先移除所述层的未反应的剩余部分。
6.根据权利要求4所述的方法，其中所述固相反应物包括金属，且所述另一材料包括金属硅化物。
7.根据权利要求6所述的方法，其中从由钛、钽、铪和镍组成的群组中选出所述金属。
8.根据权利要求2所述的方法，其中选择性地使所述临时占位符的侧壁反应包括将所述侧壁暴露于气相反应物。
9.根据权利要求1所述的方法，其中形成所述多个临时占位符包括：
在衬底上的可选择性界定的层中界定图案；以及
将所述图案从所述可选择性界定的层转移到由所述临时材料形成的下伏层。
10.根据权利要求9所述的方法，其中界定所述图案包括执行光刻。
11.根据权利要求1所述的方法，其中选择性移除未转化的临时材料包括执行湿式蚀刻。
12.根据权利要求1所述的方法，其中所述临时材料包括硅。
13.根据权利要求1所述的方法，其中所述另一材料包括聚合物。
14.一种制造集成电路的方法，其包括：
在所述集成电路的区域中提供心轴；
在所述心轴上沉积材料层；
所述材料层与所述心轴反应；
各向同性蚀刻所述材料层以在所述心轴的侧面留下暴露的间隔物；
将所述间隔物形成的间隔物图案转移到下伏的硬掩膜层；以及
将所述间隔物图案从所述硬掩膜层转移到衬底。
15.根据权利要求14所述的方法，其中所述材料层包括前间隔物材料，其进一步包括在各向同性蚀刻之前使所述前间隔物材料与所述心轴反应，其中使所述前间隔物材料与所述心轴反应形成能耐受用于各向同性蚀刻的蚀刻的间隔物材料。
16.根据权利要求15所述的方法，其中所述前间隔物材料是钛且所述间隔物材料是硅化钛。
17.根据权利要求14所述的方法，其进一步包括相对于所述间隔物优先移除所述心轴。
18.根据权利要求14所述的方法，其中所述间隔物是亚光刻特征。
19.根据权利要求14所述的方法，其进一步包括：
在所述间隔物的侧面上沉积额外间隔物材料层；
各向异性蚀刻所述额外间隔物材料层以在所述间隔物的侧壁上形成额外的间隔物；以及
选择性地移除所述额外间隔物之间的间隔物，以便留下独立式额外间隔物的图案。
20.一种上覆在经部分制造的集成电路上的中间掩膜图案，其包括：
多个由心轴材料形成的隔开的心轴；
上覆在所述心轴中每一者的顶表面的顶盖层；
上覆在每一顶盖层上的前间隔物材料层；以及
位于所述心轴中每一者的侧面的间隔物，其中所述间隔物包括所述前间隔物材料与所述心轴材料的反应产物，其中所述前间隔物材料在相邻间隔物之间延伸。
21.根据权利要求20所述的中间掩膜图案，其中所述顶盖层包括氧化硅或氮化硅。
22.根据权利要求20所述的中间掩膜图案，其中所述心轴包括硅。
23.根据权利要求20所述的中间掩膜图案，其中所述间隔物包括金属硅化物。
24.根据权利要求20所述的中间掩膜图案，其中所述间隔物是亚光刻特征。
25.根据权利要求20所述的中间掩膜图案，其中所述顶表面的宽度小于80nm。
26.根据权利要求25所述的中间掩膜图案，其中所述间隔物分离开小于50nm。
CN2006800398455A 2005-09-01 2006-08-28 具有用于间距倍增的间隔物的掩膜图案及其形成方法 Active CN101297391B (zh)

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WO2007027686A2 (en) 2007-03-08
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US9099314B2 (en) 2015-08-04
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