CN101329915B - Method for programming storing device - Google Patents

Abstract

Provided is a method of programming a memory device. The method includes performing a program voltage applying operation; and performing a verifying operation, wherein a plurality of verifying operations are consecutively performed after a program voltage applying operation.

Description

The method that memory storage is programmed

The application requires to be submitted to the 10-2007-0060052 korean patent application of Korea S Department of Intellectual Property and to be submitted to the right of priority of the 10-2008-0045520 korean patent application of Korea S Department of Intellectual Property on May 16th, 2008 on June 19th, 2007, and the open of this application is all contained in this by reference.

Technical field

Exemplary embodiment relates to a kind of to the programme method of (program) of flash memory devices, for example, relate to a kind of method that flash memory devices is programmed that more effectively reduces threshold voltage shift (dispersion) under programming state.

Background technology

Floating boom formula flash memory is often used as large capacity nonvolatile memory.In order to operate, floating boom formula flash memory stored charge in the floating boom being formed by polysilicon.

The storage unit of floating boom formula flash memory (for example can be divided into the single layer cell (SLC) of record " 1 " and " 0 " two kinds of recording status and record four kinds or more kinds of recording status, " 11 ", " 10 ", " 01 " and " 00 ") multilevel-cell (MLC).

MLC technology is used to manufacture jumbo NAND and NOR formula flash memory.

In MLC operation, the skew of the threshold voltage vt h of the unit corresponding with recording status must be relative low with difference identification record state respectively.

Flash memory devices can be used even increase program voltage V _pgmand repeat to apply increase program voltage increase progressively step pulse programming (Incremental Step Pulse Programming, ISPP) method, the threshold voltage reducing between unit distributes.

As everyone knows, in ISPP method,, in amplitude, increase gradually Δ V _pgmsituation under, program voltage pulse is applied in.Repeat to apply calibration voltage pulse with the process of the threshold voltage of verification storage unit, so that the threshold voltage of storage unit reaches expectation or predetermined value.A plurality of storage unit that form flash memory can have initial threshold voltage skew.Therefore, consider the initial threshold voltage skew of storage unit, proposed ISPP method so that a plurality of storage unit reaches expectation or predetermined threshold voltage.

For example, yet the coupling between unit (, the coupling between floating boom) increases along with the reducing of size of the unit of the flash memory of use floating boom.Therefore, the skew of control threshold voltage is more difficult.

In order to reduce the coupling between unit, developed charge-trapping flash (CTF) storer, CTF storer uses the insulation course of catching electric charge (for example, to be constructed to the Si of stored charge ₃n ₄layer) replace floating boom.

Yet, using insulation course to catch in the CTF storer of electric charge, after carrying out programming, the charge migration of catching in electric charge capture layer.Therefore, after carrying out programming, threshold voltage value time to time change.

If use ISPP method to carry out programming, threshold voltage value makes the control of skew of threshold voltage value more difficult over time.

As mentioned above, if threshold value temporal evolution, expectation or predetermined time in the past after, in the operation of carrying out programming and verification programming state, make a mistake.

The skew of the threshold voltage value of the programming state in ISPP method is because check errors increases.

For example, if threshold voltage temporal evolution,, after more past time, threshold voltage can reach desired value.Yet even in this case, check results is that the mistake that storage unit does not also reach target threshold voltage also may occur.If storage unit is verified as, also do not reach target threshold voltage, increased Δ V _pgmprogram voltage be applied in that storage unit is programmed.Therefore the programming (over program) of crossing that, threshold voltage increases occurs.Therefore, the skew of programming state threshold voltages increases.

Summary of the invention

Exemplary embodiment provides a kind of method that memory storage is programmed, and described method comprises: carry out program voltage and apply operation; Carry out verification operation, wherein, after program voltage applies operation, carry out continuously repeatedly verification operation.

According to exemplary embodiment, in the situation that little by little increase the amplitude of program voltage, can repeat and comprise that primary voltage applies operation and the repeatedly a pair of operation of verification operation, until storage unit reaches the threshold voltage of setting.

According to exemplary embodiment, the amplitude of the calibration voltage using while carrying out continuously repeatedly verification operation can be identical.

According to exemplary embodiment, the amplitude of the calibration voltage using while carrying out continuously repeatedly verification operation reduces serially.

According to exemplary embodiment, calibration voltage can little by little reduce identical amplitude.

According to exemplary embodiment, calibration voltage can little by little reduce about 0.05V to 0.35V.

According to exemplary embodiment, storage unit can be one of floating boom formula storage unit and charge-trapping formula storage unit.

According to exemplary embodiment, can carry out repeatedly verification operation with certain interval.

According to exemplary embodiment, the described time interval can the scope between about 1 μ s and 100 μ s in.

According to exemplary embodiment, described method also can comprise: carry out the first programming operation that comprises the verification operation of using the first calibration voltage, execution comprises the second programming operation of the verification operation of using the second calibration voltage that is greater than the first calibration voltage, wherein, after program voltage is applied to storage unit, every execution one-time programming voltage applies operation, just carry out continuously repeatedly verification operation, wherein, in the first programming operation, repeat and comprise that one-time programming voltage applies a pair of operation of operation and a verification operation, until by using the verification operation of the first calibration voltage, in the second programming operation, repeat and comprise that one-time programming voltage applies operation and the repeatedly a pair of operation of verification operation, until by using the verification operation of the second calibration voltage.

According to exemplary embodiment, the low about 0.2V of comparable the second calibration voltage of the first calibration voltage is to 1.0V.

According to exemplary embodiment, can be to by using the storage unit of the verification operation of the first calibration voltage to carry out the second programming operation.

According to exemplary embodiment, can carry out the first programming operation to the storage unit of erase status, so that the storage unit of erase status is programmed to middle programming state, can carry out the second programming operation to the storage unit of middle programming state, so that the storage unit of middle programming state is programmed to final programming state.

According to exemplary embodiment, the storage unit after final programming state can comprise three layers or more multi-layered.

According to exemplary embodiment, can carry out the first programming operation to the storage unit of erase status, so that the storage unit of erase status is programmed to middle programming state, can carry out the second programming operation to the storage unit of middle programming state, so that the storage unit of middle programming state is programmed to final programming state, to increase the minimum threshold voltage of middle programming state and to reduce threshold voltage distribution range.

According to exemplary embodiment, storage unit can be 4 layers of unit, and erase status can be " 11 " state, and final programming state can be at least one in " 01 " state, " 00 " state and " 10 " state.

According to exemplary embodiment, in each of the first programming operation and the second programming operation, can, in the situation that little by little increasing program voltage, repeat and comprise that program voltage applies a pair of operation of operation and verification operation.

According to exemplary embodiment, the program voltage increment in the every step in the second programming operation can be lower than the program voltage increment of the every step in the first programming operation.

According to exemplary embodiment, described method also can comprise that execution comprises that use is lower than the 3rd programming operation of the verification operation of the calibration voltage of the first calibration voltage, wherein, the storage unit of erase status is repeated and comprises that one-time programming voltage applies a pair of operation of operation and a verification operation, until by using the verification operation lower than the calibration voltage of the first calibration voltage, so that the storage unit of erase status is programmed to middle programming state, wherein, the first programming operation and the second programming operation are by the storage unit of programming state in the middle of being applied to continuously, so that the storage unit of middle programming state is programmed to final programming state, to increase the minimum threshold voltage of programming state and to reduce threshold voltage distribution range.

According to exemplary embodiment, in each of the 3rd programming operation, the second programming operation and the first programming operation, can, in the situation that little by little increasing program voltage, repeat and comprise that program voltage applies a pair of operation of operation and verification operation.

According to exemplary embodiment, the program voltage increment in the every step in the second programming operation is lower than the program voltage increment of the every step in the first programming operation.

According to exemplary embodiment, storage unit can be 4 layers of unit, and erase status can be " 11 " state, and middle programming state can be at least one in " 01 " state, " 00 " state and " 10 " state.

According to exemplary embodiment, the storage unit of erase status can be employed the first programming operation, so that the storage unit of erase status is programmed to the middle programming state as mute state, the storage unit of erase status can be employed the second programming operation, so that the storage unit of erase status is programmed to the first programming state, the storage unit of mute state can be employed the second programming operation, so that the storage unit of mute state is programmed to the second or the 3rd programming state.

According to exemplary embodiment, storage unit can be 4 layers of unit, and erase status can be " 11 " state, and the first to the 3rd programming state can be at least one in " 01 " state, " 00 " state and " 10 " state, and differs from one another.

According to exemplary embodiment, in each of the first programming operation and the second programming operation, can in the situation that little by little increase the amplitude of program voltage, repeat and comprise that program voltage applies a pair of operation of operation and verification operation.

Accompanying drawing explanation

By the detailed description of exemplary embodiment being carried out below in conjunction with accompanying drawing, above-mentioned and/or other side and advantage will become apparent and be easier to understand, wherein:

Fig. 1 is used the schematic sectional view of carrying out charge-trapping flash (CTF) memory storage of programming operation according to the programmed method of exemplary embodiment;

Fig. 2 is the circuit diagram as the NAND formula flash memory of the example of the flash memory of the programmed method of employing exemplary embodiment;

Fig. 3 is according to the process flow diagram of the programming operation of the programmed method of exemplary embodiment;

Fig. 4 and Fig. 5 are illustrated according to the example waveform of the potential pulse applying in the programmed method of Fig. 3 of exemplary embodiment;

Fig. 6 is illustrated in the situation of using common ISPP method to carry out programming, is applied to the example waveform of potential pulse of the word line (WL) of selection;

Fig. 7 is the example waveform illustrating about Fig. 6, the exemplary graph of the variation of threshold voltage during the programming of CTF storage unit;

Fig. 8 A and Fig. 8 B be illustrated in and use traditional programmed method to programme during, the programming scheme of storage unit and the exemplary graph of threshold voltage shift;

Fig. 9 A and Fig. 9 B are during the programmed method that is illustrated in usage example embodiment is programmed, the programming scheme of storage unit and the exemplary graph of threshold voltage shift;

Figure 10 is according to the process flow diagram of the programming operation of the programmed method of another exemplary embodiment;

Figure 11 and Ta 12 are illustrated in and use in situation about programming according to the programmed method of Figure 10 of exemplary embodiment, are applied to the example waveform of potential pulse of the WL of selection;

Figure 13 A and Figure 13 B are for explaining the schematic diagram of multilevel-cell (MLC) programmed method according to exemplary embodiment;

Figure 14 A and Figure 14 B are for explaining according to the schematic diagram of the MLC programmed method of another exemplary embodiment;

Figure 15 is the circuit diagram that is illustrated in a part for NAND string in the piece with many NAND strings.

Embodiment

Now with reference to accompanying drawing, exemplary embodiment is described more fully.Yet, exemplifying embodiment embodiment in many different forms, and should not be construed as limited to exemplary embodiment set forth herein.On the contrary, thereby provide these exemplary embodiment disclosure will be thoroughly and complete, and will fully the scope of exemplary embodiment be conveyed to those skilled in the art.In the accompanying drawings, for the clear thickness that can exaggerate layer and region.

Should be appreciated that, when a certain parts be known as another parts " on ", " connection " or " combination " when another parts, these parts may be directly on described another parts, connect or be attached to described another parts, or may there is intermediate member.On the contrary, when parts be known as " directly " another parts " on ", " directly connect " or " directly in conjunction with " during to another parts, do not have intermediate member.The term "and/or" of here using comprises any and whole combination of one or more relevant items of listing.

Should be appreciated that, although can describe different elements, assembly, region, layer and/or part by term first, second, third, etc. here, these elements, assembly, region, layer and/or part should not limited by these terms.These terms are only for distinguishing an element, assembly, region, layer or part and another element, assembly, region, layer or part.Therefore,, in the situation that do not depart from the instruction of exemplary embodiment, the first element discussed below, assembly, region, layer or part can be called as the second element, assembly, region, layer or part.

Here usage space relative terms (for example " and ... under ", " in ... below ", " below ", " ... on ", " above " etc.) relation of an assembly illustrated in the accompanying drawings or feature and another assembly or feature easily described.Should be appreciated that, space relative terms is in order to comprise the different azimuth at use or operating device the orientation of describing in accompanying drawing.

The term here using is only for describing specific embodiment, rather than in order to limit exemplary embodiment.Singulative used herein also comprises plural form, unless context separately has clearly indication.Should also be appreciated that, when using term " to comprise " in the present note, it represents the existence of feature, integral body, step, operation, element and/or the assembly of statement, but do not get rid of one or more other features, integral body, step, operation, element and/or assembly, does not exist or adds.

Unless otherwise defined, otherwise all terms used herein (comprising technology and scientific terminology) have the identical implication of implication of conventionally understanding with exemplary embodiment those of ordinary skill in the field.Should also be appreciated that, unless clearly definition here, otherwise term (such as the term defining in common dictionary) should be interpreted as having the implication consistent with the implication of described term in the context of association area, and should be by idealized or too formally explanation.

To describe exemplary embodiment now, exemplary embodiment is shown in the drawings, and wherein, identical label represents identical parts all the time.

Fig. 1 is the schematic sectional view that the programmed method of usage example embodiment is carried out charge-trapping flash (CTF) memory storage of programming operation.CTF memory storage can form the storage unit of CTF storer.

With reference to Fig. 1, CTF memory storage 10 can comprise substrate 11 and/or be formed on the grid structure 20 in substrate 11.

The first doped region 13 and the second doped region 15 doped with expectation or predetermined conductiving doping agent can be formed in substrate 11.One in the first doped region 13 and the second doped region 15 can be used as drain D, and another in the first doped region 13 and the second doped region 15 can be used as source S.

Grid structure 20 can comprise the raceway groove insulation course 21 that is formed in substrate 11, be formed on the electric charge capture layer 23 on raceway groove insulation course 21 and/or be formed on the blocking insulation layer 25 on electric charge capture layer 23.Control gate 27 can be formed on blocking insulation layer 25.The label 19 of Fig. 1 represents to be formed on the spacer (spacer) on the sidewall of blocking insulation layer 25, electric charge capture layer 23 and/or channel layer 21.

Raceway groove insulation course 21 can be for the layer of tunnelling electric charge and/or can be formed on substrate 11, to contact the first doped region 13 and the second doped region 15.Raceway groove insulation course 21 can for example, by tunneling oxide layer (, SiO ₂), being combined to form of various high k oxides or tunneling oxide layer and various high k oxides.

Or raceway groove insulation course 21 can for example, by silicon nitride (, Si ₃n ₄) layer formation.For example, can form silicon nitride layer, thus the density of impurity relatively low (for example, the density of the impurity in silicon nitride can be comparable to the density of the impurity of silicon oxide layer) and better with the interference pattern of silicon.

Raceway groove insulation course 21 can form the bilayer that comprises silicon nitride layer and oxide skin(coating).

Raceway groove insulation course 21 can be formed with single layer structure by oxide or nitride, or can with sandwich construction, be formed by the material with different band gaps.

Electric charge capture layer 23 can be to catch electric charge with the region of storage information.Electric charge capture layer 23 can form one that comprises in polysilicon, nitride, high-k dielectric and nano dot.

For example, electric charge capture layer 23 can for example, by nitride (Si ₃n ₄) or high k oxides (for example, HfO ₂, ZrO ₂, Al ₂o ₃, HfSiON, HfON or HfAlO) form.

Electric charge capture layer 23 can comprise a plurality of nano dots that are arranged as discontinuously charge-trapping position.For example, nano dot can be nanocrystalline.

Blocking insulation layer 25 can prevent electric charge pass form electric charge capture layer 23 position upwards towards control gate 27 migrations.Blocking insulation layer 25 can be formed by oxide skin(coating).

Blocking insulation layer 25 can be by SiO ₂or there is high k material (for example, the Si of the specific inductive capacity higher than raceway groove insulation course 21 ₃n ₄, Al ₂o ₃, HfO ₂, Ta ₂o ₅or ZrO ₂) form.Blocking insulation layer 25 can form sandwich construction.For example, blocking insulation layer 25 can comprise two-layer or more multi-layered, for example, and for example, by general insulating material (, SiO ₂) insulation course forming and the high-k dielectric layer being formed by the material with the specific inductive capacity higher than raceway groove insulation course 21.

Control gate 27 can be formed by metal level.For example, control gate 27 can be formed by aluminium (Al).Or control gate 27 can for example, for example, by (, the formation such as NiSi) of metal (, Ru or TaN) or silicide material.Metal and silicide material can be used for forming the control gate of semiconductor storage conventionally.

Can carry out programming with by the above-mentioned CTF memory storage of electronic injection, and at the catch position trapped electrons of electric charge capture layer 23, thereby CTF memory storage has the threshold voltage of programming state.Can carry out and wipe hole to be injected to CTF memory storage so that hole and electronics more compound (recombine) to wipe electronics, thereby CTF memory storage has the threshold voltage of erase status.

Correspondingly, the storage unit of flash memory devices can have two states, for example, and programming state and erase status.Conducting (on) state can be called as erase status, and cut-off (off) state can be called as programming state.Under conducting state, the threshold voltage of flashing storage unit can reduce to be applied to the voltage of control gate in during read use makes electric current flow into the drain electrode that is connected to bit line.Under cut-off state, the threshold voltage of flashing storage unit can increase, and the voltage that is applied to control gate to use at during read forbids that electric current flows into drain electrode.

The programmed method of exemplary embodiment can be applied to using above-mentioned CTF memory storage to programme as the CTF storer of storage unit.

The programmed method of exemplary embodiment can be applied to comprising that to using the floating boom formula flash memory devices of floating boom and control gate programmes as the floating boom formula flash memory of storage unit.Floating boom formula flash memory devices is known, therefore will omit detailed description and the description of floating boom formula flash memory devices here.

Fig. 2 is the circuit diagram as the NAND formula flash memory of the example of the flash memory of the programmed method of employing exemplary embodiment.With reference to Fig. 2, flash memory can comprise a plurality of unit strings.Yet, two unit strings 30 and 31 are only exemplarily shown in Fig. 2.

Unit strings 30 and 31 each can comprise a plurality of memory cell arrays of sharing source electrode and drain electrode with consecutive storage unit.The storage unit of each in unit strings 30 and 31 can have structure as shown in Figure 1.Each of storage unit can be a kind of in above-mentioned CTF storage unit and floating boom formula flash memory cell.

Unit strings 30 and 31 each can comprise that the ground that is one another in series selects transistor (GST), a plurality of storage unit and/or string select transistor (SST).Unit strings 30 and each one end of 31 can be connected to bit line BL, and unit strings 30 and 31 each the other end can be connected to common source line (CSL).GTS can be connected to CSL, and SST can be connected to bit line BL.

Word line (WL) can be connected to the control gate of a plurality of storage unit, intersects with unit strings 30 and 31, and string selection line (SSL) can be connected to the grid of SST, and/or ground selects line (GSL) can be connected to the grid of GST.

The data of programming in storage unit can change according to the voltage of bit line BL.If the voltage of bit line BL is power source voltage Vcc, in storage unit, can forbid data programing.If the voltage of bit line is ground voltage 0V, can in storage unit, to data, programme.Fig. 2 illustrates ground voltage 0V and is applied to bit line BL _n-1and supply voltage VCC is applied to bit line BL _nmode of operation.

In programming operation, program voltage V _pgmcan be applied to the WL of selection, for example, WL WL29.By voltage Vpass, can be applied to unselected WL, for example, WL WL 31, WL30, WL28...WL0.The voltage increasing gradually with the increment of 0.5V from the fundamental voltage of about 16V can be used as program voltage V _pgmbe applied in and/or approximately the voltage of 9V can be used as by voltage V _passbe applied in.

Can be to programming with the corresponding storage unit of bit line BLn-1 that is provided ground voltage 0V on the WL WL29 selecting.In Fig. 2, storage unit A is programmed.

At Fig. 3, the method to flash memory devices programming according to exemplary embodiment is shown, Fig. 4 and Fig. 5 are illustrated in the example waveform of the potential pulse of the WL that is applied to selection during programming.Fig. 4 illustrates according to the constant amplitude of having of exemplary embodiment and between the program voltage with the amplitude increasing gradually and is applied in the calibration voltage V of three times _ref.Fig. 5 illustrates to be had the amplitude reducing gradually and be applied in the calibration voltage of three times between the program voltage increasing gradually.

According to the programmed method of exemplary embodiment, can comprise program voltage V _pgmbe applied to the WL (for example, WL WL29) of selection, the storage unit to storage unit programming and/or verification programming.

According to exemplary embodiment, can increase gradually the ISPP method that the amplitude of program voltage programmes with passing through as shown in Figure 4 and Figure 5 and carry out described programmed method.

Can along with the increase gradually of the amplitude of program voltage, repeat program voltage and apply operation and verification operation, for example, until the storage unit being programmed (, the storage unit A of Fig. 2) reaches the threshold voltage of setting.

According to the verification operation of the programmed method of exemplary embodiment, can be carried out as follows.In verification operation, can be by applying program voltage V _pgmcalibration voltage is applied to the storage unit being programmed, the storage unit being programmed with verification.If determine that according to the result of verification operation the storage unit be programmed does not also reach the threshold voltage of setting, again apply calibration voltage with verification is programmed again storage unit.The threshold voltage that reaches setting refers to that threshold voltage equals or exceeds the threshold voltage of setting.

As mentioned above, the programmed method of exemplary embodiment can be included in and apply the verification operation of carrying out by repeatedly applying continuously calibration voltage pulse after program voltage pulse.

Every execution one-time programming voltage applies the maximum times of the performed verification operation of operation can be inferior for n (wherein, n is equal to or greater than 2 number).If until determine during the verification operation of n time that the storage unit be programmed has reached the threshold voltage of setting, finishes the programming of storage unit.If by n verification operation, determine that the storage unit being programmed does not also reach the threshold voltage of setting, can again apply and increase Δ V _pgmprogram voltage with overprogram and verification operation.

Can, in the situation that program voltage increases gradually, repeat to comprise that program voltage applies a pair of operation of operation and a plurality of verification operation, until the storage unit of selecting reaches the threshold voltage of setting.

In Fig. 4 and Fig. 5, the basic program voltage of exemplary 16V little by little increases 0.5V and carries out programming operation.

If application ISPP method, storage unit applies operation by one-time programming voltage just can to reach the possibility of threshold voltage of setting relatively little.Therefore, comprise and apply that program voltage can be carried out at least one times with the processing of storage unit being programmed and apply to the storage unit being programmed the storage unit that calibration voltage at least twice is programmed with verification continuously in the programming scheme for each storage unit or repeatedly.

Now with reference to Fig. 3, describe in more detail according to the programmed process of the programmed method of exemplary embodiment.

At operation S10, programming mode can start.At operation S20, data can be transfused to select specific WL, for example, and WL WL29.

At operation S30, program voltage V _pgmcan be applied to the WL of selection.Storage unit A corresponding with the bit line of WL that is connected to selection and that be applied in ground voltage can be programmed.

Calibration voltage can be applied to the WL of selection, the storage unit A being programmed with verification.

For example, at operation S40, the first calibration voltage can be applied to the storage unit A being programmed, the storage unit A being programmed with verification.At operation S50, can determine whether the storage unit A being programmed has reached the threshold voltage of setting.

If determine that at operation S50 the storage unit A being programmed has reached the threshold voltage of setting, and be therefore programmed to expectation or predetermined layer (level),, at operation S110, to the programming of storage unit A, can finish.If determine that at operation S50 the storage unit A being programmed does not also reach the threshold voltage of setting,, at operation S60, the second calibration voltage can be applied in, with the storage unit A that verification is programmed again.At operation S70, can determine whether the storage unit A being programmed has reached the threshold voltage of setting.

If determine that at operation S70 the storage unit A being programmed has reached the threshold voltage of setting,, at operation S110, can finish the programming of the storage unit A to being programmed.

If determine that at operation S70 the storage unit A be programmed does not also reach the threshold voltage of setting, can again apply calibration voltage with verification is programmed again storage unit A.

If there is no verification operation, do not determine that the storage unit A being programmed has reached the threshold voltage of setting, carries out this processing until use the verification operation of n calibration voltage.At operation S80, n calibration voltage is applied in the storage unit A so that verification is programmed again.At operation S90, determine whether the storage unit A being programmed has reached the threshold voltage of setting.

If determine that at operation S90 the storage unit A being programmed does not also reach the threshold voltage of setting, at operation S100, can be by program voltage V _pgmincrease Δ V _pgm.At operation S30, the program voltage V of increase _pgmcan be applied to the WL of selection again storage unit A is programmed.

In Fig. 3, if verification operation is set to every execution one-time programming voltage, applies operation and be only performed twice, checking treatment can only be performed the verification operation of using the second calibration voltage.In verification operation, be set to every execution one-time programming voltage apply operation and be only performed twice in the situation that, n calibration voltage can equal the second calibration voltage.If according to using the result of the verification operation of the second calibration voltage to determine that storage unit A does not also reach the threshold voltage of setting, the program voltage V increasing _pgmcan be applied in again storage unit A is programmed.

As mentioned above, if determine that by sequentially applying calibration voltage storage unit A has reached the threshold voltage of setting, can finish the programming of storage unit A.If determine that storage unit A does not also reach the threshold voltage of setting, again applying calibration voltage, with the processing of verification storage unit A again, can be performed n (wherein, n is equal to or greater than 2 number) inferior.

For example, in order to carry out another programming operation, program voltage is being increased to Δ V _pgmbefore, can by with expectation or predetermined time interval apply continuously first and carry out continuously repeatedly verification operation to n calibration voltage.Expectation between continuous verification operation or predetermined interval can the scope between about 1 μ s and 100 μ s in.

If use the verification operation of n calibration voltage to determine that the storage unit A being programmed does not also reach the threshold voltage of setting, program voltage V _pgmcan be increased Δ V _pgm, and be again applied to selected WL again storage unit A is programmed.Can after the programming of storage unit A, carry out above-mentioned verification operation.

If determine that the storage unit A be programmed has reached the threshold voltage of setting any of n verification operation during once,, at operation S110, can finish the programming of storage unit A.

As mentioned above, according in the programmed method of exemplary embodiment, calibration voltage can be applied to the storage unit that is programmed continuously repeatedly to carry out verification operation.

In order to contrast with exemplary embodiment, Fig. 6 is illustrated in the situation of using common ISPP method to carry out programming, is applied to the example waveform of potential pulse of the WL of selection.With reference to Fig. 6, at program voltage, be applied in after storage unit is programmed calibration voltage V _verbe applied in verification storage unit.If determine that storage unit also reaches expectation or predetermined threshold voltage, program voltage is increased expectation or predetermined amplitude and is again applied, so that storage unit is programmed and verification again again.As mentioned above, in common ISPP method, in the situation that increasing program voltage gradually, every execution one-time programming voltage applies operation and just carries out verification operation once, until storage unit is programmed to reach the threshold voltage of setting.

According to the programmed method of exemplary embodiment, in the situation that increasing program voltage gradually, every execution one-time programming voltage applies operation, carries out serially at least twice or more times verification operation, until storage unit reaches the threshold voltage of setting.

According to exemplary embodiment, every execution one-time programming applies operation, and calibration voltage pulse can be applied twice or three times continuously, to carry out continuously verification operation twice, three times or more times.

In Fig. 4 and Fig. 5, every execution one-time programming voltage applies operation, and calibration voltage is applied three times continuously, to carry out continuously verification operation three times.

As mentioned above, according to the programmed method of exemplary embodiment, every execution one-time programming voltage applies operation, carries out serially verification operation twice or more times.Amplitude at the calibration voltage repeatedly applying continuously the term of execution of verification operation can equal example constant amplitude as shown in Figure 4, or can reduce continuously as shown in Figure 5.

As shown in Figure 4, if apply continuously calibration voltage to carry out continuously verification operation repeatedly by twice or repeated verification with identical amplitude, there is the threshold voltage increasing in time and will not need by the storage unit of verification again to be programmed after applying program voltage pulse.Therefore, storage unit can not crossed and programmed.Correspondingly, the skew of programmed threshold voltage can be adjusted narrower.

As shown in Figure 5, if verification operation is continuously performed repeatedly, calibration voltage can little by little reduce identical amplitude.For example, calibration voltage can little by little reduce the expectation of (for example, in the scope between about 0.1V and 0.2V) in the scope between about 0.05V and 0.35V or predetermined (for example, identical) amplitude.For example, first and the difference of n calibration voltage can be less than the increase at one-time programming operating period threshold voltage.

If the amplitude of calibration voltage little by little reduces as mentioned above, its threshold voltage can pass through verification operation than the low storage unit of threshold voltage of the storage unit of optimally being programmed optimum (or setting).

For example, if by order and applied continuously and little by little reduce first be set to equal the threshold voltage arranging to the first calibration voltage in n calibration voltage, second can be less than the threshold voltage of setting to n calibration voltage, wherein, n is equal to or greater than 2 number.

If using second to determine that storage unit is by verification during the verification operation of n calibration voltage, storage unit can have the threshold voltage of the threshold voltage of the setting of being less than.

For example, if the threshold voltage arranging is 3V and verification operation, be set to use the calibration voltage reducing gradually to carry out continuously twice, the storage unit being programmed can be passed through verification operation at the threshold voltage that is greater than the scope between about 2.65V and 2.95.

Therefore,, if calibration voltage little by little reduces, the threshold voltage of storage unit can lose (sacrifice) relatively slightly.Yet if use the ISPP method that program voltage is little by little increased to 0.5V to carry out programming, each programming operation threshold voltage for example can increase approximately 0.2V more significantly to 0.3V, and maximum reaches about 0.5V.The increase of the skew of the threshold voltage therefore, causing by excessively programming can further be enhanced.

Therefore,, if first applied continuously to carry out continuously verification operation repeatedly to n calibration voltage, the skew of programmed threshold voltage can be adjusted narrowlyer, and storage unit can not crossed and be programmed.

If calibration voltage is applied continuously with identical amplitude as shown in Figure 4, to carry out continuously verification operation repeatedly, the amplitude of calibration voltage can be slightly for example, lower than the amplitude of expectation or predetermined threshold voltage (, optimum threshold voltage).In the situation that calibration voltage is applied continuously with identical amplitude, the difference of the threshold voltage of setting and expectation or predetermined threshold voltage can be less than the increase at one-time programming operating period threshold voltage.

For example, compare with expectation or predetermined threshold voltage, the threshold voltage of setting can low about 0.05V to 0.35V, or low about 0.1V to 0.2V for example.If expectation or predetermined threshold voltage are about 3V, the threshold voltage arranging can be any value in the scope between about 2.65V and 2.95V.

Even in the scope of the threshold voltage arranging between about 2.65V and 2.95V, the threshold voltage of storage unit also may lose slightly.Yet, by again carrying out programming operation storage unit, can excessively do not programmed, and the skew of programmed threshold voltage can be adjusted narrower.

By using according to the skew of the programming scheme of the storage unit of the programmed method of exemplary embodiment and threshold voltage, compare with using the programming scheme of storage unit and the skew of threshold voltage of the traditional programmed method that utilizes common ISPP method now.

Fig. 7 is the example waveform illustrating about the potential pulse of Fig. 6, the exemplary graph of the variation of threshold voltage during the programming of charge-trapping flash (CTF) storage unit.Fig. 8 A and Fig. 8 B illustrate respectively to use the programming scheme of storage unit of traditional programmed method and the exemplary graph of the skew of threshold voltage.Fig. 9 A and Fig. 9 B are the programming scheme of storage unit of programmed method and the exemplary graph of the skew of threshold voltage that is illustrated in respectively usage example embodiment.

With reference to Fig. 6 and Fig. 7, if use common ISPP method to carry out programming, in the situation that little by little increase program voltage from 16V with the increment of 0.5V, alternately repeat one-time programming voltage and apply operation and a verification operation.

During above-mentioned programming, CTF storage unit also can have the instantaneous threshold voltage increasing in time after applying programming pulse.For example, if use the programming pulse of 17V to carry out programming, can definite threshold voltage lower than calibration voltage V _ref.Yet threshold voltage can increase and surpass calibration voltage V in time _ref.

Therefore, verification operation can be determined failure of programming, as shown in Figure 8 A.Therefore, programming pulse is applied again.As a result, storage unit may be crossed and be programmed.Therefore, as shown in Figure 8 B, compare with the time-independent situation of threshold voltage, the skew of the threshold voltage of storage unit increases.

If use common ISPP method to carry out programming, the storage unit of fully being programmed may be because instantaneous threshold voltage is defined as program fail during verification.Therefore the possibility that the storage unit that, existence is fully programmed is programmed extraly.As a result, the possibility that threshold voltage is more offset increases.

If the programmed method of usage example embodiment, at the first calibration voltage V using as shown in Figure 9 A _ref1the verification operation of pulse during, can determine storage unit program fail.Yet, if expectation or predetermined time in the past after, use than the first calibration voltage V _ref1the second low calibration voltage V of pulse _ref2pulse carry out duplication check operation, storage unit can be confirmed as programming and passes through.Therefore, do not need to carry out another programming operation.Therefore, can reduce to a great extent the skew of the threshold voltage of storage unit.For example, as shown in Figure 9 B, the skew of the threshold voltage of storage unit can be more similar in appearance to the not skew of the threshold voltage of change in time.

In Fig. 9 A, use than the first calibration voltage V _ref1the second low calibration voltage V _ref2carry out duplication check operation.Yet, can use and the first calibration voltage V _ref1the the second calibration voltage V equating _ref2carry out duplication check operation.Even at the second calibration voltage V _ref2equal the first calibration voltage V _ref1situation under, also can reduce to a great extent the skew of the threshold voltage of storage unit.For example, the skew of the threshold voltage of storage unit can be more similar in appearance to the not skew of the threshold voltage of change in time.

Described as long as threshold voltage does not reach the threshold voltage of setting, just one-time programming after continuous at least twice or more times apply calibration voltage pulse with the processing of execution verification.If as shown in figure 10, in the situation that program voltage increases gradually, overprogram voltage applies operation and verification operation, only when the threshold voltage of storage unit is equal to or greater than expectation or predetermined value, just can use selectively described processing.

For example, use ISPP method, during initial programming, the threshold voltage of the programming of storage unit may not reach the threshold voltage of setting.If the threshold voltage of the programming of storage unit does not also reach the threshold voltage of setting, can apply has increased the program voltage of one-level and has re-executed programming operation, and need not at least twice or the continuous execution of more verification operation.In this case, can there is not programming.Only when the threshold voltage of storage unit is equal to or greater than expectation or predetermined value, just can at least twice or more times carry out continuously verification operation.Therefore, can effectively reduce whole programming times.

Figure 10 is the process flow diagram of the programming operation of the programmed method of another exemplary embodiment according to the present invention.Figure 11 and Figure 12 are illustrated in the example waveform of the potential pulse of the WL that is applied to selection during use is programmed according to the programmed method of Figure 10 of exemplary embodiment.Figure 10 to Figure 12 is compared with Fig. 3 to Fig. 5, the difference of the programmed method of Figure 10 and the programmed method of Fig. 3 is: every execution one-time programming voltage applies operation can carry out verification operation one time, until storage unit reaches the threshold voltage that is equal to or greater than value expectation or predetermined.Yet during the programming after the threshold voltage of storage unit is equal to or greater than expectation or predetermined value, the programmed method of Figure 10 is identical with the programmed method of Fig. 3 in fact.

With reference to Figure 10, according to the programmed method of another exemplary embodiment, can comprise and apply program voltage storage unit is programmed and the storage unit being programmed is carried out to the operation of verification.Can after applying program voltage, continuous several times carry out verification operation.

The programmed method of another exemplary embodiment can comprise the first programming operation 200 and the second programming operation 300.The first programming operation 200 can comprise the verification operation of the calibration voltage that use is relatively low, the second programming operation 300 can comprise the verification operation of using the calibration voltage higher than described low calibration voltage, and described the second programming operation 300 can be performed after the first programming operation 200.

Can carry out the first programming operation 200 until use the verification operation of low calibration voltage to pass through.The second programming operation 300 can be carried out in the storage unit of verification operation of having passed through to use low calibration voltage.

In the first programming operation 200, one-time programming voltage applies operation and a verification operation can be repeated to carry out in couples.

In the second programming operation 300, can continuous several times carry out verification operation.The second programming operation 300 can be corresponding to the programmed method with reference to the exemplary embodiment shown in Fig. 3.In the second programming operation 300, can use than the high calibration voltage of described low calibration voltage.

As shown in Figure 11 and Figure 12, can use and in the situation that program voltage increases gradually, carry out the programmed method that the ISP method of programming is carried out another exemplary embodiment.

For example, in the first programming operation 200, one-time programming voltage applies operation and a verification operation can be repeated in couples in the situation that program voltage increases gradually, until the storage unit being programmed is passed through to use the verification operation of low calibration voltage.

The second programming operation 300 can carried out by using in the storage unit of verification operation of low calibration voltage.For example, in the situation that program voltage increases gradually, the continuous verification operation that one-time programming voltage applies operation and the high calibration voltage of a plurality of uses can be repeated in couples.

Difference between low calibration voltage and high calibration voltage can be approximately equal to or be greater than the increase that is applied the threshold voltage that operation produces by least one one-time programming voltage.Low calibration voltage can force down about 0.2V to 1.0V than colleges and universities electrical verification.

For example, the high calibration voltage using in the second programming operation 300 can be about 3V.In the situation that high calibration voltage is approximately 3V, low calibration voltage can be that the arbitrary value ，Bi colleges and universities electrical verification in the scope between about 2.0V and 2.8V is forced down about 0.2V to 1.0V.If reduced gradually in the amplitude of carrying out the high calibration voltage applying during a plurality of continuous verification operation, the high calibration voltage using in the second programming operation 300 can reduce gradually from 3V.

Figure 11 is illustrated in the example waveform of the voltage using in the programmed method of another exemplary embodiment.In the first programming operation 200, in the situation that program voltage increases gradually, one-time programming voltage applies operation and once uses the verification operation of low calibration voltage to be repeated in couples to carry out.In the second programming operation 300, in the situation that program voltage increases gradually, one-time programming voltage applies the continuous verification operation that operation and a plurality of use have a high calibration voltage of identical amplitude and is repeated in couples execution.

Figure 12 illustrates according to the example waveform of the voltage using in the programmed method shown in Figure 10 of another embodiment.In the first programming operation 200, in the situation that program voltage increases gradually, one-time programming voltage applies operation and once uses the verification operation of low calibration voltage to be repeated in couples to carry out.In the second programming operation 300, in the situation that program voltage increases gradually, the continuous verification operation that one-time programming voltage applies operation and the high calibration voltage that reduces gradually of a plurality of use is repeated execution in couples.

In Figure 11 and Figure 12, basic program voltage is 16V, and program voltage increases to carry out programming operation gradually by the increment of 0.5V.In the first programming operation 200, one-time programming voltage applies operation and a verification operation is repeated twice in couples.In the second programming operation 300, every execution one-time programming voltage applies operation and carries out verification operation with regard to continuous three times.In Figure 11, L-V _refrepresent low calibration voltage, H-V _refrepresent to have the high calibration voltage of identical amplitude.In Figure 12, L-V _refrepresent low calibration voltage, H-V _ref1, H-V _ref2and H-V _ref3represent the high calibration voltage reducing gradually.Minimum high calibration voltage in high calibration voltage, for example H-V _ref3can be higher than low calibration voltage L-V _ref.

Now with reference to Figure 10, describe in more detail and use the programmed method of another exemplary embodiment to carry out the processing of programming.

At operation S210, can starting program pattern.At operation S220, can input data to select specific WL, for example, WL WL29.Can carry out the first programming operation 200.

The first programming operation 200 can comprise operation S230, wherein, in operation S230, can be by program voltage V _pgmbe applied to the WL of selection so that the WL selecting is programmed.Can be to programming with the corresponding storage unit A of bit line that is provided ground voltage and is connected to the WL of selection.

Can carry out one-time programming voltage to storage unit A and apply operation.At operation S240, low calibration voltage can be applied to the storage unit A that the WL of selection is programmed with verification.At operation S250, determine that whether the storage unit A being programmed is by being used the verification operation of low calibration voltage.

If in operation S250, the storage unit A being programmed is confirmed as its threshold voltage and is not equal to or is greater than value expectation or predetermined, and therefore, the storage unit A being programmed is not by being used the verification operation of low calibration voltage, operating S260, can be by program voltage V _pgmincrease Δ V _pgm.At operation S230, the program voltage of increase can be applied to the WL of selection again storage unit A is programmed.At operation S240, low calibration voltage can be applied in verification storage unit A.At operation S250, determine that whether storage unit A is by being used the verification operation of low calibration voltage.

In the situation that program voltage increases gradually, storage unit A programmed and use low calibration voltage to come the processing of verification storage unit A to be repeated to carry out, until the threshold voltage of storage unit A is equal to or greater than expectation or predetermined value, therefore, by using the verification operation of low threshold voltage.

In the first programming operation 200, by often carrying out one-time programming voltage, apply operation and just with low calibration voltage, come a verification operation of storage unit A execution.

If at operation S250, the storage unit A being programmed is confirmed as passing through the verification operation of the low calibration voltage of use, can carry out the second programming operation 300.Can in the second programming operation S300, carry out with the programmed method of the exemplary embodiment of describing with reference to Fig. 3 and process accordingly.

For example, in operation S330, program voltage V _pgmcan be applied to the WL of selection, for example, WL WL29, with to by being used the storage unit A reprogramming of the verification operation of low calibration voltage.If use ISPP method, to compare with the program voltage finally applying in the first programming operation 200, the program voltage first applying in the second programming operation 300 can be to have increased Δ V _pgmvoltage.

After storage unit A is programmed, the WL that high calibration voltage can be applied to selection carries out verification with as described below to the storage unit A being programmed.

At operation S340, the first high calibration voltage can be applied to the storage unit A that is programmed so that the storage unit A being programmed is carried out to verification.At operation S350, determine whether the storage unit A being programmed has reached the threshold voltage of setting and whether be programmed, that is, determine whether the storage unit being programmed has passed through verification operation.

If at operation S350, storage unit A is confirmed as reaching the threshold voltage of setting, so storage unit A is programmed into layer expectation or predetermined,, operating S410, can finish the programming to storage unit A.If at operation S350, the storage unit A being programmed is confirmed as not reaching the threshold voltage of setting, at operation S360, can apply the second high calibration voltage with verification is programmed again storage unit A.At operation S370, determine whether the storage unit A being programmed has reached the threshold voltage of setting.

If at operation S370, according to using the result of the verification operation of the second high calibration voltage to determine that storage unit A has reached the threshold voltage of setting,, at operation S410, can finish the programming to storage unit A.

If at operation S370, according to using the result of the verification operation of the second high calibration voltage to determine that storage unit A does not also reach the threshold voltage of setting, can carry out verification again to the storage unit A being programmed.

If in any verification operation, determine that storage unit A does not reach the threshold voltage of setting, can carry out storage unit A is carried out to the operation of verification until use the verification operation of the high calibration voltage of n.At operation S380, can apply the high calibration voltage of n with verification is programmed again storage unit A.At operation S390, determine whether the storage unit A being programmed has reached the threshold voltage of setting.

If at operation S390, according to the result of using the verification operation of the high calibration voltage of n, determine that the storage unit A being programmed does not also reach the threshold voltage of setting, at operation S400, can be by program voltage V _pgmincrease Δ V _pgm.At operation S330, increased Δ V _pgmthe program voltage WL that can be applied to selection with to storage unit A reprogramming.

If use the verification operation of high calibration voltage to be set to every execution one-time programming voltage, apply just execution at least twice of operation, can carry out the programmed method of Figure 10 until use the verification operation of the second high calibration voltage.In the situation that verification operation is only performed twice, the high calibration voltage of n can equal the second high calibration voltage.If according to using the result of the verification operation of the second calibration voltage to determine that storage unit A does not reach the threshold voltage of setting, can apply and increase Δ V _pgmprogram voltage with to storage unit A reprogramming.

As mentioned above, if determine that according to the result that sequentially applies the verification operation of high calibration voltage execution storage unit A has reached the threshold voltage of setting, can finish the programming to storage unit A.If determine that storage unit A does not reach the threshold voltage of setting, can carry out and again apply high calibration voltage storage unit A is carried out to the processing of verification until n (wherein, n is the number that is equal to or greater than " 2 ") is inferior.

For example, at program voltage, increase Δ V _pgmbefore carrying out another programming operation, can by order, apply first with expectation or predetermined interval and come continuous several times to carry out verification operation to n calibration voltage.Expectation or predetermined interval can the scope between about 1 μ s and 100 μ s in.

If the storage unit A being programmed according to the result of using the verification operation of n calibration voltage does not reach the threshold voltage of setting, program voltage V _pgmcan be increased Δ V _pgm, and the WL that is applied to selection is to repeat as mentioned above the second programming operation 300.

If any in during n verification operation determines that storage unit A has reached the threshold voltage of setting in once, in operation S410, the operation that can finish storage unit A to programme.

In the programmed method of another exemplary embodiment, the first to n high calibration voltage can have as shown in figure 11 identical amplitude or can have as shown in figure 12 the amplitude reducing gradually.

The second programming operation 300 of the programmed method of exemplary embodiment can be in fact corresponding to previously arrived the programmed method of the exemplary embodiment of Fig. 5, Fig. 7, Fig. 9 A and Fig. 9 B description with reference to Fig. 3.Therefore, will programming technique, the programming scheme of storage unit that uses the second programming operation 300 and the skew of threshold voltage that use the second programming operation 300 repeatedly do not described here.

According to the programmed method of exemplary embodiment, be described to use ISPP method by the increment of 0.5V, to increase gradually program voltage from 16V, to repeat program voltage, applied operation and verification operation.Yet exemplary embodiment is not limited to this.For example, starting program voltage can have another value that is not 16V, and/or the increase gradually of program voltage can be another value, for example, and 0.3V but not 0.5V.

Can apply according to one-time programming voltage and apply and operate the programmed method of the exemplary embodiment of carrying out repeatedly verification operation afterwards with the programming of execution multilevel-cell (MLC).That is to say, following programming operation can be applied to MLC: every execution one-time programming voltage applies operation and just carries out the first programming operation, every execution one-time programming voltage of the verification operation of once using low calibration voltage and apply operation and just carry out the second programming operation of the verification operation of repeatedly using high calibration voltage or with reference to Fig. 3, to every execution one-time programming voltage of Fig. 5 description, applied the programming operation that verification operation is just carried out repeatedly in operation, wherein, with reference to Figure 10, to Figure 12, the first programming operation and the second programming operation have been described.

To the situation that be applied to 4 layers of unit according to the MLC programmed method of carrying out repeatedly verification operation after execution one-time programming voltage applies operation of exemplary embodiment exemplarily be described.Application can be any storage unit in the storage unit of floating boom formula storage unit, charge trap-type storage unit, NAND or NOR type flash memory according to the MLC of the programmed method of exemplary embodiment.

4 layers of unit in storer can have " 00 " state, " 01 " state or " 10 " state as programming state, and can have " 11 " state as erase status." 11 " state can be considered to the first programming state.In this case, " 01 " state, " 00 " state and " 10 " state can be expressed as second, third and the 4th programming state by the order of threshold voltage magnitude.Or " 11 " state can be represented as erase status, " 01 ", " 00 " and " 10 " state can be expressed as first, second, and third programming state by the order of threshold voltage magnitude.Here, can change according to threshold voltage magnitude the order of " 01 ", " 00 " and " 10 " state.For convenient, " 11 " state will be represented as erase status, and " 01 ", " 00 " and " 10 " state will be represented as the programming state the following describes.

Thereby can be programmed to middle programming state by the storage unit of erase status being carried out to the storage unit of the first programming operation erase status, thereby and by the storage unit of middle programming state being carried out to the storage unit of the middle programming state of the second programming operation, be programmed to final programming state, carry out MLC programmed method according to an exemplary embodiment of the present invention.Storage unit after final programming state can comprise three layers or more layer.Figure 13 A and Figure 13 B explain the schematic representation of MLC programmed method according to an exemplary embodiment of the present invention.Figure 14 A and Figure 14 B are the schematic representation of explaining the MLC programmed method of another exemplary embodiment according to the present invention.

With reference to Figure 13 A and Figure 13 B, the first programming operation is applied to the storage unit of erase status, thereby the storage unit of erase status is programmed to the storage unit as the intermediateness of mute state.Next, the second programming operation is applied to the storage unit of erase status or the storage unit of mute state, thereby the storage unit of the storage unit of erase status or mute state is programmed to the storage unit as the predetermined programming state of final programming state.

In the first programming operation of the first programming operation based on describing to Figure 12 with reference to Figure 10, in the situation that the amplitude of program voltage increases gradually, repeat and comprise that one-time programming voltage applies operation and once uses a pair of operation of the verification operation of low calibration voltage, until by using the verification of low calibration voltage.In the second programming operation of the programming operation based on describing to Fig. 5 with reference to Fig. 3 or the second programming operation of describing to Figure 12 with reference to Figure 10, in the situation that the amplitude of program voltage increases gradually, repeat and comprise that one-time programming voltage applies operation and repeatedly uses a pair of operation of the continuous verification operation of high calibration voltage, until by using the verification of high calibration voltage.The amplitude of the high calibration voltage using when carrying out a plurality of continuous verification operation as mentioned above, can be identical or can reduces gradually.As mentioned above, high calibration voltage can be than the high predetermined amplitude of low calibration voltage.

With by the second programming operation being applied to the programming state that the storage unit of erase status obtains, compare, by the second programming operation being applied to the programming state that the storage unit of mute state obtains, can there is higher minimum threshold voltage.

If storage unit is 4 layers of unit, erase status can be " 11 " state, and programming state can be at least one in " 00 ", " 01 " and " 10 " state.

For example, if the first programming operation is applied to the storage unit as " 11 " state of erase status, can programme to for example least significant bit (LSB) (LSB), therefore can obtain the X0 state of mute state.Here, mute state refers to the state that is not also used as programming state, and mute state is by using the second programming operation to obtain the intermediateness of programming state.

" X0 " state can be corresponding to " 00 " state of the second programming state as in storage unit (4 layers of unit).That is to say, as will be described, can be by the minimum threshold voltage of mobile " X0 " state, and reduce threshold voltage distribution range and obtain " 00 " state.Owing to applying operation by every execution one-time programming voltage, just carry out a verification operation and obtain " X0 " state, so the programming state that " X0 " state forms than expectation has wider threshold voltage, distribute.Because " X0 " state is not used as final programming state, therefore this wide threshold voltage distributes and can not cause any problem.

Because the wide threshold voltage of " X0 " state distributes, can not cause any problem, thus when the storage unit of " 11 " state is programmed into " X0 " state program voltage increment Delta V ' _pgmcan be that relatively large value is to reduce programming time.

For " 11 " state being programmed for to " 01 " state, " 00 " state and " 10 " state, first the storage unit of " 11 " state is programmed to obtain " X0 " as above state, then, to the storage unit of " 11 " state with as the highest significant position (MSB) of the storage unit of " X0 " state of mute state, programme as shown in Figure 13 B.

Therefore, storage unit can be programmed into " 01 " state from " 11 " state, from " X0 " state, is programmed into " 00 " state and " 10 " state.

By using every execution one-time programming voltage to apply the second programming operation that verification operation is just carried out repeatedly in operation, storage unit can be programmed into " 01 " state from " 11 " state, from " X0 " state, is programmed into " 00 " state and " 10 " state.

Because a plurality of verification operation prevented programming, so apply operation and just carry out repeatedly " X0 " state that " 00 " state that the second programming operation of verification operation obtains can be compared to mute state and there is narrower threshold voltage and distribute by applying every execution one-time programming voltage.In addition, owing to having used high calibration voltage, so it is high that the minimum threshold voltage of " 00 " state can be compared to the minimum threshold voltage of " X0 " state of the mute state that uses low calibration voltage, the threshold voltage distribution range of " 00 " state can be compressed to be compared to the threshold voltage distribution range of " X0 " state of mute state narrow.

According to the MLC programmed method according to exemplary embodiment, for being programmed into as " X0 " state of mute state using storage unit from " 11 " state as erase status and being programmed into the operation of " 00 " state from " X0 " state, can use the programming operation of explaining to Figure 12 with reference to Figure 10.

In addition, for " 11 " state from as erase status, be programmed into the operation as " X0 " state of mute state, can use the first programming operation of explaining to Figure 12 with reference to Figure 10.In addition, for being programmed into the operation of " 01 " state and " 10 " state, second programming operation that can use the programming operation of explaining to Fig. 5 with reference to Fig. 3 or explain to Figure 12 with reference to Figure 10 using storage unit from " 11 " state as erase status with as " X0 " state of mute state.

By preventing programming, by apply every execution one-time programming voltage apply each threshold voltage distribution range " 01 " state that programming operation that operation just carries out repeatedly verification operation obtains from " 11 " state and " 10 " state obtaining from " X0 " state can be compressed must be narrower than the threshold voltage distribution range of " 11 " state or " X0 " state.

In order further to reduce threshold voltage distribution range, use the second programming operation by storage unit the program voltage increment Delta V when " 11 " state is programmed into " 01 " state and be programmed into " 00 " state from " X0 " state _pgmprogram voltage increment Delta V ' when comparable use the first programming operation is programmed into as " X0 " state of mute state using storage unit from " 11 " state _pgmlow.

As mentioned above, because the first programming operation is used program voltage pulse and as single verification pulse of low calibration voltage, distribute so " X0 " state has relatively wide threshold voltage.

Yet, because the second programming operation is used program voltage pulse and a plurality of verification pulse as high calibration voltage, thus prevented from crossing programming, and the threshold voltage of " 00 " state distributes than the threshold voltage narrowly distributing of " X0 " state.When high calibration voltage is greater than low calibration voltage, " 00 " is higher than the minimum threshold voltage of " X0 " state thereby the minimum threshold voltage of state is moved, and the threshold voltage distribution range of " 00 " state is narrower than the threshold voltage ranges of " X0 " state.

In addition, because prevented from crossing programming, so pass through to use the second programming operation from " 01 " state of " 11 " state acquisition with by using the threshold voltage distribution range of each from " 10 " state of " X0 " state acquisition of the second programming operation narrower than the threshold voltage distribution range of " 11 " state or " X0 " state.

Therefore, according to apply the programmed method of carrying out repeatedly the exemplary embodiment of verification operation after operation at one-time programming voltage, can make the threshold voltage distribution range of each programming state of MLC in programming narrow down, and can prevent programming.

With reference to Figure 14 A and Figure 14 B, the first programming operation is applied to the storage unit of erase status, thereby the programming unit of erase status is programmed into the storage unit of the programming state of expectation.Next, the second programming operation is applied to the storage unit of the programming state of expectation, thereby the storage unit of the programming state of expectation is programmed into the storage unit of final programming state, to increase the minimum threshold voltage of the programming state of expectation, and reduces threshold voltage distribution range.By carrying out the programming state of the expectation of the first programming operation acquisition, can be middle programming state, and can obtain final programming state by carrying out the second programming operation, to increase minimum threshold voltage and to reduce threshold voltage distribution range.

In the first programming operation of the first programming operation based on describing to Figure 12 with reference to Figure 10, in the situation that the amplitude of program voltage increases gradually, comprise that one-time programming voltage applies operation and once uses a pair of operation of the verification operation of low calibration voltage to be repeated to carry out, until by using the verification of low calibration voltage.In the second programming operation of the programming operation based on describing to Fig. 5 with reference to Fig. 3 and the second programming operation of describing to Figure 12 with reference to Figure 10, in the situation that the amplitude of program voltage increases gradually, repeat and comprise that one-time programming voltage applies operation and the repeatedly a pair of operation of the verification operation of the continuous high calibration voltage of use, until use the verification of high calibration voltage to pass through.When carrying out repeatedly continuous verification operation, the amplitude of the high calibration voltage that uses can equate, or can reduce gradually as described above.As mentioned above, high calibration voltage can be than the large predetermined amplitude of low calibration voltage.

With reference to Figure 14 A, when storage unit is 4 layers of unit, the first programming operation is applied to the storage unit of " 11 " state, thereby first the storage unit of " 11 " state is programmed into " 01 " state, " 00 " state or " 10 " state.Next, with reference to Figure 14 B, the second programming operation is applied to the storage unit of " 01 " state that is first programmed for, " 00 " state or " 10 " state, thereby increase the minimum threshold voltage of " 01 " state, " 00 " state or " 10 " state, and reduce the threshold voltage distribution range of " 01 " state, " 00 " state or " 10 " state.

Therefore, due to the MLC programmed method that comprises the first programming operation and the second programming operation the threshold voltage of storage unit away from arrange threshold voltage time every execution one-time programming voltage apply operation and just carry out verification operation one time, and the threshold voltage of storage unit close to arrange threshold voltage time every execution one-time programming voltage apply operation and just carry out repeatedly verification operation, so can reduce whole programming times, programming can be prevented, and the threshold voltage distribution range of each programming state can be reduced.

According in the MLC programmed method of another exemplary embodiment, by in the situation that program voltage increases gradually, every execution one-time programming voltage applies operation and just carries out verification operation one time, until use the verification operation of the calibration voltage lower than the low calibration voltage using in the first programming operation, pass through, first the storage unit of erase status can be programmed into predetermined programming state (middle programming state), then by sequentially carrying out the first programming operation and the second programming operation, the storage unit of predetermined programming state can be programmed into final programming state, to increase the minimum threshold voltage of predetermined programming state and to reduce threshold voltage distribution range.

NAND flash memory is divided into the piece that wherein storage unit can be erased simultaneously, and each piece comprises a plurality of memory cell arrays.For example, NAND flash memory can be divided into 1024, and each piece in 1024 can comprise 8512 memory cell arrays.Memory cell array is divided into even arrays and odd number array, and even arrays and odd number array are connected to bit line.Read with programming operation in, can select to be connected to the storage unit of bit line (for example, even bitlines or odd bit lines) of same word line and same type to read and to programme simultaneously.The data formation logical page (LPAGE) that reads simultaneously or programme.For example,, if one comprises n word line, because each the word line in n word line can comprise even number and recto, so one can be stored at least 2n logical page (LPAGE).

Storage unit in piece can have 1 to 4 consecutive storage unit.In 4 adjacent storage unit, two can be arranged in identical NAND string, and all the other two can be arranged in adjacent NAND string.In order to reduce the grid coupling effect between consecutive storage unit, first page to particular memory location is programmed, first page to the storage unit adjacent with described particular memory location is programmed, and then the second page of described particular memory location is programmed.For storing the data of 2 logical page (LPAGE)s of cell stores of 2 Bit datas.

When use Figure 10 to the programmed method of Figure 12 by this NAND programming flash memory to single layer cell or use Figure 13 A to the MLC programmed method of Figure 14 B by this NAND programming flash memory during to MLC, the storage unit in can as described belowly going here and there to identical NAND programme to reduce the grid coupling effect between consecutive storage unit.

Figure 15 is illustrated in a part for a NAND string in the piece with a plurality of NAND strings.In Figure 15,5 storage unit are arranged in a NAND string.Yet each NAND string can comprise a plurality of storage unit.

In identical NAND string, there are two storage unit adjacent with particular memory location 400.

Can to the storage unit in identical NAND string, programme to reduce the grid coupling effect between consecutive storage unit by order below.

By using the first programming operation, particular memory location 400 is programmed, by using the first programming operation pair storage unit 402 adjacent with particular memory location 400, programme, then, by using the second programming operation to programme to particular memory location 400.Next, by using the first programming operation pair adjacent with storage unit 402 and relative with particular memory location 400 storage unit 406 to programme, then by using the second programming operation to programme to storage unit 402.Here, when storage unit is programmed into MLC, the second programming operation can only include with reference to Figure 13 A and apply to the every execution one-time programming voltage described in Figure 14 B the operation that verification operation is just carried out repeatedly in operation, or comprises that every execution one-time programming voltage applies operation and just carries out operation and every execution one-time programming voltage of a verification operation and apply the operation that verification operation is just carried out repeatedly in operation.

Table 1 shows the order that the storage unit to arranging in identical NAND string is programmed.

Table 1

When storage unit being programmed with said sequence, can prevent that after carrying out the second programming operation the threshold voltage ranges of very narrow storage unit is again widened when consecutive storage unit is programmed.Therefore, can keep the narrow threshold voltage by least using the first programming operation and the second programming operation subsequently to obtain to distribute.

As mentioned above, according to the method that flash memory devices is programmed of exemplary embodiment, use every execution one-time programming voltage to apply the processing that continuous several times verification operation is just carried out in operation.Therefore, can not can flash memory cell be carried out to programming because of contingent check for errors in the ISPP method general.Therefore, can more effectively reduce the skew of the threshold voltage of programming state.

Therefore, if the programmed method of usage example embodiment can reduce respectively the skew with the threshold voltage of the corresponding unit of recording status.Therefore, in multilevel-cell operation, identification record state separately.

Although shown in instructions and accompanying drawing and described exemplary embodiment, it should be appreciated by those skilled in the art, without departing from the principles and spirit of the present invention, can change the exemplary embodiment that illustrates and/or describe.

Claims (19)

1. a method of memory storage being programmed, described method comprises:

Execution comprises the first programming operation of the verification operation of using the first calibration voltage;

Execution comprises the second programming operation of the verification operation of using the second calibration voltage that is greater than the first calibration voltage, and wherein, after program voltage is applied to storage unit, every execution program voltage applies operation once, just carries out continuously repeatedly verification operation,

Wherein, in the first programming operation, repeat and comprise that one-time programming voltage applies a pair of operation of operation and a verification operation, until by using the verification operation of the first calibration voltage,

In the second programming operation, repeat and comprise that one-time programming voltage applies operation and the repeatedly a pair of operation of verification operation, until by using the verification operation of the second calibration voltage.

The method of claim 1, wherein the first calibration voltage than the low 0.2V of the second calibration voltage to 1.0V.

3. the method for claim 1, wherein to by using the storage unit of the verification operation of the first calibration voltage to carry out the second programming operation.

4. method as claimed in claim 3, wherein, the storage unit of erase status is carried out to the first programming operation, so that the storage unit of erase status is programmed to middle programming state, the storage unit of middle programming state is carried out to the second programming operation, so that the storage unit of middle programming state is programmed to final programming state.

5. method as claimed in claim 4, wherein, the storage unit after final programming state comprises three layers or more multi-layered.

6. method as claimed in claim 4, wherein, carries out the first programming operation to the storage unit of erase status, so that the storage unit of erase status is programmed to middle programming state,

The storage unit of middle programming state is carried out to the second programming operation, so that the storage unit of middle programming state is programmed to final programming state, to increase the minimum threshold voltage of middle programming state and to reduce threshold voltage distribution range.

7. method as claimed in claim 6, wherein, storage unit is 4 layers of unit, and erase status is " 11 " state, and final programming state is at least one in " 01 " state, " 00 " state and " 10 " state.

8. method as claimed in claim 6, wherein, in each of the first programming operation and the second programming operation, in the situation that little by little increasing program voltage, repeats and comprises that program voltage applies a pair of operation of operation and verification operation.

9. method as claimed in claim 8, wherein, the program voltage increment in the every step in the second programming operation is lower than the program voltage increment of the every step in the first programming operation.

10. method as claimed in claim 3, also comprise carrying out and comprise that use is lower than the 3rd programming operation of the verification operation of the calibration voltage of the first calibration voltage, wherein, the storage unit of erase status is repeated and comprises that one-time programming voltage applies a pair of operation of operation and a verification operation, until by using the verification operation lower than the calibration voltage of the first calibration voltage, so that the storage unit of erase status is programmed to middle programming state

Wherein, the first programming operation and the second programming operation are by the storage unit of programming state in the middle of being applied to continuously, so that the storage unit of middle programming state is programmed to final programming state, to increase the minimum threshold voltage of programming state and to reduce threshold voltage distribution range.

11. methods as claimed in claim 10, wherein, in each of the 3rd programming operation, the second programming operation and the first programming operation, in the situation that little by little increasing program voltage, repeat and comprise that program voltage applies a pair of operation of operation and verification operation.

12. methods as claimed in claim 11, wherein, the program voltage increment in the every step in the second programming operation is lower than the program voltage increment of the every step in the first programming operation.

13. methods as claimed in claim 10, wherein, storage unit is 4 layers of unit, and erase status is " 11 " state, and final programming state is at least one in " 01 " state, " 00 " state and " 10 " state.

The method of claim 1, wherein 14. carry out repeatedly verification operation with certain interval.

15. methods as claimed in claim 14, wherein, in the scope of described certain interval between 1 μ s and 100 μ s.

16. the method for claim 1, wherein storage unit be one of floating boom formula storage unit and charge-trapping formula storage unit.

17. methods as claimed in claim 4, wherein, the storage unit of erase status is employed the first programming operation, so that the storage unit of erase status is programmed to the middle programming state as mute state,

The storage unit of erase status is employed the second programming operation, so that the storage unit of erase status is programmed to the first programming state,

The storage unit of mute state is employed the second programming operation, so that the storage unit of mute state is programmed to the second or the 3rd programming state,

Wherein, mute state refers to the state that is not also used as programming state.

18. methods as claimed in claim 17, wherein, storage unit is 4 layers of unit, and erase status is " 11 " state, and the first to the 3rd programming state is respectively one of " 01 " state, " 00 " state and " 10 " state, and differs from one another.

19. methods as claimed in claim 17, wherein, in each of the first programming operation and the second programming operation, in the situation that little by little increase the amplitude of program voltage, repeat and comprise that program voltage applies a pair of operation of operation and verification operation.

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