CN101471632B - Self-bias low-voltage operation transconductance amplifier circuit with controllable loop gain - Google Patents
Self-bias low-voltage operation transconductance amplifier circuit with controllable loop gain Download PDFInfo
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- CN101471632B CN101471632B CN2007103038903A CN200710303890A CN101471632B CN 101471632 B CN101471632 B CN 101471632B CN 2007103038903 A CN2007103038903 A CN 2007103038903A CN 200710303890 A CN200710303890 A CN 200710303890A CN 101471632 B CN101471632 B CN 101471632B
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Abstract
The invention discloses a circuit of a self-bias low-voltage operational transconductance amplifier with adjustable loop gain and a loop gain control method. The self-bias low-voltage operational transconductance amplifier adopts a self-bias operational transconductance amplifier to provide a two-stage operational transconductance amplifier with a direct current bias, and provide the operational transconductance amplifier circuit with a partial positive feedback mechanism, thereby getting higher gain superior to a traditional operational amplifier; and the circuit gain thereof is controlled at the same time by adjusting the dimension proportion of a tail current tube of a differential input stage, thereby ensuring the stability and obtaining the optimized performance of the operational amplifier.
Description
Technical field
The present invention relates to the operation transconductance amplifier technical field, self-bias low-voltage operation transconductance amplifier circuit that particularly a kind of loop gain is controlled and loop gain control method.
Background technology
Along with the high speed development of large scale integrated circuit technology, operation transconductance amplifier is widely used in various simulations and the radio frequency integrated circuit.And because the high speed development of digital mobile communication technology, high performance operational amplifier has been widely used in A/D converter with high speed and high precision (Analogue-to-Digital Converters, ADCs) in, be one of core cell circuit in the high-performance pipeline ADC, its performance and power consumption directly have influence on the continuous working period of the overall performance and the mobile device of A/D converter.So the high performance operational amplifier design of low-power consumption is the focus of analog integrated circuit design studies always.
Be different from analog integrated circuit, the performance of digital circuitry strengthens along with reducing of device channel length, so the gate oxide thickness of transistor device is also more and more littler thereupon.In order to guarantee the useful life of enough device electric breakdown strength and chip, the working power voltage of deep submicron process device also decreases.And in order to save system power dissipation, present development trend be SOC (system on a chip) (System-on-a-chip, SOC), i.e. integrated analog circuit in the large scale digital circuit.The Design of Simulating Circuits that drops to of supply voltage has been brought great challenge.According to the prediction that international semiconductor TIA (SIA, Semiconductor Industry Association) makes, the supply voltage of low-power consumption chip in 2007 will be low to moderate 0.8V.
The basic functions of operation transconductance amplifier provides enough big small signal gain, reduces power supply power consumption simultaneously as much as possible.Traditional operation transconductance amplifier all is to adopt the structure of open loop cascade to realize high-gain, but the increase of cascade number has also increased the total power consumption of circuit simultaneously.And the operation transconductance amplifier of part positive feedback can increase the gain of operation transconductance amplifier significantly, by document " L.Bouzerara; M.T.Belaroussi; and B.Amirouche; Low-Voltage; Low-Power and High Gain CMOS OTA using ActivePositive Feedback with Feedforward and FDCM Techniques PROC.23rdINTERNATIONAL CONFERENCE ON MICROELECTRONICS (MIEL2002); VOL 2, YUGOSLAVIA, 12-15 MAY, 2002 " described; that the operational amplifier of the employing part positive feedback of author designed can be significantly be increased to 90dB with the gain of the operation transconductance amplifier of open loop by 11dB, keeps phase margin constant substantially simultaneously.Therefore, adopt the part positive feedback technique to realize that the operation transconductance amplifier of low-power consumption high-gain is an optional approach.
But adopt the part positive feedback technique may bring the problem of stability.Generally can introduce the loop of a positive feedback in circuit inside because adopt the operation transconductance amplifier of part positive feedback technique, if the low frequency of this positive feedback or high-frequency gain are greater than unit gain, then the computing meeting is vibrated even is lost function fully, therefore will pay special attention to its loop stability when adopting the part positive feedback technique to design operation transconductance amplifier.
And along with the progress of deep submicron process, the channel dimensions of device is shorter and shorter, and the precision of photoetching is more and more harsher, and the technology of bringing is thus floated also increasing.This has just brought inconceivable difficulty to Design of Simulating Circuits.In order to guarantee that product reaches certain yield and improves product profit, Design of Simulating Circuits must be reserved enough nargin and satisfy the requirement that technology is floated, but the decline that also can bring circuit performance like this.
Operation transconductance amplifier provided by the invention, the biasing circuit of employing automatic biasing provides the direct current biasing of differential input stage, verified, the loop of this circuit is positive feedback, therefore must carry out necessary control to satisfy its stable requirement to the loop gain of circuit inside.The control method of loop gain of the present invention is utilized the loop gain of recently reasonably controlling operation transconductance amplifier of size of the tail current MOS transistor of differential input stage, when the chip flow is finished, can adopt fuse or switching tube technology, the loop gain of operational amplifier is controlled in the limited field that guarantees system stability, the open-loop gain of while maximization operation trsanscondutance amplifier, make the gain/power consumption ratio of operation transconductance amplifier reach maximum, optimized the performance of operation transconductance amplifier fully.
Summary of the invention
(1) technical problem that will solve
In view of this, main purpose of the present invention is to provide controlled self-bias low-voltage operation transconductance amplifier circuit of a kind of loop gain and loop gain control method, to guarantee the stability of operation transconductance amplifier circuit, improve the performance of operation transconductance amplifier circuit.
(2) technical scheme
In order to achieve the above object, technical scheme of the present invention is achieved in that
The self-bias low-voltage operation transconductance amplifier circuit that a kind of loop gain is controlled, this circuit is made of a biasing circuit 11, a differential input stage circuit 12, an output-stage circuit 13 and a two-stage amplifier offset circuit 14; Described dual-stage amplifier compensating circuit (14) comprises resistance R 0 and capacitor C c for the closed loop phase margin of described biasing circuit (11) compensates; Wherein:
Described biasing circuit 11 comprises PMOS transistor PM0 and PM1 and nmos pass transistor NM0 and NM1; Wherein, the drain electrode of the grid of NM1, the grid of NM0 and drain electrode and PM0 directly is coupled, the grid of PM2, PM3 directly is coupled in the drain electrode of the grid of PM1 and drain electrode, NM1 and the described differential input stage circuit 12, the source electrode of PM0 and PM1 is connected with reference power source, and the source electrode of NM0 and NM1 is connected with reference ground;
Described differential input stage circuit 12 comprises nmos pass transistor NM2, NM3, NM5 and NM6, and PMOS transistor PM2 and PM3; Wherein the grid of PM1 directly is connected in the grid of PM2 and PM3 and the described biasing circuit 11, and the drain electrode of PM2 is connected with the drain electrode of NM2, and the drain electrode of PM3 is connected with the drain electrode of NM3, and the source electrode of PM2 and PM3 is connected with reference power source; The grid of NMOS pipe NM2 and NM3 is the differential input end mouth of described self-bias low-voltage operation transconductance amplifier circuit, the drain electrode of NM2 is connected with the drain electrode of PM2 and the grid of NM5 respectively, the drain electrode of NM3 is connected with the drain electrode of PM3 and the grid of NM6 respectively, simultaneously, the drain electrode of NM3 also is connected with resistance R 0 one ends of described dual-stage amplifier compensating circuit 14, the other end of R0 directly is connected with the end of capacitor C c, and the other end of Cc and the drain electrode of NM4 are that the output port of amplifier circuit is connected; The source electrode of NM2 and the drain electrode of NM5 directly are coupled, and the source electrode of NM3 and the drain electrode of NM6 directly are coupled;
The input pipe of described output-stage circuit 13 is nmos pass transistor NM4, and the grid of NM4 directly is connected with the drain electrode of NM3; The PMOS transistor PM4 that the load pipe connects for the diode form, the drain electrode of PM4 is connected with the drain electrode of grid and NM4, and is coupled to the grid of PM0 in the described biasing circuit 11, and the source electrode of PM4 is connected with reference power source, and the source electrode of NM4 is connected with reference ground.
In the such scheme, described nmos pass transistor NM5 and NM6 are the tail current pipe, and this tail current pipe NM5 and NM6 provide dc bias current for described differential input stage circuit 12.
In the such scheme, described output-stage circuit 13 is a simple common-source amplifier, and described transistor PM4 provides electric current for described biasing circuit 11.
In the such scheme, described biasing circuit 11 provides the direct current biasing of differential input stage circuit 12, make differential input stage circuit 12 that sufficiently high small signal gain is provided, the input small-signal amplifies through differential input stage circuit 12, output signal is further amplified and lower output impedance is provided through output-stage circuit 13, the direct current biasing of biasing circuit 11 is then provided by output-stage circuit 13, forms the operation transconductance amplifier circuit of an automatic biasing.
(3) beneficial effect
From technique scheme as can be seen, the present invention has following beneficial effect:
1, the self biased operational transconductance amplifier circuit with part positive feedback mechanism provided by the invention, not only saved the required external current source of amplifier, and the loop gain of utilizing described operation transconductance amplifier depends on the characteristic of ratio of the size of input stage tail current pipe, can adjust the loop gain of operation transconductance amplifier according to the requirement and the condition of work of reality, make circuit can realize optimum performance.
2, the control method of loop gain provided by the invention is utilized the loop gain of recently reasonably controlling operation transconductance amplifier of size of the tail current MOS transistor of differential input stage, when the chip flow is finished, can adopt fuse or switching tube technology, the loop gain of operational amplifier is controlled in the limited field that guarantees system stability, the open-loop gain of while maximization operation trsanscondutance amplifier, make the gain/power consumption ratio of operation transconductance amplifier reach maximum, optimized the performance of operation transconductance amplifier fully, guarantee the stability of operation transconductance amplifier circuit, improved the performance of operation transconductance amplifier circuit.
3, the present invention is on traditional open loop operational amplifier design cycle, the operational amplifier of design provides the automatic biasing structure of part positive feedback, the bias current of described self biased operational trsanscondutance amplifier is provided by self output-stage circuit, need not any external current source.Described self biased operational trsanscondutance amplifier has formed a loop structure in inside, for between the stability of circuit and performance, do one well compromise, the ratio of tail current pipe size that can be by adjusting the differential input stage circuit can select suitable loop gain to satisfy different designing requirements.
Description of drawings
Fig. 1 is the circuit diagram of self biased operational trsanscondutance amplifier provided by the invention;
Fig. 2 is a self biased operational trsanscondutance amplifier small-signal equivalent schematic provided by the invention;
Fig. 3 is the loop gain curve that self biased operational trsanscondutance amplifier provided by the invention changes with temperature and technology corner; Wherein, import the small signal amplitudes normalizing to 1V, a=0.9;
Fig. 4 is the loop gain curve of self biased operational trsanscondutance amplifier provided by the invention with temperature and supply voltage; Wherein, input small signal amplitudes normalizing is to 1V;
Fig. 5 is the open-loop gain curve that self biased operational trsanscondutance amplifier provided by the invention changes with supply voltage and loop gain Control Parameter a; Wherein, input small signal amplitudes normalizing is to 1V.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
As shown in Figure 1, Fig. 1 is the circuit diagram of self biased operational trsanscondutance amplifier provided by the invention, and this circuit is made of a biasing circuit 11, a differential input stage circuit 12, an output-stage circuit 13 and a two-stage amplifier offset circuit 14.
Wherein, described biasing circuit 11 comprises PMOS transistor PM0 and PM1, and nmos pass transistor NM0 and NM1; Wherein, the drain electrode of the grid of NM1, the grid of NM0 and drain electrode and PM0 directly is coupled, the grid of PM2, PM3 directly is coupled in the drain electrode of the grid of PM1 and drain electrode, NM1 and the described differential input stage circuit 12, the source electrode of PM0 and PM1 is connected with reference power source, and the source electrode of NM0 and NM1 is connected with reference ground.
Biasing circuit 11 provides the direct current biasing of differential input stage circuit 12, make differential input stage circuit 12 that sufficiently high small signal gain can be provided, the input small-signal amplifies through differential input stage circuit 12, output signal is further amplified and lower output impedance is provided through output-stage circuit 13, the direct current biasing of biasing circuit 11 is then provided by output-stage circuit 13, formed the operation transconductance amplifier of an automatic biasing like this, for control loop gain and reduction circuit power consumption, described biasing circuit 11 provides a current gain k.
Described differential input stage circuit 12 comprises nmos pass transistor NM2, NM3, NM5 and NM6, and PMOS transistor PM2 and PM3; Wherein the grid of PM1 directly is connected in the grid of PM2 and PM3 and the described biasing circuit 11, and drain electrode is connected with the drain electrode of NM2, NM3 respectively, and source electrode is connected with reference power source; The grid of NMOS pipe NM2 and NM3 is the differential input end mouth of described self-bias low-voltage operation transconductance amplifier circuit, drain electrode is connected with the drain electrode of PM2 and PM3 and the grid of NM5 and NM6 respectively, simultaneously, the drain electrode of NM3 also is connected with resistance one end of described dual-stage amplifier compensating circuit 14; The drain electrode of the source electrode of NM2 and NM3 and NM5 and NM6 directly is coupled.
Described nmos pass transistor NM5 and NM6 are the tail current pipe, and this tail current pipe NM5 and NM6 provide dc bias current for described differential input stage circuit 12.The drain electrode of tail current pipe NM5 and NM6 links to each other with the source electrode of difference input to NM2 and NM3 respectively, grid links to each other with the drain electrode of NM2 and NM3 respectively, this structure provides the common-mode feedback of differential input stage circuit 12, when the output common mode signal of difference input stage circuit 12 increases, the control tail current also increases thereupon, the negative feedback mechanism of common-mode feedback is started working then, and impels the output common mode level to reduce, and has guaranteed the operate as normal of circuit.
The input pipe of described output-stage circuit 13 is nmos pass transistor NM4, and grid directly is connected with the drain electrode of NM3; The PMOS transistor PM4 that the load pipe connects for the diode form, the drain electrode of PM4 is connected with the drain electrode of grid and NM4, and is coupled to the grid of PM0 in the described biasing circuit 11, for biasing circuit provides electric current, the source electrode of PM4 is connected with reference power source, and the source electrode of NM4 is connected with reference ground.Described output-stage circuit 13 is a simple common-source amplifier, and described transistor PM4 provides electric current for described biasing circuit 11.Described output-stage circuit 13 provides voltage gain hardly, but it has reduced input impedance, makes the operation transconductance amplifier of design have bigger driving force, and it provides the current gain from the operation transconductance amplifier to the biasing circuit simultaneously.
Described dual-stage amplifier compensating circuit 14 is used to the closed loop phase margin of described biasing circuit 11 to compensate, comprise resistance R 0 and capacitor C c, wherein the end of R0 and Cc directly is connected, the other end of R0 is connected with the drain electrode of NM3, and the other end of Cc and the drain electrode of NM4 are that the output port of amplifier is connected.The Miller capacitance that compensating circuit 14 employings are traditional and the zero suppression resistance of series connection compensate second dominant pole and the RHP of self biased operational amplifier zero point, for operation transconductance amplifier has been reserved abundant phase margin, the phase margin of general operation transconductance amplifier is set to about 60 degree, between step response and stability, do one and trade off preferably, guaranteed the steady operation of circuit simultaneously.
Described biasing circuit 11 provides the direct current biasing of differential input stage circuit 12, make differential input stage circuit 12 that sufficiently high small signal gain is provided, the input small-signal amplifies through differential input stage circuit 12, output signal is further amplified and lower output impedance is provided through output-stage circuit 13, the direct current biasing of biasing circuit 11 is then provided by output-stage circuit 13, forms the operation transconductance amplifier of an automatic biasing.
Below the structure of circuit is made a labor.This circuit form is similar to traditional two-stage calculation trsanscondutance amplifier structure, and different is that the electric current that its biasing circuit provides is by the direct mirror image of the output stage of operation transconductance amplifier, therefore must the loop characteristics of this amplifier be performed an analysis.Described in " analog cmos integrated circuit (IC) design " book of being shown according to Behzad Razavi, this operation transconductance amplifier is done small-signal analysis, promptly replace all transistors, thereby obtain the electrical characteristic of circuit with small-signal model.
The small-signal model of amplifier is the small-signal schematic diagram of amplifier, wherein gm as shown in Figure 2 as shown above
1Be amplifier input pipe NM2, the mutual conductance of NM3, gm
2Be NM5, NM
6Mutual conductance, gm
3Be the mutual conductance of PM0, gm
4Be the mutual conductance of second level input pipe NM4, g
4Be the mutual conductance of second level load pipe PM4, R
01, R
02, R
03Be respectively gm
1, gm
2, gm
3Output impedance, clear for the derivation of equation below making, make g
1,2,3=1/R
01,02,03Differential signal v with input
InnAnd v
InpRegard two independently signal drivings as, therefore can calculate output with the addition method.At first make v
InpBe zero, obtain V then
InnTo output voltage influence.Then can obtain following equation group by top schematic diagram:
Obtain following four formulas:
gm
1(V
inn-V
t)+g
1(V
1-V
t)+g
3V
1+k×gm
3×V
out＝0 (1)
gm
1(0-V
t)+g
1(V
2-V
t)+g
3V
2+kgm
3V
out＝0 (2)
gm
2(V
1+V
2)+g
2V
t+g
3(V
1+V
2)+2kgm
3V
out＝0 (3)
g
4×V
out+gm
4×V
2＝0 (4)
K=(S wherein
PM2* S
NM1)/(S
PM1* S
NM0) the expression electric current is through a series of proportionality coefficients that duplicate, S represents the breadth length ratio of metal-oxide-semiconductor, can solve:
V
out/V
inn＝(g
3+g
m2)/(2×(g
3+g
m2)+(g
1+g
3+k×A×gm
3)/(g
1+gm
1)×g
2+2×k×A×gm
3) (5)
Because g
1, g
2, g
3Much smaller than gm
1, gm
2, gm
3, gm
4, abbreviation obtains:
V
out/V
inn＝-0.5×gm
4×gm
1/g
4/(g
1+g
3)×(1-k×A×gm
4×gm
3/g
4/gm
2) (6)
In like manner can obtain Vinp to output voltage influence:
V
out/V
inp＝-0.5×gm
4×gm
1/g
4/(g
1+g
3)×(1-k×A×gm
4×gm
3/g
4/gm
2) (7)
Can obtain by formula (6) and (7):
V
out/(V
inp-V
inn)＝-0.5×gm
4×gm
1/g
4/(g
1+g
3)×(1-k×A×gm
4×gm
3/g
4/gm
2) (8)
Formula (8) is the small signal gain of tail current pipe when equating, as seen, this gain expressions is that with the difference of the expression formula of traditional two-stage calculation trsanscondutance amplifier its coefficient is different.
Consider now when the tail current pipe size of input stage circuit (12) not simultaneously, suppose that positive input terminal (is V
Inn) under tail current pipe and negative input end (be V
Inp) size be respectively a * S and S, then have gain expressions as follows:
A＝-0.5×gm
NM2×gm
NM4/(g
0，NM2+g
0，PM2)/gm
PM4/(1-(S
PM2，3×S
NM1)/(S
PM1×S
NM0)×gm
NM4×gm
PM0/(gm
PM4×gm
NM5)) (9)
Because following formula is comparatively complicated, can the following formula conversion is as follows:
A＝0.5×A
0/(1-(1+a)/(1+SQRT(a))) (10)
Wherein, A
0Be the open-loop gain sum of differential input stage (12) and input stage (13), SQRT () is the square root calculation function.Because the operation transconductance amplifier of design is an automatic biasing, there are three loops in this amplifier: the difference input pipe of input stage adds that drain terminal has constituted preceding two feedback loops to the common mode feedback circuit of tail current source NMOS tube grid; After the 3rd loop comprises that then output voltage feeds back to PM0, get back to starting point through load pipe PM3 and output stage again through biasing circuit, this loop is positive feedback by analysis.Gain causes the unstable and even vibration of circuit greater than 1 positive feedback meeting, and therefore, we must guarantee that the loop gain of this feedback is less than 1.
The calculating of loop gain (loop gain is hereinafter to be referred as af) is generally carried out with following method.With the input small-signal zero setting of amplifier, in certain some open-loop, inject a test small-signal at bias point (grid of PM0), make signal along loop up to another one breakpoint (being the output point of output stage), we obtain a magnitude of voltage.The negative value of the transfer function of Dao Chuing is exactly loop gain T like this, and the loop gain expression formula that adopts the af method to obtain is as follows:
T＝(1+a)/(1+SQRT(a)) (11)
Bring (11) formula into (10) formula, can get:
A＝0.5×A
0/(1-T) (12)
By formula (12) as seen, the open-loop gain of the operational amplifier of design depends on the loop gain of its automatic biasing structure, when a equals 1, loop gain T equals 1, and this moment, the open-loop gain of operation transconductance amplifier was infinitely great, when the direction of a from 1 towards zero reduces, the open-loop gain of described amplifier also reduces thereupon, and level off to 0 the time as a, described loop gain is 0, the open-loop gain of amplifier equals half of traditional two-stage trsanscondutance amplifier gain simultaneously.As seen, the selection of loop gain has influenced the open-loop gain of circuit.
And because the unsteady of technology is a random process, in order to reserve sufficient design margin, just loop gain must be controlled at below 1, and the stability of the more little then circuit of loop gain is also good more, but the thing followed is circuit open-loop gain and even performance decrease.
By shown in Figure 3, the loop gain of the self biased operational trsanscondutance amplifier that described loop gain is controlled is with temperature and technology corner change curve, as can be seen from the figure, when the ratio a of the size of tail current pipe equals 0.9, under different temperature and technology corner, the loop gain of described amplifier is stabilized in about 0.75.
By shown in Figure 4, described self biased operational trsanscondutance amplifier is with the loop gain curve of temperature and supply voltage, when the ratio a of the size of tail current pipe equaled 0.9, under different temperature and supply voltage, the loop gain of described amplifier was stabilized in about 0.75 equally.
By Fig. 4 and Fig. 5 as can be seen, the loop gain of described amplifier circuit does not change with the conversion of temperature, technology corner and supply voltage, has guaranteed the stable of when loop gain is controlled circuit.
The open-loop gain curve that the self biased operational trsanscondutance amplifier changes with supply voltage and loop gain Control Parameter a, as can be seen from the figure, when a from 1 when 0 direction reduces gradually, the loop gain of circuit is also along with reducing, the open-loop gain of described amplifier increases simultaneously.
Because the ratio of control tail current pipe size, may increase the input offset voltage of described operation transconductance amplifier, the employing Monte Carlo Analysis has been carried out analysis and emulation to the offset voltage of described amplifier when emulation, proves that the input offset voltage influence of described loop gain control pair amplifier when low power dissipation design can be ignored.
By document " Wang Han, Ye Qing, 0.6V design of the CMOS a reference source of supply voltage and stability analysis, the semiconductor journal, the 27th volume, in August, 2006, the 1508th page to the 1513rd page " the middle controlled self biased operational trsanscondutance amplifier design cycle of this loop gain of the present invention that adopts, the ratio a of the size of tail current pipe is set to 0.95, the operation transconductance amplifier that adopts SMIC 0.18umCMOS mixed signal technology to realize can be operated under the supply voltage of 0.4V, the DC current gain of described operation transconductance amplifier is 58dB when supply voltage is 0.5V, and unity gain bandwidth is 13.5kHz, and power consumption is 85nW.The result verification of chip flow the correctness of this flow process.
Therefore operation transconductance amplifier of the present invention can pass through the control to parameter a, thereby reaches the purpose of controlling its loop gain flexibly.According to different technology and designing requirement, described operation transconductance amplifier can be arranged on the loop gain of circuit the scope edge that stability is considered, thereby makes the performance of circuit reach optimum.
So far, be appreciated that, the controlled operation transconductance amplifier circuit of this loop gain provided by the invention, the operation transconductance amplifier of employing automatic biasing provides the direct current biasing of two-stage calculation trsanscondutance amplifier, provide the part positive feedback mechanism for operation transconductance amplifier circuit simultaneously, by the ratio of differential input stage tail current pipe size is controlled its loop gain, thereby between circuit stability and performance, obtain optimum compromise.
Based on the controlled operation transconductance amplifier circuit of this loop gain of the present invention, the present invention also provides a kind of loop gain control method that realizes the self biased operational transconductance amplifier circuit, and this method comprises:
Design difference input stage circuit, the required bias current of load current mirror is produced by ideal current source, identical tail current pipe NM5 and the NM6 of while design size, make differential input stage that certain gain can be provided and for second level output-stage circuit provides the direct current biasing point, can provide certain common-mode feedback for differential input stage according to the said structure design simultaneously;
The design output-stage circuit makes the two-stage calculation trsanscondutance amplifier that enough small signal gains can be provided;
Select suitable resistance and electric capacity to make the operation transconductance amplifier under the open loop form that abundant phase margin can be provided;
The load pipe of ideal current source in the biasing circuit with output stage replaced, form a loop, because this circuit of existence of common-mode feedback can steady operation;
Adjust resistance and electric capacity in the compensating circuit, make that the operation transconductance amplifier under the loop form has enough phase margins;
Adjust tail current pipe size example in the differential input stage, also change the loop gain and the open-loop gain of amplifier simultaneously.
This control method is different from general open loop operational amplifier design cycle, the bias current of described self biased operational trsanscondutance amplifier is provided by self output-stage circuit, described self biased operational trsanscondutance amplifier has formed a loop structure in inside, the ratio of the tail current pipe size by adjusting the differential input stage circuit can select suitable loop gain to satisfy different designing requirements.
This circuit is the self biased operational trsanscondutance amplifier that need not the outside reference current source, and the direct current that its load needs is provided by operation transconductance amplifier itself, and auto bias circuit has formed loop in operation transconductance amplifier inside.
Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (4)
1. the self-bias low-voltage operation transconductance amplifier circuit that loop gain is controlled is characterized in that, this circuit is made of a biasing circuit (11), a differential input stage circuit (12), an output-stage circuit (13) and a two-stage amplifier offset circuit (14); Described dual-stage amplifier compensating circuit (14) comprises resistance R 0 and capacitor C c for the closed loop phase margin of described biasing circuit (11) compensates; Wherein:
Described biasing circuit (11) comprises PMOS transistor PM0 and PM1 and nmos pass transistor NM0 and NM1; Wherein, the drain electrode of the grid of NM1, the grid of NM0 and drain electrode and PM0 directly is coupled, the grid of PM2, PM3 directly is coupled in the drain electrode of the grid of PM1 and drain electrode, NM1 and the described differential input stage circuit (12), the source electrode of PM0 and PM1 is connected with reference power source, and the source electrode of NM0 and NM1 is connected with reference ground;
Described differential input stage circuit (12) comprises nmos pass transistor NM2, NM3, NM5 and NM6, and PMOS transistor PM2 and PM3; Wherein the grid of PM2 and PM3 directly is connected with the grid of the middle PM1 of described biasing circuit (11), and the drain electrode of PM2 is connected with the drain electrode of NM2, and the drain electrode of PM3 is connected with the drain electrode of NM3, and the source electrode of PM2 and PM3 is connected with reference power source; The grid of NMOS pipe NM2 and NM3 is the differential input end mouth of described self-bias low-voltage operation transconductance amplifier circuit, the drain electrode of NM2 is connected with the drain electrode of PM2 and the grid of NM5 respectively, the drain electrode of NM3 is connected with the drain electrode of PM3 and the grid of NM6 respectively, simultaneously, the drain electrode of NM3 also is connected with resistance R 0 one ends of described dual-stage amplifier compensating circuit (14), the other end of R0 directly is connected with the end of capacitor C c, and the other end of Cc and the drain electrode of NM4 are that the output port of amplifier circuit is connected; The source electrode of NM2 and the drain electrode of NM5 directly are coupled, and the source electrode of NM3 and the drain electrode of NM6 directly are coupled;
The input pipe of described output-stage circuit (13) is nmos pass transistor NM4, and the grid of NM4 directly is connected with the drain electrode of NM3; The PMOS transistor PM4 that the load pipe connects for the diode form, the drain electrode of PM4 is connected with the drain electrode of grid and NM4, and being coupled to the grid of PM0 in the described biasing circuit (11), the source electrode of PM4 is connected with reference power source, is connected to the source electrode of NM4 and reference.
2. the controlled self-bias low-voltage operation transconductance amplifier circuit of loop gain according to claim 1, it is characterized in that, described nmos pass transistor NM5 and NM6 are the tail current pipe, and this tail current pipe NM5 and NM6 are that described differential input stage circuit (12) provides dc bias current.
3. the controlled self-bias low-voltage operation transconductance amplifier circuit of loop gain according to claim 1 is characterized in that, described output-stage circuit (13) is a simple common-source amplifier, and described transistor PM4 is that described biasing circuit (11) provides electric current.
4. the controlled self-bias low-voltage operation transconductance amplifier circuit of loop gain according to claim 1, it is characterized in that, described biasing circuit (11) provides the direct current biasing of differential input stage circuit (12), make differential input stage circuit (12) that sufficiently high small signal gain is provided, the input small-signal amplifies through differential input stage circuit (12), output signal is further amplified and lower output impedance is provided through output-stage circuit (13), the direct current biasing of biasing circuit (11) is then provided by output-stage circuit (13), forms the operation transconductance amplifier circuit of an automatic biasing.
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| CN2007103038903A CN101471632B (en) | 2007-12-26 | 2007-12-26 | Self-bias low-voltage operation transconductance amplifier circuit with controllable loop gain |
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| CN2007103038903A CN101471632B (en) | 2007-12-26 | 2007-12-26 | Self-bias low-voltage operation transconductance amplifier circuit with controllable loop gain |
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| CN101471632B true CN101471632B (en) | 2011-07-20 |
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