CN101615608B - 半导体器件及其制造方法 - Google Patents
半导体器件及其制造方法 Download PDFInfo
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- CN101615608B CN101615608B CN2009101411240A CN200910141124A CN101615608B CN 101615608 B CN101615608 B CN 101615608B CN 2009101411240 A CN2009101411240 A CN 2009101411240A CN 200910141124 A CN200910141124 A CN 200910141124A CN 101615608 B CN101615608 B CN 101615608B
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- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 24
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- 229910000914 Mn alloy Inorganic materials 0.000 description 1
- 239000004721 Polyphenylene oxide Substances 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- ICBUGLMSHZDVLP-UHFFFAOYSA-N [Si]=O.[Mn] Chemical compound [Si]=O.[Mn] ICBUGLMSHZDVLP-UHFFFAOYSA-N 0.000 description 1
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- DNNSSWSSYDEUBZ-UHFFFAOYSA-N krypton atom Chemical compound [Kr] DNNSSWSSYDEUBZ-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- 229910052754 neon Inorganic materials 0.000 description 1
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- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
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- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
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- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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Abstract
Description
Claims (12)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008165449A JP5343417B2 (ja) | 2008-06-25 | 2008-06-25 | 半導体装置およびその製造方法 |
JP2008165449 | 2008-06-25 | ||
JP2008-165449 | 2008-06-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101615608A CN101615608A (zh) | 2009-12-30 |
CN101615608B true CN101615608B (zh) | 2012-05-09 |
Family
ID=41446406
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009101411240A Expired - Fee Related CN101615608B (zh) | 2008-06-25 | 2009-05-22 | 半导体器件及其制造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8067836B2 (zh) |
JP (1) | JP5343417B2 (zh) |
KR (1) | KR101116785B1 (zh) |
CN (1) | CN101615608B (zh) |
TW (1) | TWI389209B (zh) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5507909B2 (ja) * | 2009-07-14 | 2014-05-28 | 東京エレクトロン株式会社 | 成膜方法 |
US8852674B2 (en) | 2010-11-12 | 2014-10-07 | Applied Materials, Inc. | Method for segregating the alloying elements and reducing the residue resistivity of copper alloy layers |
US8461683B2 (en) * | 2011-04-01 | 2013-06-11 | Intel Corporation | Self-forming, self-aligned barriers for back-end interconnects and methods of making same |
KR20120138074A (ko) * | 2011-06-14 | 2012-12-24 | 삼성디스플레이 주식회사 | 박막 트랜지스터, 및 박막 트랜지스터 표시판과 이들을 제조하는 방법 |
CN102437144A (zh) * | 2011-12-06 | 2012-05-02 | 西安交通大学 | 一种Ru-RuO/Ru-Ge-Cu自形成双层非晶扩散阻挡层及其制备方法 |
US8765602B2 (en) | 2012-08-30 | 2014-07-01 | International Business Machines Corporation | Doping of copper wiring structures in back end of line processing |
US20140061915A1 (en) * | 2012-08-30 | 2014-03-06 | International Business Machines Corporation | Prevention of thru-substrate via pistoning using highly doped copper alloy seed layer |
US10396012B2 (en) * | 2016-05-27 | 2019-08-27 | International Business Machines Corporation | Advanced through substrate via metallization in three dimensional semiconductor integration |
US9786605B1 (en) | 2016-05-27 | 2017-10-10 | International Business Machines Corporation | Advanced through substrate via metallization in three dimensional semiconductor integration |
US10312181B2 (en) | 2016-05-27 | 2019-06-04 | International Business Machines Corporation | Advanced through substrate via metallization in three dimensional semiconductor integration |
EP3768646A1 (en) * | 2018-04-20 | 2021-01-27 | Corning Incorporated | Systems and methods for adhering copper interconnects in a display device |
US20220005860A1 (en) * | 2018-12-04 | 2022-01-06 | Sony Semiconductor Solutions Corporation | Semiconductor apparatus and electronic equipment |
KR102192311B1 (ko) * | 2019-02-19 | 2020-12-17 | 성균관대학교산학협력단 | 구리 인터커넥터, 이의 제조방법 및 이를 포함하는 반도체 장치 |
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US20050156315A1 (en) * | 2002-01-24 | 2005-07-21 | Lee Eal H. | Thin films, structures having thin films, and methods of forming thin films |
US6664185B1 (en) * | 2002-04-25 | 2003-12-16 | Advanced Micro Devices, Inc. | Self-aligned barrier formed with an alloy having at least two dopant elements for minimized resistance of interconnect |
JP2007158369A (ja) * | 2002-11-01 | 2007-06-21 | Nec Corp | 磁気抵抗デバイス及びその製造方法 |
US7144802B2 (en) * | 2003-04-01 | 2006-12-05 | Texas Instruments Incorporated | Vapor deposition of benzotriazole (BTA) for protecting copper interconnects |
JP4478038B2 (ja) * | 2004-02-27 | 2010-06-09 | 株式会社半導体理工学研究センター | 半導体装置及びその製造方法 |
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US7855147B1 (en) * | 2006-06-22 | 2010-12-21 | Novellus Systems, Inc. | Methods and apparatus for engineering an interface between a diffusion barrier layer and a seed layer |
WO2008007732A1 (en) * | 2006-07-14 | 2008-01-17 | Ulvac, Inc. | Method for manufacturing semiconductor device |
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JP5141683B2 (ja) * | 2007-03-27 | 2013-02-13 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
JP5326558B2 (ja) * | 2008-12-26 | 2013-10-30 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
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