CN101638211A - Integrated three-dimensional stacked package structure and manufacturing method thereof - Google Patents

Integrated three-dimensional stacked package structure and manufacturing method thereof Download PDF

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Publication number
CN101638211A
CN101638211A CN200810131238A CN200810131238A CN101638211A CN 101638211 A CN101638211 A CN 101638211A CN 200810131238 A CN200810131238 A CN 200810131238A CN 200810131238 A CN200810131238 A CN 200810131238A CN 101638211 A CN101638211 A CN 101638211A
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substrate
circuit layout
micro
integrated
package structure
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谢佑圣
林靖渊
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Industrial Technology Research Institute ITRI
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Industrial Technology Research Institute ITRI
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Abstract

The invention discloses an integrated three-dimensional stacked package structure for a microelectronic and micro electro-mechanical component, which comprises an initiative special integrated circuitunit and a micro electro-mechanical unit. The active specific integrated circuit unit comprises a first substrate and a circuit layout arranged on the first substrate, wherein one surface, on which no circuit layout is arranged, of the substrate is provided with a depression and the active specific integrated circuit unit is provided with at least one through hole. The micro electro mechanical system unit comprises a second substrate and a micro inductor arranged on one surface of the second substrate. When the active specific integrated circuit unit is jointed with the micro electro mechanical system unit, the micro inductor is accommodated in the depression and the through hole is filled with a conducting material, so that the active specific integrated circuit unit and the micro electro mechanical system unit can be electrically connected.

Description

Integrated three-dimensional stacked package structure and manufacture method thereof
Technical field
The present invention relates to a kind of three-dimensional stacked package structure and method thereof, particularly relate to a kind of integrated three-dimensional stacked package structure and manufacture method thereof that is used for microelectronics and electric component of microcomputer.
Background technology
Because the rise of the electronic installation of Mobile Communications and individualized audio-visual amusement, its function is also become stronger day by day.For example need carry equipment such as camera, walkman, PDA, GPS, mobile phone in the past, the function that could have photography, audio-visual amusement, personal information management, navigation and communication simultaneously, can realize simultaneously on intelligent mobile phone nearly all that now therefore following individual's accompanied electronic equipment must be light, thin, short, little and powerful.And micro electronmechanical in recent years (MEMS) assembly also has significant progress, also be applied on the mobile phone as mini microphone and acceleration metric, similarly be that MEMS assemblies miscellaneous such as the assembly of RF MEMS and minisize gyroscopes also will be integrated among the mobile phone future, for mobile phone provides more strong functions.In order to reach above-mentioned purpose, how more effective, more cheap, thinner, littler component package technology is done in various asic cells (ASIC) on the mobile phone and micro electronmechanical unit (MEMS) and play a very important role.
The traditional MEMS assembly is a tool " intelligence " not, the meaning is the structure that sensing is only arranged on the traditional MEMS assembly, but do not amplify, read the circuit with logical operation,, then must combine with the ASIC of collocation therefore if will realize the intelligent sensing function of MEMS assembly.
In addition; the MEMS assembly is because have responsive fragile fine motion structure on it; for example sensing film (as gas sensor or biochemical sensor etc.) or movable stereochemical structure (as mini microphone, miniature acceleration rule, pressure sensor, minisize gyroscopes etc.) all need the suitable encapsulation could be with these responsive fragile fine motion structural defences.
Past will be independently the integration mode of MEMS assembly and ASIC, normally mix (hybrid) mode, be incorporated within the encapsulation, for example United States Patent (USP) US6809412 number and United States Patent (USP) are US6781231 number.Other packaged type covers on the MEMS assembly then for making the superstructure with depression earlier, and the dented space of loam cake and MEMS assembly can constitute the chamber (for example United States Patent (USP) is US6452238 number) of a fine motion structure on the protection MEMS assembly
See also Fig. 1, it is the stacked structure profile of existing asic cell (ASIC) with micro electronmechanical unit (MEMS).This stacked structure comprises an asic cell 10, a loam cake 11 and a micro electronmechanical unit 12, and this asic cell 10 is stacked on the loam cake 11, and this loam cake 11 is stacked on the micro electronmechanical unit 12 again; This asic cell 10 comprises a substrate 100 and is located at circuit layout 102 on this substrate 100; This loam cake 11 offers a chamber 114; This 12 of micro electronmechanical unit comprises a substrate 120 and is located at micro inductor 122 on this substrate 120 one sides; When piling up, micro inductor 122 can be placed among the chamber 114.For electrically conducting, this asic cell 10 is provided with in some perforations 106 and these perforations 106 and is filled with conductive material 108, this loam cake 11 also offers in corresponding perforation 110 and these perforations 110 and is filled with conductive material 112, so this asic cell 10 can be reached the purpose of electric connection with micro electronmechanical unit 12 by perforation 106 that is filled with conductive material 108 and the perforation 110 that is filled with conductive material 112.
Yet, the loam cake of above-mentioned packaged type only provides defencive function, therefore still need on the MEMS assembly, stay the usefulness of some spaces to be connected with ASIC assembly or other circuit of outside as the MEMS assembly more, thus inevitably the MEMS assembly can't contract littler; This kind MEMS packaged type also needs with the form and the ASIC that mix together circuit integratedly in addition, can produce the problem that increases power consumption and signal noise, and because this kind form mostly is the packaged type of 2D greatly, therefore the volume that encapsulates is difficult for dwindling.
In addition; Intel (Intel) United States Patent (USP) that company proposed US7061099 number is by in the last electrical passage of producing sunk structure and passing through loam cake that covers; so loam cake can provide the function of protection MEMS assembly with the conduct interconnection simultaneously; so have the function of dwindling the overall package volume, how description electrically connects MEMS assembly and ASIC assembly initiatively and the method for encapsulation stacking yet there is no in this patent.
Edge this, be necessary to work out a kind of integrated three-dimensional stacked package structure and manufacture method thereof that is used for microelectronics and electric component of microcomputer, it can overcome the defective of prior art.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of integrated three-dimensional stacked package structure and manufacture method thereof that is used for microelectronics and electric component of microcomputer, its substrate back in the active asic cell is offered depression, the micro inductor on can ccontaining micro electronmechanical unit when reaching with micro electronmechanical element stack, prevents the purpose of its damage.
To achieve these goals, the invention provides a kind of integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer, comprise:
One asic cell initiatively comprises one first substrate and is located at circuit layout on this first substrate one side, and wherein this first substrate one side of not being provided with circuit layout offers depression, and this active asic cell is provided with at least one perforation; And
One micro electronmechanical unit comprises one second substrate and is located at micro inductor on this second substrate one side;
Wherein, when fit in this active asic cell and this micro electronmechanical unit, this micro inductor is placed in the depression, and is filled with conductive material in this perforation, makes this active asic cell and this micro electronmechanical unit can reach electric connection.
The described integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer wherein, is provided with conductive part in this depression, and this conductive part electrically connects with this perforation and this micro electronmechanical unit respectively.
The described integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer, wherein, the circuit layout on this perforation and this first substrate one side electrically connects.
The described integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer, wherein, this conductive material is a metal material.
The described integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer, wherein, also piling up on the circuit layout on this first substrate has one or more asic cells, and this circuit layout and the electric connection of these asic cells.
To achieve these goals, the present invention also provides a kind of integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer, it is characterized in that, comprises:
One asic cell initiatively comprises one first substrate and is located at circuit layout on this first substrate one side, and wherein this first substrate one side of not being provided with circuit layout offers depression, and this active asic cell is provided with at least two perforations; And
One micro electronmechanical unit comprises one second substrate and is located at micro inductor on this second substrate one side;
Wherein, when fit in this active asic cell and this micro electronmechanical unit, this micro inductor is placed in the depression, and in these perforations at least one be filled with conductive material, makes this active asic cell and this micro electronmechanical unit can reach electric connection.
The described integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer wherein, is provided with conductive part in this depression, and this conductive part electrically connects with this perforation and this micro electronmechanical unit respectively.
The described integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer, wherein, the circuit layout on this perforation and this first substrate one side electrically connects.
The described integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer, wherein, this conductive material is a metal material.
The described integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer, wherein, also piling up on the circuit layout on this first substrate has one or more asic cells, and this circuit layout and the electric connection of these asic cells.
For reaching above-mentioned purpose, the invention provides a kind of manufacture method that is used for the integrated three-dimensional stacked package structure of microelectronics and electric component of microcomputer, comprise step:
(a) provide an active asic cell and a micro electronmechanical unit; This active asic cell comprises one first substrate and is located at circuit layout on this first substrate one side, and this micro electronmechanical unit comprises one second substrate and is located at micro inductor on this second substrate one side;
(b) one side that this first substrate is not provided with circuit layout is carried out thinning;
(c) this first substrate is not provided with offer on the one side of circuit layout can ccontaining this micro inductor depression;
(d) conductive part is set in this depression, this conductive part and micro electronmechanical unit electrically connect;
(e) initiatively asic cell and micro electronmechanical unit pile up, and make micro inductor be placed in the depression;
(f) on this active asic cell, offer at least one perforation and make this perforation connecting circuit layout and conductive part respectively; And
(g) in perforation, insert conductive material, make circuit layout and conductive part electrically connect.
The described manufacture method that is used for the integrated three-dimensional stacked package structure of microelectronics and electric component of microcomputer, wherein, this conductive material is a metal material.
Describe the present invention below in conjunction with the drawings and specific embodiments, but not as a limitation of the invention.
Description of drawings
Fig. 1 is the stacked structure profile of existing asic cell and micro electronmechanical unit;
Fig. 2 is used for the profile of the integrated three-dimensional stacked package structure of microelectronics and electric component of microcomputer for the present invention;
Fig. 3 is used for the profile of the integrated three-dimensional stacked package structure of microelectronics and electric component of microcomputer for the present invention, and it shows another embodiment;
Fig. 4 is used for the profile of the integrated three-dimensional stacked package structure of microelectronics and electric component of microcomputer for the present invention, and it shows another embodiment; And
Fig. 5 A to Fig. 5 G is used for the profile of manufacture method of the integrated three-dimensional stacked package structure of microelectronics and electric component of microcomputer for the present invention.
Wherein, Reference numeral:
The 10-asic cell
The 11-loam cake
The micro electronmechanical unit of 12-
20-is asic cell initiatively
The micro electronmechanical unit of 22-
The 24-asic cell
The 26-asic cell
40-is asic cell initiatively
The micro electronmechanical unit of 42-
50-is asic cell initiatively
The micro electronmechanical unit of 52-
The 100-substrate
The 102-circuit layout
The 106-perforation
The 108-conductive material
The 110-perforation
The 112-conductive material
The 114-chamber
The 120-substrate
The 122-micro inductor
The 200-substrate
The 202-circuit layout
The 204-depression
The 206-perforation
The 207-conductive part
The 208-conductive material
The 220-substrate
The 222-micro inductor
The 400-substrate
The 402-circuit layout
The 404-depression
The 406-perforation
The 407-conductive part
The 408-conductive material
The 409-perforation
The 420-substrate
The 422-micro inductor
The 500-substrate
The 502-circuit layout
The 504-depression
The 506-perforation
The 507-conductive part
The 508-conductive material
The 520-substrate
The 522-micro inductor
The 200a-electrical junction
The 200b-electrical junction
The 220a-electrical junction
The 220b-electrical junction
The 400a-electrical junction
The 400b-electrical junction
The 420a-electrical junction
The 420b-electrical junction
The 520a-electrical junction
The 520b-electrical junction
The specific embodiment
Below in conjunction with the drawings and specific embodiments technical scheme of the present invention is made further more detailed description.
See also Fig. 2, this figure is the profile that the present invention is used for the integrated three-dimensional stacked package structure of microelectronics and electric component of microcomputer.
In Fig. 2, the integrated three-dimensional stacked structure comprises an active asic cell 20 and a micro electronmechanical unit 22, and this active asic cell 20 is stacked on the micro electronmechanical unit 22; This active asic cell 20 comprises a substrate 200 and is located at circuit layout 202 on this substrate 200 one sides; For electrically conducting, this active asic cell 20 is provided with in some perforations 206 and these perforations 206 and is filled with conductive material 208, and this conductive material 208 can use metal material, for example copper.22 of micro electronmechanical unit comprise a substrate 220 and are located at micro inductor 222 on this substrate 220 one sides.
Unlike the prior art be, this substrate 200 is offered a depression 204 on the one side that is not provided with circuit layout 202, therefore micro inductor 222 can be placed in the depression 204 when initiatively asic cell 20 piles up applying with micro electronmechanical unit 22: and utilize the conductive material 208 of filling in perforation 206, the electrical junction 200a of substrate 200 and the electrical junction 220a of substrate 220 can be electrically connected; Similarly, utilize the conductive material 208 of filling in perforation 206 and the conductive part 207 that is laid in the depression 204, also the electrical junction 200b of substrate 200 and the electrical junction 220b of substrate 220 can be electrically connected, therefore initiatively the circuit layout 202 of asic cell 20 is promptly reached electric connection with micro electronmechanical unit 22, so initiatively electric connection is reached in the just corresponding and micro electronmechanical unit 22 of asic cell 20.
See also Fig. 3 again, in this figure, pile up asic cell 24 and asic cell 26 on three-dimensional stacked structure shown in Figure 2 (initiatively asic cell 20 with micro electronmechanical unit 22) again, meaning is that asic cell 24 is stacked in initiatively on the asic cell 20 and with the perforation that is full of conductive material and reaches electric connection; Asic cell 26 then is stacked on the asic cell 24 and also reaches electric connection with the perforation that is full of conductive material; Therefore, the present invention can reach the purpose of the multiple-level stack and the simplification number of plies.
Fig. 4 is the profile of integrated three-dimensional stacked structure of the present invention, and it shows another embodiment.This integrated three-dimensional stacked structure comprises an active asic cell 40 and a micro electronmechanical unit 42, and this active asic cell 40 is stacked on the micro electronmechanical unit 42; This active asic cell 40 comprises a substrate 400 and is located at circuit layout 402 on this substrate 400 one sides; For electrically conducting, this active asic cell 40 is provided with in some perforations 406 and these perforations 406 and is filled with conductive material 408, and this conductive material 408 can use metal material, for example copper.42 of micro electronmechanical unit comprise a substrate 420 and are located at micro inductor 422 on this substrate 420 one sides.
Be similar to Fig. 2, the substrate 400 of Fig. 4 offers depression 404 on the one side that is not provided with circuit layout 402, and therefore micro inductor 422 can be placed in the depression 404 when initiatively asic cell 40 piles up applying with micro electronmechanical unit 42; And utilize the conductive material 408 of filling in perforation 406, the electrical junction 400a of substrate 400 and the electrical junction 420a of substrate 420 can be electrically connected; Again, utilize the conductive material 408 of filling in perforation 406 and the conductive part 407 that is laid in the depression 404, also the electrical junction 400b of substrate 400 and the electrical junction 420b of substrate 420 can be electrically connected, therefore initiatively the circuit layout 402 of asic cell 40 is promptly reached electric connection with micro electronmechanical unit 42, so initiatively electric connection is reached in the just corresponding and micro electronmechanical unit 42 of asic cell 40.
Different with the foregoing description is, the micro electronmechanical unit 42 of Fig. 4 has need respond to (for example: utilize micro inductor 422 induction sound waves) with the external world, therefore just the perforation 409 on the active asic cell 40 is kept hollow state (not filling conduction material) and carried out encapsulation stacking with micro electronmechanical unit 42, so the signal (for example sound wave) that transmits via the external world just can be responded in this micro electronmechanical unit 42.
Fig. 5 A to Fig. 5 G is used for the manufacture method of the integrated three-dimensional stacked package structure of microelectronics and electric component of microcomputer for the present invention, and it shows manufacturing process in the profile mode, comprising:
Step 1: an active asic cell 50 is provided; This active asic cell 50 comprises a substrate 500 and is located at circuit layout 502 on this substrate 500, shown in Fig. 5 A.
Step 2: utilize the lap (not shown) to carry out thinning the one side that this 500 substrate is not provided with circuit layout 502, shown in Fig. 5 B.
Step 3: this substrate 500 is not provided with on the one side of circuit layout 502 and offers a depression 504 (for example: utilize wet etching), shown in Fig. 5 C.
Step 4: (for example: utilize metal to carry out sputter) conductive part 507, an electrical junction 520a and an electrical junction 520b are set, in this depression 504 shown in Fig. 5 D.
Step 5: this active asic cell 50 is piled up (micro electronmechanical unit 52 comprises a substrate 520 and a micro inductor 522 of being located on this substrate 520) with micro electronmechanical unit 52, make micro inductor 522 be placed among the depression 504, shown in Fig. 5 E.
Step 6: on this active asic cell 50, offer some perforations 506 and make sensible respectively electrical junction 520a of these perforations 506 and conductive part 507, shown in Fig. 5 F.
Step 7: in these perforations 506, insert conductive material 508 (for example copper), make that initiatively asic cell 50 is reached electric connection with micro electronmechanical unit 52, shown in Fig. 5 G.
Certainly, in above-mentioned manufacturing process, also can as Fig. 4, only in the part perforation, insert conductive metallic material, and stay the part perforation is in communication with the outside induction as the micro inductor of micro electronmechanical unit usefulness, have the knack of the person's simple application variation of this field but these are changed to, will repeat no more in this.
In sum; the integrated three-dimensional stacking encapsulation method that is used for microelectronics and electric component of microcomputer of the present invention directly has the over cap of electricity connection function with the ASIC wafer fabrication; not only can be used as the over cap of MEMS assembly; ASIC circuit on it more can be done more closely with the MEMS assembly and integrate; so can reach the integration of lifting subassembly and the purpose that reduces cost; can effectively overcome the shortcoming of prior art, close and to patent so that the practitioner of related industry can be used to promote industry development according to this.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.

Claims (12)

1, a kind of integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer comprises:
One asic cell initiatively comprises one first substrate and is located at circuit layout on this first substrate one side, and wherein this first substrate one side of not being provided with circuit layout offers depression, and this active asic cell is provided with at least one perforation; And
One micro electronmechanical unit comprises one second substrate and is located at micro inductor on this second substrate one side;
Wherein, when fit in this active asic cell and this micro electronmechanical unit, this micro inductor is placed in the depression, and is filled with conductive material in this perforation, makes this active asic cell and this micro electronmechanical unit can reach electric connection.
2, the integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer according to claim 1 is characterized in that, is provided with conductive part in this depression, and this conductive part electrically connects with this perforation and this micro electronmechanical unit respectively.
3, the integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer according to claim 1 is characterized in that, the circuit layout on this perforation and this first substrate one side electrically connects.
4, the integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer according to claim 1 is characterized in that, this conductive material is a metal material.
5, the integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer according to claim 1, it is characterized in that, also piling up on the circuit layout on this first substrate has one or more asic cells, and this circuit layout and the electric connection of these asic cells.
6, a kind of integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer is characterized in that, comprises:
One asic cell initiatively comprises one first substrate and is located at circuit layout on this first substrate one side, and wherein this first substrate one side of not being provided with circuit layout offers depression, and this active asic cell is provided with at least two perforations; And
One micro electronmechanical unit comprises one second substrate and is located at micro inductor on this second substrate one side;
Wherein, when fit in this active asic cell and this micro electronmechanical unit, this micro inductor is placed in the depression, and in these perforations at least one be filled with conductive material, makes this active asic cell and this micro electronmechanical unit can reach electric connection.
7, the integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer according to claim 6 is characterized in that, is provided with conductive part in this depression, and this conductive part electrically connects with this perforation and this micro electronmechanical unit respectively.
8, the integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer according to claim 6 is characterized in that, the circuit layout on this perforation and this first substrate one side electrically connects.
9, the integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer according to claim 6 is characterized in that, this conductive material is a metal material.
10, the integrated three-dimensional stacked package structure that is used for microelectronics and electric component of microcomputer according to claim 6, it is characterized in that, also piling up on the circuit layout on this first substrate has one or more asic cells, and this circuit layout and the electric connection of these asic cells.
11, a kind of manufacture method that is used for the integrated three-dimensional stacked package structure of microelectronics and electric component of microcomputer is characterized in that, comprises step:
An one active asic cell and a micro electronmechanical unit is provided; This active asic cell comprises one first substrate and is located at circuit layout on this first substrate one side, and this micro electronmechanical unit comprises one second substrate and is located at micro inductor on this second substrate one side;
The one side that this first substrate is not provided with circuit layout is carried out thinning;
This first substrate is not provided with offer on the one side of circuit layout can ccontaining this micro inductor depression;
One conductive part is set in this depression, and this conductive part and micro electronmechanical unit electrically connect;
Initiatively asic cell and micro electronmechanical unit pile up, and make micro inductor be placed in the depression;
On this active asic cell, offer at least one perforation and make this perforation connecting circuit layout and conductive part respectively; And
In perforation, insert conductive material, make circuit layout and conductive part electrically connect.
12, the manufacture method that is used for the integrated three-dimensional stacked package structure of microelectronics and electric component of microcomputer according to claim 11 is characterized in that, this conductive material is a metal material.
CN200810131238A 2008-08-01 2008-08-01 Integrated three-dimensional stacked package structure and manufacturing method thereof Pending CN101638211A (en)

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US9444404B2 (en) 2012-04-05 2016-09-13 Fairchild Semiconductor Corporation MEMS device front-end charge amplifier
US10060757B2 (en) 2012-04-05 2018-08-28 Fairchild Semiconductor Corporation MEMS device quadrature shift cancellation
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