CN101826532B - TFT (Thin Film Transistor)-LCD (Liquid Crystal Display) array baseplate and manufacturing method thereof - Google Patents
TFT (Thin Film Transistor)-LCD (Liquid Crystal Display) array baseplate and manufacturing method thereof Download PDFInfo
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- CN101826532B CN101826532B CN 200910079290 CN200910079290A CN101826532B CN 101826532 B CN101826532 B CN 101826532B CN 200910079290 CN200910079290 CN 200910079290 CN 200910079290 A CN200910079290 A CN 200910079290A CN 101826532 B CN101826532 B CN 101826532B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
Abstract
The invention relates to a TFT-LCD array baseplate and a manufacturing method thereof. The array baseplate comprises a grid wire and a data wire, wherein the grid wire and the data wire are formed on the baseplate, a pixel electrode and a thin film transistor are formed in a pixel region limited by the grid wire and the data wire, and the thin film transistor comprises a grid electrode, a grid insulating layer, a source electrode, a drain electrode, a doped semiconductor layer, a semiconductor layer and a passivation layer, wherein the grid electrode is formed on the baseplate, the grid insulating layer is formed on the grid electrode and covers the whole baseplate, the source electrode and the drain electrode are formed on the grid insulating layer, the doped semiconductor layer and the semiconductor layer are formed between the source electrode and the drain electrode in a transverse arrangement mode, and the passivation layer is formed on a structural graph. In the invention, the doped semiconductor layer and the semiconductor layer are arranged between the source electrode and the drain electrode in the transverse arrangement mode, thereby not only effectively reducing the internal segment difference and avoiding the rupture of a subsequently deposited thin film, but also reducing the thickness of the structural graph, reducing the box thickness and increasing the response speed of liquid crystals.
Description
Technical field
The present invention relates to a kind of LCD Structure of thin film transistor and manufacturing approach thereof, especially a kind of TFT-LCD array base palte and manufacturing approach thereof.
Background technology
Thin Film Transistor-LCD (Thin Film Transistor Liquid CrystalDisplay; Abbreviation TFT-LCD) has characteristics such as volume is little, low in energy consumption, radiationless; Obtained in recent years developing by leaps and bounds, in current flat panel display market, occupied leading position.The agent structure of TFT-LCD comprises the array base palte of box and color membrane substrates, the thin-film transistor and the pixel electrode that wherein are formed with grid line, data wire on the array base palte and arrange with matrix-style.
Figure 32 is the structural representation of prior art TFT-LCD array base palte, carries on the back the bottom grating structure of raceway groove for the typical case.Shown in figure 32, gate electrode 2 is formed on the substrate 1, and is connected with grid line; Gate insulation layer 3 is formed on the gate electrode 2 and covers whole base plate 1, and active layer (semiconductor layer 4 and doping semiconductor layer 5) is formed on the gate insulation layer 3 and is positioned at the top of gate electrode 2; One end of source electrode 6 is formed on the active layer; The other end is connected with data wire; One end of drain electrode 7 is formed on the active layer, and the other end is connected with pixel electrode 13 through the passivation layer via hole of offering on the passivation layer 8, forms the TFT channel region between source electrode 6 and the drain electrode 7; The doping semiconductor layer 5 of TFT channel region is etched away fully, exposes semiconductor layer 4; Passivation layer 8 is formed on data wire, source electrode 6 and the drain electrode 7 and covers whole base plate 1, offers passivation layer via hole 9 in drain electrode 7 positions.Pixel electrode 13 is formed on the passivation layer 8, is connected with drain electrode 7 through passivation layer via hole 9.The TFT-LCD array base palte of this version adopts five composition technologies (5-Mask) preparation usually, and main technique comprises: form gate electrode and grid line figure; Form gate insulation layer and active layer figure; Form data wire, source electrode, drain electrode and TFT channel region figure; Form passivation layer and passivation layer via hole figure; Form the pixel electrode figure.During work, feed cut-in voltage to gate electrode, semiconductor layer forms conductive channel and makes source electrode and drain electrode conducting, and the data voltage on the data wire is applied on the pixel electrode.
The actual use shows that this each layer of employing of the prior art vertically structure of stack causes the inner section difference bigger, makes the film of subsequent deposition produce fracture easily.In addition, it is thick that the structure of this vertical stack has increased box, causes easily that not only other is bad, and reduced response speed of liquid crystal.
Summary of the invention
The purpose of this invention is to provide a kind of TFT-LCD array base palte and manufacturing approach thereof, it is poor not only effectively to reduce inner section, and it is thick to reduce box, improves response speed of liquid crystal.
To achieve these goals, the invention provides a kind of TFT-LCD array base palte, comprise the grid line and the data wire that are formed on the substrate, form pixel electrode and thin-film transistor in the pixel region that said grid line and data wire limit, said thin-film transistor comprises:
Gate electrode is formed on the substrate, is connected with grid line;
Gate insulation layer is formed on the gate electrode and covers whole base plate;
The source electrode is formed on the gate insulation layer, and an end is positioned at the top of gate electrode, and the other end is connected with data wire;
Drain electrode is formed on the gate insulation layer, and an end is positioned at the top of gate electrode, and the other end is connected with pixel electrode;
Doping semiconductor layer and semiconductor layer; Be formed between source electrode and the drain electrode with the transverse row mode for cloth; Doping semiconductor layer is formed on the inwall of channel region between source electrode and the drain electrode; Outer surface contacts with the end of source electrode and drain electrode, and semiconductor layer contacts with the inner surface of doping semiconductor layer;
Passivation layer is formed on the said structure figure, and covers whole base plate.
Said pixel electrode can be formed on the gate insulation layer, and directly is connected with drain electrode.Further, said pixel electrode and data wire are forming with in a composition technology.
Said pixel electrode also can be formed on the passivation layer, and is connected with drain electrode through the passivation layer via hole of offering on the passivation layer.
On the technique scheme basis, doping semiconductor layer is formed on the inwall of channel region between source electrode and the drain electrode, and outer surface contacts with the end of source electrode and drain electrode, and semiconductor layer contacts with the inner surface of doping semiconductor layer.
To achieve these goals, the present invention also provides a kind of TFT-LCD manufacturing method of array base plate, comprising:
Said step 12 can comprise:
On the substrate of completing steps 11, using plasma strengthens chemical gaseous phase depositing process deposition gate insulation layer;
On the substrate of accomplishing abovementioned steps, adopt the method for magnetron sputtering or thermal evaporation, metallic film is leaked in deposit transparent conductive film and source successively;
Leak coating one deck photoresist on the metallic film in the source;
Adopt halftoning or gray mask plate that photoresist is made public, make the complete reserve area of photoresist formation photoresist, photoresist remove zone and photoresist half reserve area fully; Wherein the complete reserve area of photoresist is corresponding to data wire, source electrode and drain electrode figure region, and photoresist half reserve area is corresponding to pixel electrode figure region, and photoresist is removed the zone fully corresponding to the zone beyond the above-mentioned figure; After the development treatment, the photoresist thickness of the complete reserve area of photoresist does not change, and photoresist is removed the photoresist in zone fully and removed the photoresist thickness attenuation of photoresist half reserve area fully;
Through the first time etching technics etch away photoresist fully and remove the source in zone fully and leak metallic film and transparent conductive film, form the figure that comprises data wire and source electrode, the source electrode is connected with data wire;
Remove the photoresist of photoresist half reserve area fully through cineration technics, expose this regional source and leak metallic film;
Metallic film is leaked in source through the second time, etching technics etched away photoresist half reserve area fully, forms to comprise drain electrode and pattern of pixel electrodes, and drain electrode directly is connected with pixel electrode;
Peel off remaining photoresist.
Said step 12 also can comprise:
On the substrate of completing steps 11, using plasma strengthens chemical gaseous phase depositing process deposition gate insulation layer;
On the substrate of accomplishing abovementioned steps, adopt the method for magnetron sputtering or thermal evaporation, the deposit transparent conductive film;
Adopt the normal masks plate to form and comprise pattern of pixel electrodes through composition technology;
On the substrate of accomplishing abovementioned steps, adopt the method for magnetron sputtering or thermal evaporation, sedimentary origin leaks metallic film;
Adopt the normal masks plate to form the figure that comprises data wire, source electrode and drain electrode through composition technology, drain electrode directly is connected with pixel electrode.
To achieve these goals, the present invention also provides another kind of TFT-LCD manufacturing method of array base plate, comprising:
The invention provides a kind of TFT-LCD array base palte and manufacturing approach thereof; Doping semiconductor layer and semiconductor layer are arranged between source electrode and the drain electrode with the transverse row mode for cloth, compare with the prior art of using the vertical overlaying structure of each layer, it is poor that the present invention not only effectively reduces inner section; Avoided the film of subsequent deposition to produce fracture; And reduced the thickness of structure graph, it is thick to have reduced box, has improved response speed of liquid crystal.
Description of drawings
Fig. 1 is the plane graph of TFT-LCD array base palte first embodiment of the present invention;
Fig. 2 be among Fig. 1 A1-A1 to profile;
Fig. 3 is the plane graph after TFT-LCD array base palte first embodiment composition technology first time of the present invention;
Fig. 4 be among Fig. 3 A2-A2 to profile;
Fig. 5 is the plane graph after TFT-LCD array base palte first embodiment composition technology second time of the present invention;
Fig. 6 be among Fig. 5 A3-A3 to profile;
Fig. 7 for TFT-LCD array base palte first embodiment of the present invention for the second time in the composition technology behind each layer film of deposition A3-A3 to profile;
Fig. 8 for TFT-LCD array base palte first embodiment of the present invention for the second time in the composition technology resist exposure develop back A3-A3 to profile;
Fig. 9 for TFT-LCD array base palte first embodiment of the present invention for the second time in the composition technology for the first time after the etching A3-A3 to profile;
Figure 10 for TFT-LCD array base palte first embodiment of the present invention for the second time in the composition technology behind the cineration technics A3-A3 to profile;
Figure 11 for TFT-LCD array base palte first embodiment of the present invention for the second time in the composition technology for the second time after the etching A3-A3 to profile;
Figure 12 is TFT-LCD array base palte first embodiment of the present invention plane graph after the composition technology for the third time;
Figure 13 be among Figure 12 A4-A4 to profile;
Figure 14 is the plane graph after the 4th composition technology of TFT-LCD array base palte first embodiment of the present invention;
Figure 15 be among Figure 14 A5-A5 to profile;
Figure 16 is the plane graph of TFT-LCD array base palte second embodiment of the present invention;
Figure 17 be among Figure 16 B1-B1 to profile;
Figure 18 is the plane graph after TFT-LCD array base palte second embodiment composition technology first time of the present invention;
Figure 19 be among Figure 18 B2-B2 to profile;
Figure 20 is the plane graph after TFT-LCD array base palte second embodiment composition technology second time of the present invention;
Figure 21 be among Figure 20 B3-B3 to profile;
Figure 22 is TFT-LCD array base palte second embodiment of the present invention plane graph after the composition technology for the third time;
Figure 23 be among Figure 22 B4-B4 to profile;
Figure 24 is the plane graph after the 4th composition technology of TFT-LCD array base palte second embodiment of the present invention;
Figure 25 be among Figure 24 B5-B5 to profile;
Figure 26 is the plane graph after the 5th composition technology of TFT-LCD array base palte second embodiment of the present invention;
Figure 27 be among Figure 26 B6-B6 to profile;
Figure 28 is the flow chart of TFT-LCD manufacturing method of array base plate first embodiment of the present invention;
Figure 29 forms the flow chart of data wire, source electrode, drain electrode and pixel electrode figure for TFT-LCD manufacturing method of array base plate first embodiment of the present invention;
Figure 30 is the another kind of flow chart that forms data wire, source electrode, drain electrode and pixel electrode figure of TFT-LCD manufacturing method of array base plate first embodiment of the present invention;
Figure 31 is the flow chart of TFT-LCD manufacturing method of array base plate second embodiment of the present invention;
Figure 32 is the structural representation of prior art TFT-LCD array base palte.
Description of reference numerals:
The 1-substrate; The 2-gate electrode; The 3-gate insulation layer;
The 4-semiconductor layer; The 5-doping semiconductor layer; 6-source electrode;
The 7-drain electrode; The 8-passivation layer; The 9-passivation layer via hole;
The 11-grid line; The 12-data wire; The 13-pixel electrode;
The 14-public electrode wire.
Embodiment
Through accompanying drawing and embodiment, technical scheme of the present invention is done further detailed description below.
Fig. 1 is the plane graph of TFT-LCD array base palte first embodiment of the present invention, and what reflected is the structure of a pixel cell, Fig. 2 be among Fig. 1 A1-A1 to profile.As depicted in figs. 1 and 2; The agent structure of present embodiment TFT-LCD array base palte comprises grid line 11, data wire 12, pixel electrode 13 and the thin-film transistor that is formed on the substrate 1; Orthogonal grid line 11 has defined pixel region with data wire 12; Thin-film transistor and pixel electrode 13 are formed in the pixel region, and grid line 11 is used for to thin-film transistor start signal being provided, and data wire 12 is used for to pixel electrode 13 data-signal being provided.Particularly, present embodiment TFT-LCD array base palte comprises the grid line 11 and gate electrode 2 that is formed on the substrate 1, and gate electrode 2 is connected with grid line 11; Gate insulation layer 3 is formed on gate electrode 2 and the grid line 11 and covers whole base plate 1; Pixel electrode 13 is formed on the gate insulation layer 3 and is positioned at pixel region; Source electrode 6 is formed on the gate insulation layer 3 with drain electrode 7, and an end of source electrode 6 is positioned at the top of gate electrode 2, and the other end is connected with data wire 12, and an end of drain electrode 7 is positioned at the top of gate electrode 2, and the other end directly is connected with pixel electrode 13; Be formed with the doping semiconductor layer 5 and semiconductor layer 4 of laterally arranging between source electrode 6 and the drain electrode 7; Passivation layer 8 is formed on the said structure figure, and covers whole base plate 1.
In the present embodiment technique scheme; Through doping semiconductor layer and semiconductor layer are arranged between source electrode and the drain electrode with the transverse row mode for cloth; It is poor to effectively reduce inner section, has reduced the thickness of structure graph, has not only avoided the film of subsequent deposition to produce fracture; And it is thick to have reduced box, has improved response speed of liquid crystal.Can also comprise public electrode wire 14 figures in the technique scheme, public electrode wire 14 is formed in the pixel region, and between two grid lines 11, is used for constituting storage capacitance with pixel electrode 13.
Fig. 3～Figure 15 is the sketch map of the TFT-LCD array base palte first embodiment manufacture process of the present invention; Can further specify the technical scheme of present embodiment; In following explanation; The alleged composition technology of the present invention comprises technologies such as photoresist coating, mask, exposure, etching, photoresist lift off, and photoresist is example with the positive photoresist.
Fig. 3 is TFT-LCD array base palte first embodiment of the present invention plane graph after the composition technology for the first time, and what reflected is the structure of a pixel cell, Fig. 4 be among Fig. 3 A2-A2 to profile.At first adopt the method for magnetron sputtering or thermal evaporation; Go up deposition one deck grid metallic film at substrate 1 (like glass substrate or quartz base plate); The grid metallic film can adopt the single thin film of aluminium, chromium, tungsten, tantalum, titanium, molybdenum or aluminium nickel, also can adopt the multi-layer compound film that is made up of above-mentioned single thin film.Adopt the normal masks plate that the grid metallic film is carried out composition, on substrate 1, form the figure that comprises gate electrode 2 and grid line 11, like Fig. 3 and shown in Figure 4.In the practical application, the present invention for the first time also can form public electrode wire 14 figures in the composition technology simultaneously, forms storage capacitance structure of (Cs on Common) on public electrode wire.
Fig. 5 is TFT-LCD array base palte first embodiment of the present invention plane graph after the composition technology for the second time, and what reflected is the structure of a pixel cell, Fig. 6 be among Fig. 5 A3-A3 to profile.On the substrate of accomplishing the said structure figure, at first using plasma strengthens chemical vapour deposition (CVD) (being called for short PECVD) method, deposits gate insulation layer 3, adopts the method for magnetron sputtering or thermal evaporation then, and metallic film is leaked in deposit transparent conductive film and source successively.Adopt halftoning or gray mask plate to form the figure that comprises data wire 12, source electrode 6, drain electrode 7 and pixel electrode 13, like Fig. 5 and shown in Figure 6 through composition technology.The present invention's composition technology for the second time is a kind of composition technology that adopts the multistep lithographic method, and through the figure of composition technology formation data wire 12, source electrode 6, drain electrode 7 and a pixel electrode 13, detailed process is explained as follows.
Fig. 7 for TFT-LCD array base palte first embodiment of the present invention for the second time in the composition technology behind each layer film of deposition A3-A3 to profile.On the substrate of accomplishing above-mentioned figure, at first adopt PECVD or other film build method, deposition one deck gate insulation layer 3 adopts magnetron sputtering, thermal evaporation or other film build method then, and deposit transparent conductive film 21 leaks metallic film 22 with the source successively, and is as shown in Figure 7.Gate insulation layer 3 can adopt silicon nitride, silicon dioxide or aluminium oxide, and the single thin film that metallic film can adopt aluminium, chromium, tungsten, tantalum, titanium, molybdenum or aluminium nickel is leaked in the source, also can adopt the multi-layer compound film that is made up of above-mentioned single thin film; Transparent conductive film 21 can adopt materials such as tin indium oxide (ITO), indium zinc oxide (IZO) or aluminum zinc oxide, also can adopt other metal and metal oxide.
Fig. 8 for TFT-LCD array base palte first embodiment of the present invention for the second time in the composition technology resist exposure develop back A3-A3 to profile.Leak coating one deck photoresist 30 on the metallic film 22 in the source; Adopt halftoning or gray mask plate that photoresist is made public; Make photoresist form complete exposure area A, unexposed area B and half exposure area C; Wherein unexposed area B is corresponding to data wire, source electrode and drain electrode figure region, and half exposure area C is corresponding to pixel electrode figure region, and complete exposure area A is corresponding to the zone beyond the above-mentioned figure.After the development treatment; The photoresist thickness of unexposed area B does not change, and forms the complete reserve area of photoresist, and the photoresist of complete exposure area A is removed fully; Form photoresist and remove the zone fully; The photoresist thickness attenuation of half exposure area C forms photoresist half reserve area, and is as shown in Figure 8.
Fig. 9 for TFT-LCD array base palte first embodiment of the present invention for the second time in the composition technology for the first time after the etching A3-A3 to profile.Metallic film 22 and transparent conductive film 21 are leaked in source through the first time, etching technics etched away complete exposure area A fully, form the figure that comprises data wire and source electrode, and be as shown in Figure 9.
Figure 10 for TFT-LCD array base palte first embodiment of the present invention for the second time in the composition technology behind the cineration technics A3-A3 to profile.Through cineration technics, reduce the thickness of photoresist 30, remove the photoresist of half exposure area C fully, expose this regional source and leak metallic film 22, shown in figure 10.Because the thickness of unexposed area B photoresist is greater than the thickness of half exposure area C photoresist, so after this technology, unexposed area B also is coated with the photoresist of segment thickness.
Figure 11 for TFT-LCD array base palte first embodiment of the present invention for the second time in the composition technology for the second time after the etching A3-A3 to profile.Leak metallic film 22 through the source of double exposure area C of the etching technics second time and carry out etching, etch away this regional source fully and leak metallic film 22, expose transparent conductive film, form the figure that comprises drain electrode 7 and pixel electrode 13, shown in figure 11.
At last, peel off remaining photoresist, accomplish present embodiment TFT-LCD array base palte composition technology for the second time, like Fig. 5 and shown in Figure 6.After the present embodiment composition technology second time; Source electrode 6 is formed on the gate insulation layer 3 with drain electrode 7, and an end of source electrode 6 is positioned at the top of gate electrode 2, and the other end is connected with data wire 12; One end of drain electrode 7 is positioned at the top of gate electrode 2; The other end pixel electrode 13 interior with being formed on pixel region directly is connected, and forms channel region between source electrode 6 and the drain electrode 7, and channel region exposes gate insulation layer 3.
Figure 12 is TFT-LCD array base palte first embodiment of the present invention plane graph after the composition technology for the third time, and what reflected is the structure of a pixel cell, Figure 13 be among Figure 12 A4-A4 to profile.On the substrate of accomplishing the said structure figure; Adopt PECVD method or other film build method, the dopant deposition semiconductive thin film adopts the normal masks plate that doped semiconductor films is carried out composition; Form the doping semiconductor layer 5 of horizontally set; Doping semiconductor layer 5 is formed on the inwall of channel region between source electrode 6 and the drain electrode 7, and outer surface contacts with the end of source electrode 6 with drain electrode 7, like Figure 12 and shown in Figure 13.
Figure 14 is the plane graph after the 4th composition technology of TFT-LCD array base palte first embodiment of the present invention, and what reflected is the structure of a pixel cell, Figure 15 be among Figure 14 A5-A5 to profile.On the substrate of accomplishing the said structure figure; Adopt PECVD method or other film build method, the deposited semiconductor film adopts the normal masks plate that semiconductive thin film is carried out composition; At the inner semiconductor layer 4 that forms of channel region; Semiconductor layer 4 contacts with the inner surface of doping semiconductor layer 5, between source electrode 6 and drain electrode 7, forms the doping semiconductor layer 5 and semiconductor layer 4 of laterally arranging, like Figure 14 and shown in Figure 15.
At last, on the substrate of accomplishing above-mentioned figure, adopt PECVD method or other film build method, deposition one deck passivation layer 8, passivation layer 8 can be selected oxide, nitride or oxynitrides for use.Adopt the normal masks plate that passivation layer is carried out composition, form the grid line interface via hole in grid line interface zone (grid line PAD) and the data line interface via hole figures (not shown) in data line interface zone (data wire PAD), as depicted in figs. 1 and 2.The grid line interface via hole is identical with the prior art structure with the structure of data line interface via hole figures, repeats no more here.
Four composition technologies discussed above only are a kind of implementation methods of preparation present embodiment TFT-LCD array base palte, can also be through increasing or reduce composition technology number of times, selecting material different or combination of materials to realize the present invention in actual the use.For example; Present embodiment TFT-LCD array base palte composition technology for the second time can adopt the composition technology of normal masks plate to accomplish by two; Promptly form the pixel electrode figure through the composition technology that once adopts the normal masks plate; Adopt the composition technology of normal masks plate to form data wire, source electrode and drain electrode figure through another time, repeat no more here.
Present embodiment provides a kind of TFT-LCD array base palte; At first through the first time composition technology formation grid line and gate electrode figure; Use halftoning or gray mask plate through the data wire of composition technology formation for the second time, source electrode, drain electrode and pixel electrode figure then; Afterwards through for the third time, the 4th composition technology forms the doping semiconductor layer and the semiconductor layer figure of laterally arranging, and forms grid line interface via hole and data line interface via pattern through the 5th composition technology at last.During the work of present embodiment TFT-LCD array base palte, when when gate electrode applies cut-in voltage, semiconductor layer forms conductive channel and makes source electrode and drain electrode conducting, and the data voltage on the data wire is applied on the pixel electrode, realizes showing.Because present embodiment is arranged on doping semiconductor layer and semiconductor layer between source electrode and the drain electrode with the transverse row mode for cloth; Compare with the prior art of using the vertical overlaying structure of each layer; It is poor that present embodiment not only effectively reduces inner section, avoided the film of subsequent deposition to produce fracture, and reduced the thickness of structure graph; It is thick to have reduced box, has improved response speed of liquid crystal.In addition, the present embodiment drain electrode directly is connected with pixel electrode, has improved the reliability that is electrically connected between drain electrode and the pixel electrode.
Figure 16 is the plane graph of TFT-LCD array base palte second embodiment of the present invention, and what reflected is the structure of a pixel cell, Figure 17 be among Figure 16 B1-B1 to profile.Like Figure 16 and shown in Figure 17; The agent structure of present embodiment TFT-LCD array base palte comprises grid line 11, data wire 12, pixel electrode 13 and the thin-film transistor that is formed on the substrate 1; Orthogonal grid line 11 has defined pixel region with data wire 12; Thin-film transistor and pixel electrode 13 are formed in the pixel region, and grid line 11 is used for to thin-film transistor start signal being provided, and data wire 12 is used for to pixel electrode 13 data-signal being provided.Particularly, present embodiment TFT-LCD array base palte comprises the grid line 11 and gate electrode 2 that is formed on the substrate 1, and gate electrode 2 is connected with grid line 11; Gate insulation layer 3 is formed on gate electrode 2 and the grid line 11 and covers whole base plate 1; Source electrode 6 is formed on the gate insulation layer 3 with drain electrode 7; One end of source electrode 6 is positioned at the top of gate electrode 2; The other end is connected with data wire 12, and an end of drain electrode 7 is positioned at the top of gate electrode 2, and the other end is connected with pixel electrode 13 through the passivation layer via hole of offering on the passivation layer 89; Be formed with the doping semiconductor layer 5 and semiconductor layer 4 of laterally arranging between source electrode 6 and the drain electrode 7; Passivation layer 8 is formed on the said structure figure, and covers whole base plate 1, offers passivation layer via hole 9 in drain electrode 7 positions, and pixel electrode 13 is formed on the passivation layer 8, and is connected with drain electrode 7 through passivation layer via hole 9.
In the present embodiment technique scheme; Through doping semiconductor layer and semiconductor layer are arranged between source electrode and the drain electrode with the transverse row mode for cloth; It is poor to effectively reduce inner section, has reduced the thickness of structure graph, has not only avoided the film of subsequent deposition to produce fracture; And it is thick to have reduced box, has improved response speed of liquid crystal.Can also comprise public electrode wire 14 figures in the technique scheme, public electrode wire 14 is formed in the pixel region, and between two grid lines 11, is used for constituting storage capacitance with pixel electrode 13.
Figure 18～Figure 27 is the sketch map of the TFT-LCD array base palte second embodiment manufacture process of the present invention, can further specify the technical scheme of present embodiment, and in following explanation, the present embodiment layers of material is identical with aforementioned first embodiment with technology, repeats no more.
Figure 18 is TFT-LCD array base palte second embodiment of the present invention plane graph after the composition technology for the first time, and what reflected is the structure of a pixel cell, Figure 19 be among Figure 18 B2-B2 to profile.At first adopt the method for magnetron sputtering or thermal evaporation, deposition one deck grid metallic film on substrate 1.Adopt the normal masks plate that the grid metallic film is carried out composition, on substrate 1, form the figure that comprises gate electrode 2 and grid line 11, like Figure 18 and shown in Figure 19.In the practical application, the present invention for the first time also can form public electrode wire 14 figures in the composition technology simultaneously, forms storage capacitance structure of (Cs onCommon) on public electrode wire.
Figure 20 is TFT-LCD array base palte second embodiment of the present invention plane graph after the composition technology for the second time, and what reflected is the structure of a pixel cell, Figure 21 be among Figure 20 B3-B3 to profile.On the substrate of accomplishing the said structure figure, adopt PECVD method deposition gate insulation layer 3, adopt the method sedimentary origin of magnetron sputtering or thermal evaporation to leak metallic film then.Adopt the normal masks plate to form the figure that comprises data wire 12, source electrode 6 and drain electrode 7, like Figure 20 and shown in Figure 21 through composition technology.
Figure 22 is TFT-LCD array base palte second embodiment of the present invention plane graph after the composition technology for the third time, and what reflected is the structure of a pixel cell, Figure 23 be among Figure 22 B4-B4 to profile.On the substrate of accomplishing the said structure figure; Adopt PECVD method or other film build method, the dopant deposition semiconductive thin film adopts the normal masks plate that doped semiconductor films is carried out composition; Form the doping semiconductor layer 5 of horizontally set; Doping semiconductor layer 5 is formed on the inwall of channel region between source electrode 6 and the drain electrode 7, and outer surface contacts with the end of source electrode 6 with drain electrode 7, like Figure 22 and shown in Figure 23.
Figure 24 is the plane graph after the 4th composition technology of TFT-LCD array base palte second embodiment of the present invention, and what reflected is the structure of a pixel cell, Figure 25 be among Figure 24 B5-B5 to profile.On the substrate of accomplishing the said structure figure; Adopt PECVD method or other film build method, the deposited semiconductor film adopts the normal masks plate that semiconductive thin film is carried out composition; At the inner semiconductor layer 4 that forms of channel region; Semiconductor layer 4 contacts with the inner surface of doping semiconductor layer 5, between source electrode 6 and drain electrode 7, forms the doping semiconductor layer 5 and semiconductor layer 4 of laterally arranging, like Figure 24 and shown in Figure 25.
Figure 26 is the plane graph after the 5th composition technology of TFT-LCD array base palte second embodiment of the present invention, and what reflected is the structure of a pixel cell, Figure 27 be among Figure 26 B6-B6 to profile.On the substrate of accomplishing above-mentioned figure, adopt PECVD method or other film build method, deposition one deck passivation layer 8 adopts the normal masks plate that passivation layer is carried out composition, forms the figure that comprises passivation layer via hole 9 in drain electrode 7 positions, like Figure 26 and shown in Figure 27.In this composition technology, also be formed with grid line interface via hole and data line interface via hole figures simultaneously.
At last; On the substrate of accomplishing above-mentioned figure; Adopt magnetron sputtering, thermal evaporation or other film build method deposit transparent conductive film, adopt the normal masks plate that transparent conductive film is carried out composition, in pixel region, form the figure that comprises pixel electrode 13; Pixel electrode 13 is connected with drain electrode 7 through passivation layer via hole 9, like Figure 16 and shown in Figure 17.
Present embodiment provides a kind of TFT-LCD array base palte; At first through the first time composition technology formation grid line and gate electrode figure; Through the composition technology formation second time data wire, source electrode and drain electrode figure; Afterwards through for the third time, the 4th composition technology forms the doping semiconductor layer and the semiconductor layer figure of laterally arranging, and forms the passivation layer via hole figure through the 5th composition technology, forms the pixel electrode figure through the 6th composition technology.Because present embodiment is arranged on doping semiconductor layer and semiconductor layer between source electrode and the drain electrode with the transverse row mode for cloth; Compare with the prior art of using the vertical overlaying structure of each layer; It is poor that present embodiment not only effectively reduces inner section, avoided the film of subsequent deposition to produce fracture, and reduced the thickness of structure graph; It is thick to have reduced box, has improved response speed of liquid crystal.
Figure 28 is the flow chart of TFT-LCD manufacturing method of array base plate first embodiment of the present invention, comprising:
In the present embodiment step 11; Adopt the method for magnetron sputtering or thermal evaporation; Go up deposition one deck grid metallic film at substrate (like glass substrate or quartz base plate); The grid metallic film can adopt the single thin film of aluminium, chromium, tungsten, tantalum, titanium, molybdenum or aluminium nickel, also can adopt the multi-layer compound film that is made up of above-mentioned single thin film.Adopt the normal masks plate that the grid metallic film is carried out composition, on substrate, form the figure that comprises gate electrode and grid line.In the practical application, also can form the public electrode line graph simultaneously in the step 1 of the present invention, form storage capacitance structure of (Cs on Common) on public electrode wire.
Figure 29 is the flow chart that TFT-LCD manufacturing method of array base plate first embodiment of the present invention forms data wire, source electrode, drain electrode and pixel electrode figure, comprising:
Step 211, on the substrate of completing steps 11, using plasma strengthens chemical gaseous phase depositing process deposition gate insulation layer;
Step 212, on the substrate of completing steps 211, adopt the method for magnetron sputtering or thermal evaporation, successively deposit transparent conductive film and source leakage metallic film;
Step 213, leak in the source and to apply one deck photoresist on the metallic film;
Step 214, employing halftoning or gray mask plate make public to photoresist, make the complete reserve area of photoresist formation photoresist, photoresist remove zone and photoresist half reserve area fully; Wherein the complete reserve area of photoresist is corresponding to data wire, source electrode and drain electrode figure region, and photoresist half reserve area is corresponding to pixel electrode figure region, and photoresist is removed the zone fully corresponding to the zone beyond the above-mentioned figure; After the development treatment, the photoresist thickness of the complete reserve area of photoresist does not change, and photoresist is removed the photoresist in zone fully and removed the photoresist thickness attenuation of photoresist half reserve area fully;
Step 215, through the first time etching technics etch away photoresist fully and remove the source in zone fully and leak metallic film and transparent conductive film, form the figure that comprises data wire and source electrode, the source electrode is connected with data wire;
Step 216, remove the photoresist of photoresist half reserve area fully, expose this regional source and leak metallic film through cineration technics;
Step 217, leak metallic film through the source that the second time, etching technics etched away photoresist half reserve area fully, form and comprise drain electrode and pattern of pixel electrodes, drain electrode directly is connected with pixel electrode;
Step 218, peel off remaining photoresist.
Present embodiment is a kind of technical scheme that forms data wire, source electrode, drain electrode and pixel electrode figure through the multistep lithographic method through composition technology simultaneously; Its preparation process is introduced in earlier figures 5～technical scheme shown in Figure 11 in detail, repeats no more here.
Figure 30 is the another kind of flow chart that forms data wire, source electrode, drain electrode and pixel electrode figure of TFT-LCD manufacturing method of array base plate first embodiment of the present invention, comprising:
Present embodiment is the technical scheme that a kind of secondary composition technology that adopts the normal masks plate forms pixel electrode and data wire, source electrode, drain electrode figure respectively; Promptly form the pixel electrode figure, adopt the composition technology of normal masks plate to form data wire, source electrode and drain electrode figure through another time through the composition technology that once adopts the normal masks plate.
In the present embodiment step 13; On the substrate of accomplishing the said structure figure, adopt PECVD method or other film build method, the dopant deposition semiconductive thin film; Adopt the normal masks plate that doped semiconductor films is carried out composition; Form the doped semiconductor layer pattern of horizontally set, the doped semiconductor layer pattern is formed on the inwall of channel region between source electrode and the drain electrode, contacts with the end of source electrode and drain electrode.
In the step 14 of the present invention; On the substrate of accomplishing the said structure figure, adopt PECVD method or other film build method, the deposited semiconductor film; Adopt the normal masks plate that semiconductive thin film is carried out composition; At the inner semiconductor layer figure that forms horizontally set of channel region, semiconductor layer contacts with the inner surface of doping semiconductor layer, between source electrode and drain electrode, forms the doping semiconductor layer and the semiconductor layer of laterally arranging.
In the step 15 of the present invention, on the substrate of accomplishing the said structure figure, deposition one deck passivation layer, passivation layer can be selected oxide, nitride or oxynitrides for use.Adopt the normal masks plate that passivation layer is carried out composition, form grid line interface via hole and data line interface via hole figures.
Figure 31 is the flow chart of TFT-LCD manufacturing method of array base plate second embodiment of the present invention, comprising:
Present embodiment is the technical scheme that a kind of pixel electrode is connected with drain electrode through passivation layer via hole, and its preparation process is introduced in aforementioned Figure 16～technical scheme shown in Figure 27 in detail, repeats no more here.
The invention provides a kind of TFT-LCD manufacturing method of array base plate; Through doping semiconductor layer and semiconductor layer are arranged between source electrode and the drain electrode with the transverse row mode for cloth; It is poor not only to effectively reduce inner section, has avoided the film of subsequent deposition to produce fracture, and has reduced the thickness of structure graph; It is thick to have reduced box, has improved response speed of liquid crystal.
What should explain at last is: above embodiment is only unrestricted in order to technical scheme of the present invention to be described; Although the present invention is specified with reference to preferred embodiment; Those of ordinary skill in the art is to be understood that; Can make amendment or be equal to replacement technical scheme of the present invention, and not break away from the spirit and the scope of technical scheme of the present invention.
Claims (8)
1. a TFT-LCD array base palte comprises the grid line and the data wire that are formed on the substrate, forms pixel electrode and thin-film transistor in the pixel region that said grid line and data wire limit, and it is characterized in that said thin-film transistor comprises:
Gate electrode is formed on the substrate, is connected with grid line;
Gate insulation layer is formed on the gate electrode and covers whole base plate;
The source electrode is formed on the gate insulation layer, and an end is positioned at the top of gate electrode, and the other end is connected with data wire;
Drain electrode is formed on the gate insulation layer, and an end is positioned at the top of gate electrode, and the other end is connected with pixel electrode;
Doping semiconductor layer and semiconductor layer; Be formed between source electrode and the drain electrode with the transverse row mode for cloth; Doping semiconductor layer is formed on the inwall of channel region between source electrode and the drain electrode; Outer surface contacts with the end of source electrode and drain electrode, and semiconductor layer contacts with the inner surface of doping semiconductor layer;
Passivation layer is formed on the said structure figure, and covers whole base plate.
2. TFT-LCD array base palte according to claim 1 is characterized in that said pixel electrode is formed on the gate insulation layer, and directly is connected with drain electrode.
3. TFT-LCD array base palte according to claim 2 is characterized in that, said pixel electrode and data wire are forming with in a composition technology.
4. TFT-LCD array base palte according to claim 1 is characterized in that said pixel electrode is formed on the passivation layer, and is connected with drain electrode through the passivation layer via hole of offering on the passivation layer.
5. a TFT-LCD manufacturing method of array base plate is characterized in that, comprising:
Step 11, on substrate deposition grid metallic film, form the figure that comprises grid line and gate electrode through composition technology;
Step 12, on the substrate of completing steps 11, deposit gate insulation layer, transparent conductive film and metallic film is leaked in the source, form through composition technology to comprise data wire, source electrode, drain electrode and pattern of pixel electrodes, said drain electrode directly is connected with pixel electrode;
Step 13, on the substrate of completing steps 12 the dopant deposition semiconductive thin film; Between source electrode and drain electrode, form the doped semiconductor layer pattern of horizontally set through composition technology; The doped semiconductor layer pattern is formed on the inwall of channel region between source electrode and the drain electrode, contacts with the end of source electrode and drain electrode;
Step 14, on the substrate of completing steps 13 the deposited semiconductor film; Between source electrode and drain electrode, form the semiconductor layer figure of horizontally set through composition technology; Semiconductor layer contacts with the inner surface of doping semiconductor layer, between source electrode and drain electrode, forms the doping semiconductor layer and the semiconductor layer of laterally arranging;
Step 15, on the substrate of completing steps 14 deposit passivation layer, form the figure comprise grid line interface via hole and data line interface via hole through composition technology.
6. TFT-LCD manufacturing method of array base plate according to claim 5 is characterized in that, said step 12 comprises:
On the substrate of completing steps 11, using plasma strengthens chemical gaseous phase depositing process deposition gate insulation layer;
On the substrate of accomplishing abovementioned steps, adopt the method for magnetron sputtering or thermal evaporation, metallic film is leaked in deposit transparent conductive film and source successively;
Leak coating one deck photoresist on the metallic film in the source;
Adopt halftoning or gray mask plate that photoresist is made public, make the complete reserve area of photoresist formation photoresist, photoresist remove zone and photoresist half reserve area fully; Wherein the complete reserve area of photoresist is corresponding to data wire, source electrode and drain electrode figure region, and photoresist half reserve area is corresponding to pixel electrode figure region, and photoresist is removed the zone fully corresponding to the zone beyond the above-mentioned figure; After the development treatment, the photoresist thickness of the complete reserve area of photoresist does not change, and photoresist is removed the photoresist in zone fully and removed the photoresist thickness attenuation of photoresist half reserve area fully;
Through the first time etching technics etch away photoresist fully and remove the source in zone fully and leak metallic film and transparent conductive film, form the figure that comprises data wire and source electrode, the source electrode is connected with data wire;
Remove the photoresist of photoresist half reserve area fully through cineration technics, expose this regional source and leak metallic film;
Metallic film is leaked in source through the second time, etching technics etched away photoresist half reserve area fully, forms to comprise drain electrode and pattern of pixel electrodes, and drain electrode directly is connected with pixel electrode;
Peel off remaining photoresist.
7. TFT-LCD manufacturing method of array base plate according to claim 5 is characterized in that, said step 12 comprises:
On the substrate of completing steps 11, using plasma strengthens chemical gaseous phase depositing process deposition gate insulation layer;
On the substrate of accomplishing abovementioned steps, adopt the method for magnetron sputtering or thermal evaporation, the deposit transparent conductive film;
Adopt the normal masks plate to form and comprise pattern of pixel electrodes through composition technology;
On the substrate of accomplishing abovementioned steps, adopt the method for magnetron sputtering or thermal evaporation, sedimentary origin leaks metallic film;
Adopt the normal masks plate to form the figure that comprises data wire, source electrode and drain electrode through composition technology, drain electrode directly is connected with pixel electrode.
8. a TFT-LCD manufacturing method of array base plate is characterized in that, comprising:
Step 21, on substrate deposition grid metallic film, form the figure that comprises grid line and gate electrode through composition technology;
Step 22, metallic film is leaked in deposition gate insulation layer and source on the substrate of completing steps 21, forms the figure that comprises data wire, source electrode and drain electrode through composition technology;
Step 23, on the substrate of completing steps 22 the dopant deposition semiconductive thin film, between source electrode and drain electrode, form the doped semiconductor layer pattern of horizontally set through composition technology;
Step 24, on the substrate of completing steps 23 the deposited semiconductor film; Between source electrode and drain electrode, form the semiconductor layer figure of horizontally set through composition technology; Doping semiconductor layer is formed on the inwall of channel region between source electrode and the drain electrode; Outer surface contacts with the end of source electrode and drain electrode, and semiconductor layer contacts with the inner surface of doping semiconductor layer;
Step 25, on the substrate of completing steps 24 deposit passivation layer, form the figure comprise passivation layer via hole in the drain electrode position through composition technology;
Step 26, on the substrate of completing steps 25 the deposit transparent conductive film, form through composition technology and to comprise pattern of pixel electrodes, pixel electrode is connected with drain electrode through passivation layer via hole.
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| US6100954A (en) * | 1996-03-26 | 2000-08-08 | Lg Electronics Inc. | Liquid crystal display with planarizing organic gate insulator and organic planarization layer and method for manufacturing |
| CN1987624A (en) * | 2006-11-17 | 2007-06-27 | 京东方科技集团股份有限公司 | TFT LCD array base board structure and its producing method |
| CN101290446A (en) * | 2008-05-16 | 2008-10-22 | 京东方科技集团股份有限公司 | TFT-LCD array substrate and method of manufacture |
| CN101320737A (en) * | 2007-06-08 | 2008-12-10 | 北京京东方光电科技有限公司 | Thin-film transistor structure and preparation method thereof |
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| US6100954A (en) * | 1996-03-26 | 2000-08-08 | Lg Electronics Inc. | Liquid crystal display with planarizing organic gate insulator and organic planarization layer and method for manufacturing |
| CN1987624A (en) * | 2006-11-17 | 2007-06-27 | 京东方科技集团股份有限公司 | TFT LCD array base board structure and its producing method |
| CN101320737A (en) * | 2007-06-08 | 2008-12-10 | 北京京东方光电科技有限公司 | Thin-film transistor structure and preparation method thereof |
| CN101290446A (en) * | 2008-05-16 | 2008-10-22 | 京东方科技集团股份有限公司 | TFT-LCD array substrate and method of manufacture |
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