CN101901832A - Controlled silicon punchthrough structure formed by gallium diffusion and production method thereof - Google Patents
Controlled silicon punchthrough structure formed by gallium diffusion and production method thereof Download PDFInfo
- Publication number
- CN101901832A CN101901832A CN 201010212178 CN201010212178A CN101901832A CN 101901832 A CN101901832 A CN 101901832A CN 201010212178 CN201010212178 CN 201010212178 CN 201010212178 A CN201010212178 A CN 201010212178A CN 101901832 A CN101901832 A CN 101901832A
- Authority
- CN
- China
- Prior art keywords
- gallium
- diffusion
- break
- punchthrough
- etching tank
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
The invention discloses a controlled silicon punchthrough structure formed by gallium diffusion and a production method thereof, wherein the controlled silicon punchthrough structure formed by the gallium diffusion comprises a long base region of the controlled silicon and gallium punchthrough diffusion regions; and the gallium punchthrough diffusion regions are arranged at left and right sides of the long base region, the upper and lower angles of the two gallium punchthrough diffusion regions are provided with gallium etch tanks; and the production method of the controlled silicon punchthrough structure formed by the gallium diffusion comprises the following steps: a step of a N silicon wafer growth oxide layer and a photoetching punchthrough ring and a step of the etch tanks, the gallium diffusion and the reduction and gallium punchthrough diffusion. The invention has the advantages that boron punchthrough diffusion can be carried out under the temperatures of 1260 DEG C and 1270 DEG C, the corresponding punchthrough time is 170 hours and 120 hours; the punchthrough temperature is low, the punchthrough time is short, minority carrier lifetime is long and the controlled silicon voltage is high; and concentration of the gallium diffusion is low, ohms per square R is about 100-200 omega/square and reverse blocking voltage is low.
Description
Technical field
The present invention relates to a kind of gallium and diffuse to form controllable silicon break-through structure.
The invention still further relates to a kind of gallium and diffuse to form the production method of controllable silicon break-through structure.
Background technology
Controllable silicon break-through diffusion of the prior art is often referred to boron break-through diffusion, but boron break-through diffusion temperature height reaches 1270 degrees centigrade, and diffusion time is long, wants 180 hours usually; The temperature height causes minority carrier life time to reduce greatly, causes the controllable silicon blocking voltage to reduce; Boron diffusion concentration overrich causes controllable silicon reverse blocking voltage to reduce.
Summary of the invention
The purpose of this invention is to provide a kind of gallium and diffuse to form controllable silicon break-through structure.
Another object of the present invention provides the production method that a kind of gallium diffuses to form controllable silicon break-through structure.
The technical solution used in the present invention is:
The controllable silicon break-through structure that a kind of gallium diffuses to form comprises the controllable silicon growing base area, also comprises gallium break-through diffusion region, and the left and right sides of growing base area is located in described gallium break-through diffusion region, described each gallium break-through diffusion region up and down two jiaos be provided with the gallium etching tank.
A kind of gallium diffuses to form the production method of controllable silicon break-through structure, comprises N type silicon chip growth oxide layer and photoetching break-through ring step, also comprises etching tank, gallium diffusion, attenuate and gallium break-through diffusing step,
Described etching tank step is: will carry out controlled silicon chip behind the photoetching break-through ring and place and fill 0 degree centigrade of chemical corrosion liquid (glacial acetic acid: HF: HNO
3:=1.5: carry out the etching tank operation in the container 3: 10 volume ratios), corrosion groove depth 16-24 micron;
Described gallium diffusing step is: the controlled silicon chip that will carry out behind the etching tank places in the high temperature dispersing furnace, does the gallium source with gallic oxide and carries out the diffusion of open pipe gallium, diffusion temperature: T=1200 degree centigrade, time t=90-120 minute, feeds nitrogen 3-4L/ minute during diffusion; Feed hydrogen simultaneously, described hydrogen feeds earlier and fills in the airtight container of deionized water, passes deionized water then and enters in the high temperature dispersing furnace again, and the speed that enters high temperature dispersing furnace is with a deionized water 100-150 bubble/minute be as the criterion; After the gallium diffusion is finished, all form one deck gallium diffusion region in silicon chip surface and the etching tank, diffusion concentration is R
=100-200 Ω/, junction depth X
j=15-20 μ m;
Described attenuate step is: the controlled silicon chip that will finish after gallium spreads utilizes the attenuate machine to carry out attenuate, is thinned to etching tank degree of depth 5-7 micron;
Described gallium break-through diffusing step is: the controlled silicon chip behind the attenuate is placed carry out the break-through diffusion in the high temperature dispersing furnace, gallium in the etching tank diffuses to controlled silicon chip inside when high temperature, diffusion temperature 1260-1270 degree centigrade, 120-170 hour diffusion time, fed nitrogen 3-4L/ minute during diffusion; After the gallium diffusion is finished, form the gallium reach through region in the silicon slice corrosion groove, positive back side gallium diffusion zone handing-over distance is between the 120-160 micron.
Advantage of the present invention is: boron break-through diffusion all can be carried out break-through under 1260 degrees centigrade and 1270 degrees centigrade of temperature, the break-through time corresponds to 170 hours and 120 hours; The break-through temperature is low, the break-through time short, and minority carrier life time is long, the silicon controlled rectifier voltage height; The gallium diffusion concentration is low, R
About 100-200 Ω/, reverse blocking voltage is low.
Description of drawings
Fig. 1 is a structural representation of the present invention.
Wherein: 1, growing base area, 2, gallium break-through diffusion region, 3, the gallium etching tank.
Embodiment
Embodiment 1
As shown in Figure 1, the controllable silicon break-through structure that a kind of gallium of the present invention diffuses to form comprises controllable silicon growing base area 1, also comprises gallium break-through diffusion region 2, the left and right sides of growing base area 1 is located in gallium break-through diffusion region 2, each gallium break-through diffusion region 2 up and down two jiaos be provided with gallium etching tank 3.
A kind of gallium diffuses to form the method for controllable silicon break-through structure, comprises N type silicon chip growth oxide layer and photoetching break-through ring step, also comprises etching tank, gallium diffusion, attenuate and boron break-through diffusing step,
N type silicon chip growth oxide layer step: place high temperature dispersing furnace to carry out oxidation controlled silicon chip, in oxidizing temperature is under 1130 degree, at first carried out dry-oxygen oxidation 1 hour, carried out wet-oxygen oxidation then 5 hours, carried out dry-oxygen oxidation again 1 hour at last, realize that the once oxidation layer thickness of controlled silicon chip reaches 0.6 micron;
Photoetching break-through ring step: the controlled silicon chip after the oxidation is placed on the double face photoetching machine, behind positive back side reticle figure aligning, controlled silicon chip is carried out photoetching, utilize oxide layer chemical corrosion liquid (deionized water: ammonium fluoride: hydrofluoric acid=10ml: 6g: 3ml) break-through ring internal oxidation layer is thoroughly eroded, form the break-through ring, thereby expose silicon, photoresist is not removed;
Described etching tank step is: will carry out controlled silicon chip behind the photoetching break-through ring and place and fill 0 degree centigrade of chemical corrosion liquid (glacial acetic acid: HF: HNO
3:=1.5: carry out the etching tank operation in the container 3: 10 volume ratios), 16 microns of corrosion groove depths;
Described gallium diffusing step is: the controlled silicon chip that will carry out behind the etching tank places in the high temperature dispersing furnace, does the gallium source with gallic oxide and carries out the diffusion of open pipe gallium, diffusion temperature: T=1200 degree centigrade, time t=90 minute, feeds nitrogen 3L/ minute during diffusion; Feed hydrogen simultaneously, described hydrogen feeds earlier and fills in the airtight container of deionized water, passes deionized water then and enters in the high temperature dispersing furnace again, and the speed that enters high temperature dispersing furnace is with 100 bubbles of deionized water/minute be as the criterion; After the gallium diffusion is finished, all form one deck gallium diffusion region in silicon chip surface and the etching tank, diffusion concentration is R
=200 Ω/, junction depth X
j=15 μ m;
Described attenuate step is: the controlled silicon chip that will finish after gallium spreads utilizes the attenuate machine to carry out attenuate, is thinned to 5 microns of the etching tank degree of depth;
Described gallium break-through diffusing step is: the controlled silicon chip behind the attenuate is placed carry out the break-through diffusion in the high temperature dispersing furnace, gallium in the etching tank diffuses to controlled silicon chip inside when high temperature, 1260 degrees centigrade of diffusion temperatures, fed nitrogen 3L/ minute during diffusion at 170 hours diffusion times; After the gallium diffusion is finished, form the gallium reach through region in the silicon slice corrosion groove, positive back side gallium diffusion zone handing-over distance is at 120 microns.
Advantage of the present invention is: gallium break-through diffusion all can be carried out break-through under 1260 degrees centigrade and 1270 degrees centigrade of temperature, the break-through time corresponds to 170 hours and 120 hours; The break-through temperature is low, the break-through time short, and minority carrier life time is long, the silicon controlled rectifier voltage height; The gallium diffusion concentration is low, R
About 100-200 Ω/, reverse blocking voltage is low.
Embodiment 2
A kind of gallium diffuses to form the production method of controllable silicon break-through structure, comprises N type silicon chip growth oxide layer and photoetching break-through ring step, also comprises etching tank, gallium diffusion, attenuate and gallium break-through diffusing step,
Described etching tank step is: will carry out controlled silicon chip behind the photoetching break-through ring and place and fill 0 degree centigrade of chemical corrosion liquid (glacial acetic acid: HF: HNO
3:=1.5: carry out the etching tank operation in the container 3: 10 volume ratios), 20 microns of corrosion groove depths;
Described gallium diffusing step is: the controlled silicon chip that will carry out behind the etching tank places in the high temperature dispersing furnace, does the gallium source with gallic oxide and carries out the diffusion of open pipe gallium, diffusion temperature: T=1200 degree centigrade, time t=100 minute, feeds nitrogen 3.5L/ minute during diffusion; Feed hydrogen simultaneously, described hydrogen feeds earlier and fills in the airtight container of deionized water, passes deionized water then and enters in the high temperature dispersing furnace again, and the speed that enters high temperature dispersing furnace is with 120 bubbles of deionized water/minute be as the criterion; After the gallium diffusion is finished, all form one deck gallium diffusion region in silicon chip surface and the etching tank, diffusion concentration is R
=150 Ω/, junction depth X
j=18 μ m;
Described attenuate step is: the controlled silicon chip that will finish after gallium spreads utilizes the attenuate machine to carry out attenuate, is thinned to 6 microns of the etching tank degree of depth;
Described gallium break-through diffusing step is: the controlled silicon chip behind the attenuate is placed carry out the break-through diffusion in the high temperature dispersing furnace, gallium in the etching tank diffuses to controlled silicon chip inside when high temperature, 1265 degrees centigrade of diffusion temperatures, fed nitrogen 3.5L/ minute during diffusion at 150 hours diffusion times; After the gallium diffusion is finished, form the gallium reach through region in the silicon slice corrosion groove, positive back side gallium diffusion zone handing-over distance is at 140 microns.
All the other are with embodiment 1.
Embodiment 3
A kind of gallium diffuses to form the production method of controllable silicon break-through structure, comprises N type silicon chip growth oxide layer and photoetching break-through ring step, also comprises etching tank, gallium diffusion, attenuate and gallium break-through diffusing step,
Described etching tank step is: will carry out controlled silicon chip behind the photoetching break-through ring and place and fill 0 degree centigrade of chemical corrosion liquid (glacial acetic acid: HF: HNO
3:=1.5: carry out the etching tank operation in the container 3: 10 volume ratios), 24 microns of corrosion groove depths;
Described gallium diffusing step is: the controlled silicon chip that will carry out behind the etching tank places in the high temperature dispersing furnace, does the gallium source with gallic oxide and carries out the diffusion of open pipe gallium, diffusion temperature: T=1200 degree centigrade, time t=120 minute, feeds nitrogen 4L/ minute during diffusion; Feed hydrogen simultaneously, described hydrogen feeds earlier and fills in the airtight container of deionized water, passes deionized water then and enters in the high temperature dispersing furnace again, and the speed that enters high temperature dispersing furnace is with 150 bubbles of deionized water/minute be as the criterion; After the gallium diffusion is finished, all form one deck gallium diffusion region in silicon chip surface and the etching tank, diffusion concentration is R
=100 Ω/, junction depth X
j=20 μ m;
Described attenuate step is: the controlled silicon chip that will finish after gallium spreads utilizes the attenuate machine to carry out attenuate, is thinned to 7 microns of the etching tank degree of depth;
Described gallium break-through diffusing step is: the controlled silicon chip behind the attenuate is placed carry out the break-through diffusion in the high temperature dispersing furnace, gallium in the etching tank diffuses to controlled silicon chip inside when high temperature, 1270 degrees centigrade of diffusion temperatures, fed nitrogen 4L/ minute during diffusion at 120 hours diffusion times; After the gallium diffusion is finished, form the gallium reach through region in the silicon slice corrosion groove, positive back side gallium diffusion zone handing-over distance is at 160 microns.All the other are with embodiment 1.
Claims (2)
1. the controllable silicon break-through structure that gallium diffuses to form comprises the controllable silicon growing base area, it is characterized in that also comprising gallium break-through diffusion region, and the left and right sides of growing base area is located in described gallium break-through diffusion region, described each gallium break-through diffusion region up and down two jiaos be provided with the gallium etching tank.
2. a gallium diffuses to form the production method of controllable silicon break-through structure, comprises N type silicon chip growth oxide layer and photoetching break-through ring step, it is characterized in that: also comprise etching tank, gallium diffusion, attenuate and gallium break-through diffusing step,
Described etching tank step is: will carry out controlled silicon chip behind the photoetching break-through ring and place and fill 0 degree centigrade of chemical corrosion liquid (glacial acetic acid: HF: HNO
3:=1.5: carry out the etching tank operation in the container 3: 10 volume ratios), corrosion groove depth 16-24 micron;
Described gallium diffusing step is: the controlled silicon chip that will carry out behind the etching tank places in the high temperature dispersing furnace, does the gallium source with gallic oxide and carries out the diffusion of open pipe gallium, diffusion temperature: T=1200 degree centigrade, time t=90-120 minute, feeds nitrogen 3-4L/ minute during diffusion; Feed hydrogen simultaneously, described hydrogen feeds earlier and fills in the airtight container of deionized water, passes deionized water then and enters in the high temperature dispersing furnace again, and the speed that enters high temperature dispersing furnace is with a deionized water 100-150 bubble/minute be as the criterion; After the gallium diffusion is finished, all form one deck gallium diffusion region in silicon chip surface and the etching tank, diffusion concentration is R
=100-200 Ω/, junction depth X
j=15-20 μ m;
Described attenuate step is: the controlled silicon chip that will finish after gallium spreads utilizes the attenuate machine to carry out attenuate, is thinned to etching tank degree of depth 5-7 micron;
Described gallium break-through diffusing step is: the controlled silicon chip behind the attenuate is placed carry out the break-through diffusion in the high temperature dispersing furnace, gallium in the etching tank diffuses to controlled silicon chip inside when high temperature, diffusion temperature 1260-1270 degree centigrade, 120-170 hour diffusion time, fed nitrogen 3-4L/ minute during diffusion; After the gallium diffusion is finished, form the gallium reach through region in the silicon slice corrosion groove, positive back side gallium diffusion zone handing-over distance is between the 120-160 micron.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010102121784A CN101901832B (en) | 2010-06-28 | 2010-06-28 | Controlled silicon punchthrough structure formed by gallium diffusion and production method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010102121784A CN101901832B (en) | 2010-06-28 | 2010-06-28 | Controlled silicon punchthrough structure formed by gallium diffusion and production method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101901832A true CN101901832A (en) | 2010-12-01 |
CN101901832B CN101901832B (en) | 2012-05-23 |
Family
ID=43227225
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2010102121784A Active CN101901832B (en) | 2010-06-28 | 2010-06-28 | Controlled silicon punchthrough structure formed by gallium diffusion and production method thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN101901832B (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102157547A (en) * | 2011-04-01 | 2011-08-17 | 启东吉莱电子有限公司 | Short base region structure for improving high voltage and large current tolerance of thyristor and production method thereof |
CN102789981A (en) * | 2012-07-18 | 2012-11-21 | 启东吉莱电子有限公司 | Production process of silicon-controlled rectifier |
CN102789980A (en) * | 2012-07-18 | 2012-11-21 | 启东吉莱电子有限公司 | Production process of short base region structure for improving voltage |
CN103151263A (en) * | 2013-03-11 | 2013-06-12 | 浙江正邦电力电子有限公司 | Preparation method of thyristor chip |
CN111816553A (en) * | 2020-05-29 | 2020-10-23 | 济宁东方芯电子科技有限公司 | Production method of silicon-controlled chip with punch-through structure |
CN111933684A (en) * | 2020-06-23 | 2020-11-13 | 济宁东方芯电子科技有限公司 | Silicon controlled rectifier isolation wall and short base region synchronous diffusion structure and method |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55123165A (en) * | 1979-03-15 | 1980-09-22 | Mitsubishi Electric Corp | Semiconductor device |
US4243999A (en) * | 1977-03-08 | 1981-01-06 | Tokyo Shibaura Electric Co., Ltd. | Gate turn-off thyristor |
US6448589B1 (en) * | 2000-05-19 | 2002-09-10 | Teccor Electronics, L.P. | Single side contacts for a semiconductor device |
US20050250272A1 (en) * | 2004-05-03 | 2005-11-10 | Holm-Kennedy James W | Biosensor performance enhancement features and designs |
CN101228635A (en) * | 2005-07-22 | 2008-07-23 | Abb技术有限公司 | Power semiconductor device |
CN101236903A (en) * | 2008-03-11 | 2008-08-06 | 启东吉莱电子有限公司 | Technology method for improving bidirectional small thyristor III quadrant trigger sensibility |
CN100414685C (en) * | 2006-08-28 | 2008-08-27 | 汤庆敏 | Manufacturing process of semiconductor device chip punch through isolation area and PN junction |
CN201804871U (en) * | 2010-06-28 | 2011-04-20 | 启东吉莱电子有限公司 | Silicon controlled penetrating structure formed by gallium diffusion |
-
2010
- 2010-06-28 CN CN2010102121784A patent/CN101901832B/en active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4243999A (en) * | 1977-03-08 | 1981-01-06 | Tokyo Shibaura Electric Co., Ltd. | Gate turn-off thyristor |
JPS55123165A (en) * | 1979-03-15 | 1980-09-22 | Mitsubishi Electric Corp | Semiconductor device |
US6448589B1 (en) * | 2000-05-19 | 2002-09-10 | Teccor Electronics, L.P. | Single side contacts for a semiconductor device |
US20050250272A1 (en) * | 2004-05-03 | 2005-11-10 | Holm-Kennedy James W | Biosensor performance enhancement features and designs |
CN101228635A (en) * | 2005-07-22 | 2008-07-23 | Abb技术有限公司 | Power semiconductor device |
CN100414685C (en) * | 2006-08-28 | 2008-08-27 | 汤庆敏 | Manufacturing process of semiconductor device chip punch through isolation area and PN junction |
CN101236903A (en) * | 2008-03-11 | 2008-08-06 | 启东吉莱电子有限公司 | Technology method for improving bidirectional small thyristor III quadrant trigger sensibility |
CN201804871U (en) * | 2010-06-28 | 2011-04-20 | 启东吉莱电子有限公司 | Silicon controlled penetrating structure formed by gallium diffusion |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102157547A (en) * | 2011-04-01 | 2011-08-17 | 启东吉莱电子有限公司 | Short base region structure for improving high voltage and large current tolerance of thyristor and production method thereof |
CN102789981A (en) * | 2012-07-18 | 2012-11-21 | 启东吉莱电子有限公司 | Production process of silicon-controlled rectifier |
CN102789980A (en) * | 2012-07-18 | 2012-11-21 | 启东吉莱电子有限公司 | Production process of short base region structure for improving voltage |
CN102789980B (en) * | 2012-07-18 | 2015-01-07 | 启东吉莱电子有限公司 | Production process of short base region structure for improving voltage |
CN102789981B (en) * | 2012-07-18 | 2015-02-25 | 启东吉莱电子有限公司 | Production process of silicon-controlled rectifier |
CN103151263A (en) * | 2013-03-11 | 2013-06-12 | 浙江正邦电力电子有限公司 | Preparation method of thyristor chip |
CN103151263B (en) * | 2013-03-11 | 2015-08-19 | 浙江正邦电力电子有限公司 | A kind of thyristor chip preparation method |
CN111816553A (en) * | 2020-05-29 | 2020-10-23 | 济宁东方芯电子科技有限公司 | Production method of silicon-controlled chip with punch-through structure |
CN111933684A (en) * | 2020-06-23 | 2020-11-13 | 济宁东方芯电子科技有限公司 | Silicon controlled rectifier isolation wall and short base region synchronous diffusion structure and method |
CN111933684B (en) * | 2020-06-23 | 2022-12-09 | 济宁东方芯电子科技有限公司 | Silicon controlled rectifier isolation wall and short base region synchronous diffusion structure and method |
Also Published As
Publication number | Publication date |
---|---|
CN101901832B (en) | 2012-05-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101901832B (en) | Controlled silicon punchthrough structure formed by gallium diffusion and production method thereof | |
CN103710705B (en) | A kind of additive of polycrystalline silicon wafer acidity texture preparation liquid and application thereof | |
CN104201102B (en) | A kind of fast recovery diode FRD chips and its manufacture craft | |
CN102082093B (en) | Manufacturing technique of chip for two-way voltage regulator diode DB3 | |
CN104505437B (en) | A kind of diamond wire cutting making herbs into wool pretreatment fluid of polysilicon chip, making herbs into wool preprocess method and making herbs into wool pretreatment silicon chip and application thereof | |
CN101916786A (en) | High-power planar junction bidirectional TVS diode chip and production method thereof | |
CN105355654A (en) | Low-voltage transient-suppression diode chip with low electric leakage and high reliability and production method | |
CN106463550A (en) | Relative dopant concentration levels in solar cells | |
CN102222719A (en) | Surface processing method of crystal system silicon substrate for solar cells and manufacturing method of solar cells | |
CN101615590A (en) | Adopt the method for selective etching prepared silicon-on-insulator material | |
CN109103242A (en) | A kind of controlled silicon chip and its production method of punch-through | |
CN102738060B (en) | Preparation method of gate oxide integrity (GOI) wafer structure | |
CN104143589B (en) | Double-sided diffusion method of solar cell | |
CN109449251A (en) | A kind of preparation method of selective emitter of solar battery | |
CN110060934B (en) | Manufacturing process of four-diode integrated chip | |
CN111816553B (en) | Production method of silicon-controlled chip with punch-through structure | |
CN106133922A (en) | The manufacture method of solaode and solaode | |
CN110112130B (en) | Manufacturing process of novel four-diode integrated chip | |
CN205385026U (en) | Two -way discharge tube chip | |
CN101901833B (en) | Monodirectional silicon controlled rectifier structure for improving switching speed and production method thereof | |
CN100477082C (en) | Production of polishing sheet single-sided main diffusion | |
CN104022187B (en) | The implementation method of the selective emitter junction structure of N-type crystalline silicon solaode | |
CN102938371A (en) | Method for preparing n+/ p-type ultra-shallow junction on p-type Ge substrate | |
CN104617188B (en) | A kind of solaode boron phosphorus is low to intersect doping processing technology | |
WO2020220664A1 (en) | Manufacturing process for rectification diode chip capable of being combined in parallel |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CP03 | Change of name, title or address | ||
CP03 | Change of name, title or address |
Address after: No.1800, Mudanjiang West Road, Huilong Town, Nantong City, Jiangsu Province, 226000 Patentee after: Jiangsu Jilai Microelectronics Co.,Ltd. Address before: 1261 Gongyuan North Road, Huilong Town, Qidong City, Nantong City, Jiangsu Province Patentee before: QIDONG JILAI ELECTRONICS Co.,Ltd. |