CN101917372B - Pre-demodulating, frequency discriminating and demodulating method, pre-demodulator, frequency discriminator and demodulator - Google Patents

Abstract

The embodiment of the invention discloses a frequency shift keying (FSK) pre-demodulating, frequency discriminating and demodulating method applicable to digital devices, a pre-demodulator for realizing the pre-demodulating, a frequency discriminator for realizing the frequency discriminating method and a demodulator for realizing the demodulating method. The pre-demodulating method comprises the following steps of: pre-processing an FSK signal to obtain a to-be-demodulated digital signal, wherein a numerical value in the to-be-demodulated digital signal is an unsigned numerical value; and pre-demodulating the to-be-demodulated digital signal by using locally generated digital signals with different frequencies to obtain a plurality of comparison signals respectively, wherein the numerical values in both a locally generated sinusoidal digital signal and a locally generated cosinoidal digital signal are unsigned numerical values. Thus, because the numerical values in both the locally generated digital signal and the to-be-demodulated digital signal are unsigned numerical values, the mutual operation is unsigned operation and is suitable to be realized by using the digital devices.

Description

Pre-demodulating, frequency discrimination and demodulation method, and predemodulator, frequency discriminator and demodulator

Technical field

The present invention relates to the signal processing technology field, more particularly, relate to frequency shift keying pre-demodulating, frequency discrimination and demodulation method, and predemodulator, frequency discriminator and demodulator.

Background technology

Frequency shift keying (Frequency shift keying, FSK) is to utilize the discrete value characteristics of binary system or multi-system baseband digital signal to go keyed carrier (carrier wave is for sinusoidal wave) frequency with a kind of modulation system of transmission of information.

Comprise a plurality of different carrier frequency in the fsk signal by the generation of FSK modulation system, the system radix that the quantity of its carrier frequency and baseband digital signal are corresponding is identical, for example when baseband digital signal was binary system, the quantity of the carrier frequency that corresponding binary FSK signal (being designated as 2FSK) comprises was 2.See also Fig. 1, among Fig. 1, f ₁The expression frequency is f ₁Carrier wave (sine wave), f ₂The expression frequency is f ₂Carrier wave (sine wave), S (t) expression binary system base band digital signal, 2FSK represents the 2FSK signal.In a code check cycle T, when S (t) symbol was 0, frequency corresponding to 2FSK signal was f in this cycle ₁, and when S (t) symbol was 1, the frequency that fsk signal is corresponding was f ₂In like manner, when baseband digital signal was quaternary numeral signal, the quantity of the carrier frequency that corresponding fsk signal comprises was 4.

Fsk signal has multiple demodulation mode, wherein a kind ofly is: at first fsk signal is carried out pre-demodulating and process to obtain a plurality of comparison signals, wherein, each comparison signal is corresponding with a certain carrier frequency.Then, implement the size of frequency discrimination-more above-mentioned a plurality of comparison signals, can judge that signal to be demodulated is at the carrier frequency of a certain code check correspondence in the cycle.The corresponding relation of symbol reduces to baseband digital signal in the carrier frequency that last basis identifies and the baseband digital signal, with the demodulation of final realization FSK.Still take signal shown in Figure 1 as example, in a code check cycle T, as respective frequencies f ₁Comparison signal greater than respective frequencies f ₂Comparison signal the time, identifying carrier frequency corresponding to 2FSK signal is f ₁, and then can judge that the symbol of S (t) in this cycle is 0, and as respective frequencies f ₁Comparison signal less than respective frequencies f ₂Comparison signal the time, identifying carrier frequency corresponding to 2FSK signal is f ₂, and and then judge that the symbol of S (t) is 1, so can realize the reduction to S (t) signal.

Yet when implementing the invention, the inventor finds, the pre-demodulating of traditional F SK, frequency discrimination and demodulation mode are owing to there are the shortcomings such as temperature is floated, limited reliability in a large amount of analog components that adopt, and therefore, using digital device that fsk signal is carried out pre-demodulating, frequency discrimination and demodulation is a kind of trend.And how to find the pre-demodulating, frequency discrimination and the demodulation mode that are suitable for digital device to become the problem that will solve of needing badly.

Summary of the invention

In view of this, embodiment of the invention purpose is to provide frequency shift keying pre-demodulating, frequency discrimination and the demodulation method that is suitable for digital device, and implement above-mentioned pre-demodulating predemodulator, implement the frequency discriminator of above-mentioned frequency discrimination method and implement the demodulator of above-mentioned demodulation method.

According to an aspect of the present invention, provide a kind of frequency shift keying FSK pre-demodulating method, this pre-demodulating method comprises:

Fsk signal is carried out preliminary treatment obtain digital signal to be demodulated, the numerical value in the described digital signal to be demodulated is unsigned value;

The local generating digital signal that use has a different frequency carries out pre-demodulating to described digital signal to be demodulated respectively and processes to obtain a plurality of comparison signals, described local generating digital signal comprises that frequency and initial phase all identical this locality generate sinusoidal digital signal and the local cosine digital signal that generates, the described local numerical value that generates in sinusoidal digital signal and the local generation cosine digital signal is unsigned value, and the frequency of the described local sinusoidal digital signal of generation and local generation cosine digital signal is corresponding one by one with the carrier frequency of described baseband digital signal keying;

Described pre-demodulating is processed and is comprised:

In the predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by the described local sinusoidal digital signal of generation and described digital signal to be demodulated, generate the sinusoidal demodulation integrated signal, the upper limit in described predetermined integral interval and the difference of lower limit are T, and described T is a code check cycle of baseband digital signal;

In described predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by this locality generation cosine digital signal and described digital signal to be demodulated, generate cosine demodulation integrated signal;

Utilize described sinusoidal demodulation integrated signal and cosine demodulation integrated signal to obtain comparison signal.

According to another aspect of the present invention, provide a kind of frequency shift keying FSK frequency discrimination method, be used for differentiating the corresponding carrier frequency of fsk signal that is generated by baseband digital signal keyed carrier frequency, this frequency discrimination method comprises:

Described fsk signal is carried out preliminary treatment obtain digital signal to be demodulated, the numerical value in the described digital signal to be demodulated is unsigned value;

The local generating digital signal that use has a different frequency carries out pre-demodulating to described digital signal to be demodulated respectively and processes to obtain a plurality of comparison signals, described local generating digital signal comprises that frequency and initial phase all identical this locality generate sinusoidal digital signal and the local cosine digital signal that generates, the described local numerical value that generates in sinusoidal digital signal and the local generation cosine digital signal is unsigned value, and the frequency of the described local sinusoidal digital signal of generation and local generation cosine digital signal is corresponding one by one with the carrier frequency of described baseband digital signal keying;

From described a plurality of comparison signals, select maximum comparison signal, and obtain carrier frequency corresponding to described fsk signal according to the frequency of the corresponding local generating digital signal of described maximum comparison signal;

Described pre-demodulating is processed and is comprised:

In the predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by the described local sinusoidal digital signal of generation and described digital signal to be demodulated, generate the sinusoidal demodulation integrated signal, the upper limit in described predetermined integral interval and the difference of lower limit are T, and described T is a code check cycle of baseband digital signal;

In described predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by this locality generation cosine digital signal and described digital signal to be demodulated, generate cosine demodulation integrated signal;

Utilize described sinusoidal demodulation integrated signal and cosine demodulation integrated signal to obtain comparison signal.

According to a further aspect of the invention, provide a kind of frequency shift keying FSK demodulation method, be used for the fsk signal that is generated by baseband digital signal keyed carrier frequency is carried out demodulation, this demodulation method comprises:

Described fsk signal is carried out preliminary treatment obtain digital signal to be demodulated, the numerical value in the described digital signal to be demodulated is unsigned value;

The local generating digital signal that use has a different frequency carries out pre-demodulating to described digital signal to be demodulated respectively and processes to obtain a plurality of comparison signals, described local generating digital signal comprises that frequency and initial phase all identical this locality generate sinusoidal digital signal and the local cosine digital signal that generates, the described local numerical value that generates in sinusoidal digital signal and the local generation cosine digital signal is unsigned value, and the frequency of the described local sinusoidal digital signal of generation and local generation cosine digital signal is corresponding one by one with the carrier frequency of described baseband digital signal keying;

From described a plurality of comparison signals, select maximum comparison signal, and obtain carrier frequency corresponding to described fsk signal according to the frequency of the corresponding local generating digital signal of described maximum comparison signal;

Corresponding relation according to symbol in carrier frequency corresponding to described fsk signal and the baseband digital signal reduces to described baseband digital signal;

Described pre-demodulating is processed and is comprised:

In the predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by the described local sinusoidal digital signal of generation and described digital signal to be demodulated, generate the sinusoidal demodulation integrated signal, the upper limit in described predetermined integral interval and the difference of lower limit are T, and described T is a code check cycle of baseband digital signal;

In described predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by this locality generation cosine digital signal and described digital signal to be demodulated, generate cosine demodulation integrated signal;

Utilize described sinusoidal demodulation integrated signal and cosine demodulation integrated signal to obtain comparison signal.

According to a further aspect of the invention, provide a kind of frequency shift keying predemodulator, this predemodulator comprises pretreatment unit and pre-demodulating unit, wherein,

Pretreatment unit is used for that described fsk signal is carried out preliminary treatment and obtains digital signal to be demodulated, and the numerical value in the described digital signal to be demodulated is unsigned value;

The pre-demodulating unit, be used for using the local generating digital signal with different frequency respectively described digital signal to be demodulated to be carried out pre-demodulating and process to obtain a plurality of comparison signals, described local generating digital signal comprises that frequency and initial phase all identical this locality generate sinusoidal digital signal and the local cosine digital signal that generates, the described local numerical value that generates in sinusoidal digital signal and the local generation cosine digital signal is unsigned value, and the frequency of the described local sinusoidal digital signal of generation and local generation cosine digital signal is corresponding one by one with the carrier frequency of described baseband digital signal keying;

Described pre-demodulating is processed and is comprised:

In the predetermined integral interval signal of the gained that multiplied each other by the described local sinusoidal digital signal of generation and described digital signal to be demodulated carried out integral processing, generate the sinusoidal demodulation integrated signal, the upper limit in described predetermined integral interval and the difference of lower limit are T;

In described predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by this locality generation cosine digital signal and described digital signal to be demodulated, generate cosine demodulation integrated signal;

Utilize described sinusoidal demodulation integrated signal and cosine demodulation integrated signal to obtain comparison signal.

According to a further aspect of the invention, a kind of frequency shift keying frequency discriminator is provided, this frequency discriminator comprises decision unit and above-mentioned predemodulator, described decision unit is used for selecting maximum comparison signal from described a plurality of comparison signals, and obtains carrier frequency corresponding to described fsk signal according to the frequency of the corresponding local generating digital signal of described maximum comparison signal.

According to a further aspect of the invention, a kind of frequency shift keying demodulator is provided, this demodulator comprises decoding unit and the frequency discriminator of the above, and described decoding unit is used for according to carrier frequency corresponding to described fsk signal and the corresponding relation of baseband digital signal symbol described baseband digital signal being reduced.

As seen, in pre-demodulating, frequency discrimination and the demodulation method that the embodiment of the invention provides, mainly be to utilize local generating digital signal and digital signal to be demodulated to carry out frequency discrimination, because the numerical value in local generating digital signal and the digital signal to be demodulated is unsigned value, therefore its mutual multiplication, integral operation are without symbolic operation, this lower to digital performance of devices requirement without symbolic operation, be suitable for using digital device to be realized.Accordingly, the embodiment of the invention also provides the predemodulator of implementing above-mentioned pre-demodulating method, implemented the frequency discriminator of above-mentioned frequency discrimination method and has implemented the demodulator of above-mentioned demodulation method.

Description of drawings

In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art, apparently, accompanying drawing in the following describes only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.

Fig. 1 is binary radix band signal, carrier wave and 2FSK signal waveform schematic diagram;

The FSK predemodulator structural representation that Fig. 2 a provides for the embodiment of the invention;

The FSK frequency discriminator structural representation that Fig. 2 b provides for the embodiment of the invention;

The computing schematic flow sheet of the formula 12 that Fig. 3 provides for the embodiment of the invention;

The pre-demodulating sub-unit structure schematic diagram that Fig. 4 provides for the embodiment of the invention;

The structural representation of the fsk demodulator that Fig. 5 provides for the embodiment of the invention;

The responder system structural representation that Fig. 6 provides for the embodiment of the invention;

The dash receiver structural representation that Fig. 7 provides for the embodiment of the invention;

The upper side frequency demodulator module structural representation that Fig. 8 provides for the embodiment of the invention;

The lower side frequency demodulator module structural representation that Fig. 9 provides for the embodiment of the invention.

Embodiment

For quote and know for the purpose of, the technical term that hereinafter uses, write a Chinese character in simplified form or abridge and be summarized as follows:

TCC:Train Control Center, station train control center;

FPGA:Field-Programmable Gate Array, i.e. field programmable gate array;

BTM:Balise Transmission Module, the transponder transmission unit;

FSK:Frequency Shift Keying, frequency shift keying;

Signal: signal often can be expressed as the function of time (or sequence), and the image of this function is called the waveform of signal;

Analog signal: time and amplitude all continuous signal are called analog signal;

Digital signal: the signal that time and amplitude all disperse is called digital signal.

Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.

Traditional F SK pre-demodulating, frequency discrimination and demodulation mode are owing to there are the shortcomings such as temperature is floated, limited reliability in a large amount of analog components that adopt.

In view of this, the invention provides the frequency shift keying pre-demodulating, frequency discrimination and the demodulation method that are suitable for digital device, and predemodulator, frequency discriminator and demodulator.

For ease of describing, the present invention will and be demodulated into example with pre-demodulating, the frequency discrimination of 2FSK signal and describe.

Referring to the description in Fig. 1 and the background technology as can be known, in a code check cycle T, the frequency that the 2FSK signal is corresponding is fixed numbers, and the symbol of this frequency and baseband digital signal has fixing corresponding relation, therefore, as long as respectively the 2FSK signal of each code check in the cycle carried out pre-demodulating and frequency discrimination, again according to the relation of the symbol of the carrier frequency that identifies and binary radix band signal, just can reduce to the binary radix band signal, to reach the purpose of demodulation.Therefore, how to realize the pre-demodulating of 2FSK signal is become key.

Pre-demodulating principle/method of the present invention is as follows:

In a T, establishing the signal to be demodulated that the 2FSK signal obtains after pretreatment is x ₁(t), local generation sinusoidal signal is x _Sin(t), the two being carried out the sinusoidal demodulation integrated signal that integral processing obtains is y _Sin(t), x then ₁(t), x _Sin(t) and y _Sin(t) available formula 1 expression:

$\left\{\begin{array}{c}{x}_1\left(t\right)=A[{\mathrm{<figure-callout\; id="1"\; label="k"\; filenames="HSA00000238824800031.png,HSA00000238824800032.png"\; state="\{\{state\}\}">k</figure-callout>}}_1+\sin ({2\mathrm{\&pi;\&omega;}}_{1}t+p_1)]\\ y_{\sin }\left(t\right)=[{\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="HSA00000238824800022.png"\; state="\{\{state\}\}">k</figure-callout>}}_2+\sin ({2\mathrm{\&pi;\&omega;}}_{\sin }t+p_{\sin })]\\ y_{\sin }\left(t\right)={\&Integral;}_0^T{x}_1\left(t\right)x_{\sin }\left(t\right)\mathrm{dt}\end{array}\right.---\left(1\right)$

If local generation cosine signal is x _Cos(t), cosine demodulation integrated signal is y _Cos(t), x then _Cos(t) and y _Cos(t) available formula 2 expressions:

$\left\{\begin{array}{c}{x}_{\cos }\left(t\right)=[{\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="HSA00000238824800022.png"\; state="\{\{state\}\}">k</figure-callout>}}_2+\cos ({2\mathrm{\&pi;\&omega;}}_{\cos }t+p_{\cos })]\\ y_{\cos }\left(t\right)={\&Integral;}_0^T{x}_1\left(t\right)x_{\cos }\left(t\right)\mathrm{dt}\end{array}\right.---\left(2\right)$

Wherein, A is the amplitude of 2FSK signal, and ω is the signal angular frequency, and p is the signal initial phase, footnote 1 expression input, and footnote sin represents the local sinusoidal signal frequency that generates, footnote cos represents local cosine signal frequency, the k of generating ₁And k ₂Be the direct current biasing factor.k ₁And k ₂Value can be identical, also can be different, but all more than or equal to 1.

As from the foregoing, x ₁(t), x _Sin(t), x _Cos(t), y _Sin(t) and y _Cos(t) all more than or equal to 0.In addition, be pointed out that x ₁(t) can be considered 2FSK signal (Asin (2 π ω ₁T+p ₁)) added DC component Ak ₁

With y _Sin(t) as analytic target, with x ₁(t) and x _Sin(t) substitution can get formula 3:

$y_{\sin }\left(t\right)={\&Integral;}_0^T\left\{A\right[{\mathrm{<figure-callout\; id="1"\; label="k"\; filenames="HSA00000238824800031.png,HSA00000238824800032.png"\; state="\{\{state\}\}">k</figure-callout>}}_1+\sin ({2\mathrm{\&pi;\&omega;}}_{1}t+p_1)]\&CenterDot;[{\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="HSA00000238824800022.png"\; state="\{\{state\}\}">k</figure-callout>}}_2+\sin ({2\mathrm{\&pi;\&omega;}}_{\sin }t+p_{\sin })\left]\right\}\mathrm{dt}$

$=A{\&Integral;}_0^T[k_1{\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="HSA00000238824800022.png"\; state="\{\{state\}\}">k</figure-callout>}}_2+{\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="HSA00000238824800022.png"\; state="\{\{state\}\}">k</figure-callout>}}_2\&CenterDot;\sin ({2\mathrm{\&pi;\&omega;}}_{1}t+p_1)+{\mathrm{<figure-callout\; id="1"\; label="k"\; filenames="HSA00000238824800031.png,HSA00000238824800032.png"\; state="\{\{state\}\}">k</figure-callout>}}_1\&CenterDot;\sin ({2\mathrm{\&pi;\&omega;}}_{\sin }t+p_{\sin })---\left(3\right)$

$+\sin ({2\mathrm{\&pi;\&omega;}}_{1}t+p_1)\&CenterDot;\sin ({2\mathrm{\&pi;\&omega;}}_{\sin }t+p_{\sin })]\mathrm{dt}$

General binary system code check cycle T generates the cycle of sinusoidal signal much larger than this locality, and is generally its integral multiple, so sin (2 π ω in the formula 3 ₁T+p ₁) and sin (2 π ω _SinT+p _Sin) integrated value in cycle T is 0.y _Sin(t) can turn to formula 4:

$y_{\sin }\left(t\right)=\mathrm{AT}{k}_1{k}_2-\frac{\mathrm{<figure-callout\; id="2"\; label="A"\; filenames="HSA00000238824800022.png"\; state="\{\{state\}\}">A</figure-callout>}}{2}{\&Integral;}_0^T\cos (2\mathrm{\&pi;t}({\mathrm{\&omega;}}_1+{\mathrm{\&omega;}}_{\sin })+{\mathrm{<figure-callout\; id="1"\; label="p"\; filenames="HSA00000238824800031.png,HSA00000238824800032.png"\; state="\{\{state\}\}">p</figure-callout>}}_1+p_{\sin })\mathrm{dt}$

(4)

$+\frac{A}{2}{\&Integral;}_0^T\cos (2\mathrm{\&pi;t}({\mathrm{\&omega;}}_1-{\mathrm{\&omega;}}_{\sin })+p_1-p_{\sin })\mathrm{dt}$

Same because in cycle T, comprise a plurality of carrier cycles, so cos (2 π t (ω in the formula 4 ₁+ ω _Sin)+p ₁-p _Sin) integrated value be 0, y _Sin(t) can turn to formula 5:

$y_{\sin }\left(t\right)=A{\mathrm{Tk}}_1{\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="HSA00000238824800022.png"\; state="\{\{state\}\}">k</figure-callout>}}_2+\frac{A}{2}{\&Integral;}_0^T\cos (2\mathrm{\&pi;t}({\mathrm{\&omega;}}_1-{\mathrm{\&omega;}}_{\sin })+p_1-p_{\sin })\mathrm{dt}---\left(5\right)$

Introduce the local cosine signal x that generates _Cos(t) (x _Cos(t) angular frequency _CosGenerate sinusoidal signal x with this locality _Sin(t) angular frequency _SinEquate), make it replace x _Sin(t) carry out above-mentioned formula 3 to the identical calculation procedure of formula 4, can draw cosine demodulation integrated signal y _Cos(t), y _Cos(t) available formula 6 expressions:

$y_{\cos }\left(t\right)={\mathrm{ATk}}_1{\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="HSA00000238824800022.png"\; state="\{\{state\}\}">k</figure-callout>}}_2+\frac{A}{2}{\&Integral;}_0^T\sin (2\mathrm{\&pi;t}({\mathrm{\&omega;}}_1-{\mathrm{\&omega;}}_{\cos })+p_1-p_{\cos })\mathrm{dt}---\left(6\right)$

The span of cosine is [1 ,-1], and k because just, ₁And k ₂All more than or equal to 1, therefore, y _Sin(t) and y _Cos(t) value is not less than ATk ₁k ₂/ 2, greater than 0.

To the y in the formula 5 _Sin(t) and the y in the formula 6 _Cos(t) remove DC component ATk ₁k ₂Can obtain y _Sin' (t) and y _Cos' (t).

y _Sin' (t) available formula 7 expressions:

${y_{\sin }}^{\&prime;}\left(t\right)=y_{\sin }\left(t\right)-{\mathrm{ATk}}_1{\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="HSA00000238824800022.png"\; state="\{\{state\}\}">k</figure-callout>}}_2=\frac{A}{2}{\&Integral;}_0^T\cos (2\mathrm{\&pi;t}({\mathrm{\&omega;}}_1-{\mathrm{\&omega;}}_{\sin })+p_1-p_{\sin })\mathrm{dt}---\left(7\right)$

y _Cos' (t) available formula 8 expressions:

${y_{\cos }}^{\&prime;}\left(t\right)=y_{\cos }\left(t\right)-{\mathrm{ATk}}_1{\mathrm{<figure-callout\; id="2"\; label="k"\; filenames="HSA00000238824800022.png"\; state="\{\{state\}\}">k</figure-callout>}}_2=\frac{A}{2}{\&Integral;}_0^T\sin (2\mathrm{\&pi;t}({\mathrm{\&omega;}}_1-{\mathrm{\&omega;}}_{\cos })+p_1-p_{\cos })\mathrm{dt}---\left(8\right)$

In formula 7 and 8, and if only if ω ₁=ω _Sin=ω _CosThe time when equal (local generate sinusoidal signal and the local frequency that the generates cosine signal carrier frequency corresponding with signal to be demodulated), y _Sin' (t) and y _Cos' (t) absolute value can be got maximum.y _Sin' (t) available formula 9 expressions:

${y_{\sin }}^{\&prime;}\left(t\right)=\frac{\mathrm{AT}}{2}\cos (p_1-p_{\sin })---\left(9\right)$

And y _Cos' (t) available formula 10 expressions:

${y_{\cos }}^{\&prime;}\left(t\right)=\frac{\mathrm{<figure-callout\; id="2"\; label="AT"\; filenames="HSA00000238824800022.png"\; state="\{\{state\}\}">AT</figure-callout>}}{2}\sin (p_1-p_{\cos })---\left(10\right)$

The result who it will be appreciated by persons skilled in the art that definite integral is actually a concrete numerical value, therefore, in a T, above-mentioned y _Sin(t) and y _Cos(t) be respectively a concrete numerical value, in like manner, y _Sin' (t) and y _Cos' (t) itself also be respectively a concrete numerical value.

Formula 9 shows that its result will be subjected to p if single one road signal to be demodulated and local sinusoidal signal that generates used multiplies each other ₁With p _SinThe impact of phase difference, only have the p of working as ₁=p _SinThe time, when namely local generation sinusoidal signal and signal to be demodulated are without phase difference, y _Sin' (t) value is maximum.In like manner, if single one road signal to be demodulated and local cosine signal that generates of using multiplies each other, its result also will be subjected to p ₁With p _CosThe impact of phase difference.

Use y _Sin' (t) and y _Cos' (t) obtaining comparison signal y (t), the available formula 11 of y (t) represents:

$y\left(t\right)={y_{\cos }}^{\&prime;2}\left(t\right)+{y_{\sin }}^{\&prime;2}\left(t\right)={\left[\frac{\mathrm{AT}}{2}\cos (p_1-p_{\sin })\right]}^2+{\left[\frac{\mathrm{AT}}{2}\sin (p_1-p_{\cos })\right]}^2---\left(11\right)$

In the formula 11, if p _Sin=p _Cos, then y (t) gets maximum

, this numerical value and p ₁Value irrelevant, thereby be not subjected to p ₁With p _SinPhase difference or p ₁With p _CosThe impact of phase difference.Because x _Sin(t) and x _Cos(t) signal is all local generation, p _Sin=p _CosThis condition is easy to reach.Also namely, in the pre-demodulating principle/method of the present invention, and do not require that the initial phase of local generation sinusoidal signal and local generation cosine signal is identical with the initial phase of signal to be demodulated, these are different from the traditional coherent demodulation mode.

The above-mentioned local cosine signal that generates can be referred to as the local signal that generates with the local sinusoidal signal that generates.Because 2FSK utilizes binary system base band digital signal to go two kinds of carrier frequencies of keying (matching with the first carrier frequency and the second carrier frequency) to form, when frequency discrimination, can utilize frequency this locality identical with the first carrier frequency to generate computing that signal carries out formula 1-11 to obtain a comparison signal, the computing that utilizes simultaneously the frequency this locality generation signal identical with the second carrier frequency to carry out formula 1-11 obtains another comparison signal.As previously mentioned, and if only if ω ₁=ω _Sin=ω _CosThe time, y _Sin' (t) and y _Cos' (t) absolute value can be got maximum, and y (t) also can get maximum.Therefore, the size that compares two comparison signals, can judge the carrier frequency of signal to be demodulated correspondence within a certain binary system code check cycle, thereby reach the purpose of frequency discrimination, and and then according to the final demodulation that realizes the 2FSK signal of the corresponding relation of the carrier frequency that identifies and binary radix band signal symbol.

Need to prove, although above-mentioned introduction is pre-demodulating, frequency discrimination and the demodulation principle/method of 2FSK signal, one of ordinary skill in the art will appreciate that above-mentioned pre-demodulating, frequency discrimination and demodulation principle/method are same applicable for non-binary multi-decimal FSK signal.For example when quaternary fsk signal (representing with 4FSK) is carried out frequency discrimination, there are 4 kinds (with ω owing to being used for the frequency of the carrier wave of modulation 4FSK signal ₁₀₁To ω ₁₀₄Expression), therefore can be with ω ₁₀₁Respectively as x _Sin(t) and x _Cos(t) angular frequency carries out the calculation procedure of formula 1 to 11, and finally obtains its corresponding comparison signal y ₁₀₁(t), in like manner with ω ₁₀₂To ω ₁₀₄Respectively as x _Sin(t) and x _Cos(t) angular frequency substitution formula 1-11, and finally obtain each self-corresponding comparison signal y ₁₀₂(t) to y ₁₀₄(t), find out y ₁₀₁(t) to y ₁₀₄(t) maximum in (being maximum comparison signal), the x that this maximum comparison signal is corresponding _Sin(t) frequency is carrier frequency corresponding to fsk signal, can reach equally the effect of pre-demodulating and frequency discrimination, and and then can carry out demodulation according to the frequency discrimination result.Also namely, above-mentioned pre-demodulating provided by the present invention, frequency discrimination and demodulation principle/method are the general pre-demodulating of FSK, frequency discrimination and demodulation principle/method.

Therefore, the pre-demodulating that the embodiment of the invention provides, frequency discrimination and demodulation principle/method are not vulnerable to the local impact that generates the signal initial phase, to predemodulator/frequency discriminator of using analogue device/demodulator and use digital device predemodulator/frequency discriminator/demodulator is all applicable.For the predemodulator/frequency discriminator that uses digital device/demodulator, because the computing before the formula 6 is non-negative computing, therefore, the pre-demodulating that the embodiment of the invention provides, frequency discrimination and demodulation method are removed or have been reduced symbolic operation, and without complex mathematical computings such as extraction of square root, divisions, be fit to digital device it is implemented.

The below will with the predemodulator that uses digital device as application scenarios, be described the pre-demodulating method.

In the present embodiment, FSK pre-demodulating method comprises the steps: at least

Step 1, fsk signal is carried out preliminary treatment obtain digital signal to be demodulated, the numerical value in the described digital signal to be demodulated is unsigned value;

Because fsk signal is analog signal, therefore fsk signal need to be carried out preliminary treatment, make it to be converted into digital signal.Above-mentioned preliminary treatment can have multiple implementation, now lifts dual mode and is illustrated.

Mode one: to fsk signal (Asin (2 π ω ₁T+p ₁)) stack DC component Ak ₁Obtain above-mentioned signal x to be demodulated ₁(t), make x ₁(t) minimum value is not less than 0, namely becomes direct current signal;

To stack DC component Ak ₁After fsk signal (being signal to be demodulated) sample and obtain digital signal to be demodulated.

It should be noted that, above-mentioned A is at fsk signal during without DC component, equate with the amplitude of fsk signal, when fsk signal itself has had DC component, A equal the maximum of fsk signal and minimum value difference 1/2nd, but one of ordinary skill in the art will appreciate that amplitude also be maximum and minimum value difference 1/2nd.

Mode two, just has DC component at fsk signal itself, and this DC component is in 1/2nd situation of the difference of the maximum of fsk signal and minimum value, can go DC component treatment to fsk signal first, and then the DC component that superposes and suit the requirements, such as A, 1.1A, 1.2A etc., sample again.

No matter take which kind of mode, will guarantee that all the frequency of digital signal to be demodulated after pretreatment does not change, and its sampled value all is not less than zero, is unsigned value.

Step 2, use the local generating digital signal with different frequency respectively above-mentioned digital signal to be demodulated to be carried out pre-demodulating to process to obtain a plurality of comparison signals, this this locality generating digital signal comprises that frequency and initial phase all identical this locality generate sinusoidal digital signal and the local cosine digital signal that generates, the above-mentioned local numerical value that generates in sinusoidal digital signal and the local generation cosine digital signal is unsigned value, and the frequency of the local sinusoidal digital signal of generation and local generation cosine digital signal is corresponding one by one with the carrier frequency of baseband digital signal keying;

Pre-demodulating in the step 2 is processed and is comprised:

In the predetermined integral interval, the signal of the gained that multiplied each other by the described local sinusoidal digital signal of generation and described digital signal to be demodulated carried out integral processing, generate the sinusoidal demodulation integrated signal y _Sin(t), the upper limit in described predetermined integral interval and the difference of lower limit are T, and described T is a code check cycle of baseband digital signal;

In above-mentioned predetermined integral interval, the signal of the gained that multiplied each other by this locality generation cosine digital signal and described digital signal to be demodulated carried out integral processing, generate the cosine demodulation integrated signal y _Cos(t);

Utilize above-mentioned y _Sin(t) and y _Cos(t) obtain comparison signal y (t);

Comparison signal y (t) can by by the sinusoidal demodulation integrated signal that removes DC component after square processing, be formed by stacking after square processing with the cosine demodulation integrated signal that removes DC component.Also can otherwise obtain.

In other embodiments of the invention, above-mentioned pre-demodulating method also can comprise the step that generates the local digital signal before step 1.

Local sinusoidal digital signal and the cosine digital signal of generating can be through to above-mentioned x _Sin(t) and x _Cos(t) sampling and obtain, its sample frequency is identical with the sample frequency of signal to be demodulated.In addition, because digital signal forms by series of discrete numerical value, therefore, the above-mentioned local sinusoidal digital signal of generation and cosine digital signal also can be sine value and the cosine value of in advance storage.The later embodiment of the present invention will make to this detailed introduction.

Corresponding with it, the present invention also provides the FSK predemodulator, and Fig. 2 a shows its a kind of structure, comprise: pretreatment unit 201 and pre-demodulating unit 202, wherein, pretreatment unit 201 is used for implementing above-mentioned steps one, and pre-demodulating unit 202 is used for implementing above-mentioned steps two.

Need to prove, after step 2, add step 3: from a plurality of comparison signals, select maximum comparison signal (numerical value of described maximum comparison signal is greater than the numerical value of other comparison signals), and obtain carrier frequency corresponding to fsk signal according to the frequency of the corresponding local generating digital signal of above-mentioned maximum comparison signal, then be the FSK frequency discrimination method.Above-mentioned frequency discrimination method is also at the row of protection scope of the present invention.

Corresponding with it, the embodiment of the invention also provides the FSK frequency discriminator, and Fig. 2 b shows a kind of structure of above-mentioned frequency discriminator 100, comprising:

Pretreatment unit 1 and digital processing element 2, digital processing element 2 comprises again pre-demodulating unit 21 and decision unit 22, and wherein, pretreatment unit 1 is used for implementing above-mentioned steps one, pre-demodulating unit 21 is used for implementing above-mentioned steps two, and decision unit 22 is used for implementing above-mentioned steps three.

When specific implementation, the function of pretreatment unit 1 can be realized by pre-process unit and modulus (AD) converting unit, wherein, the pre-process unit is used for fsk signal is carried out pre-process (such as amplification, stack DC component etc.) to obtain direct current signal, the AD converting unit is used for this direct current signal is sampled, and obtains digital signal to be demodulated.

In other embodiments of the invention, above-mentioned pre-demodulating unit 21 or pre-demodulating unit 202 can comprise a plurality of pre-demodulating subelements, wherein arbitrary pre-demodulating subelement this locality of adopting frequency of generating sinusoidal digital signal is different from the frequency that this locality that other pre-demodulating subelements adopt generates sinusoidal digital signal, and corresponding with a certain carrier frequency of described baseband digital signal keying.The quantity that also is the pre-demodulating subelement is identical with the radix of baseband digital signal, comparison signal of the last output of each pre-demodulating subelement.Be used for follow-up decision unit and carry out the carrier frequency judgement.

Because the y in the formula 7 and 10 _Sin' (t) and y _Cos' (t) span is [1,1], for further reducing the symbolic operation of digital device, in other embodiments of the invention, can use y _Sin(t) and y _Cos(t)) (y _Sin(t) and y _Cos(t) all greater than zero) replace the y among the above embodiment _Sin' (t) and y _Cos' (t) carry out pre-demodulating or frequency discrimination.Can be got another expression formula 12 of comparison signal y (t) by formula 6,9 and 11:

y(t)＝y _cos′ ²(t)+y _sin′ ²(t)＝[y _cos(t)-ATk ₁k ₂] ²+[y _sin(t)-ATk ₁k ₂] ²

(12)

＝y _sin ²(t)+y _cos ²(t)-2ATk ₁k ₂[y _sin(t)+y _cos(t)]+A ²T ²k ₁ ²k ₂ ²

Y in the formula 12 _Sin ²(t), y _Cos ²(t), 2ATk ₁k ₂[y _Sin(t)+y _CosAnd A (t)] ²T ²k ₁ ²k ₂ ²All more than or equal to 0, therefore, with respect to using y _Sin' (t) and y _Cos' (t) carry out computing, still be without symbolic operation.

Because subtraction for once in formula 12 can be placed on subtraction last execution, thereby can guarantee in the calculating process all to be without symbolic operation, and then remove symbolic operation to digital performance of devices requirement, and reduce the structure complexity of system.

Referring to Fig. 3, in other embodiments of the invention, corresponding to formula 12, the concrete mode of utilizing sinusoidal demodulation integrated signal and cosine demodulation integrated signal to obtain comparison signal in the step 2 can be:

Above-mentioned sinusoidal demodulation integrated signal is carried out a square processing, obtain the first quadrature signal y _P1(t);

Above-mentioned cosine demodulation integrated signal is carried out a square processing, obtain the second quadrature signal y _P2(t);

With above-mentioned the first quadrature signal, the second quadrature signal and DC component A ²T ²k ₁ ²k ₂ ²Superpose, obtain the first superposed signal y _D1(t);

Will be by sinusoidal demodulation integrated signal y _Sin(t) and cosine demodulation integrated signal y _Cos(t) the signal y of gained after the stack _Dm(t) amplification obtains the second superposed signal y _D2(t), the gain amplifier of described the second superposed signal is 2ATk ₁k ₂

With y _D1(t) and y _D2(t) subtract each other, obtain comparison signal y (t).

Correspondingly, referring to Fig. 4, the arbitrary pre-demodulating subelement among above all embodiment comprises: generate sinusoidal demodulation integrated signal y _Sin(t) integrator 201, generation cosine demodulation integrated signal y _Cos(t) integrator 202 and comparison signal maker, comparison signal maker comprise again the first superpositing unit 203, the second superpositing unit 204 and subtracter 205, wherein:

The first superpositing unit 203 is used for generating above-mentioned the first superposed signal y _D1(t), the second superpositing unit 204 is used for generating above-mentioned the second superposed signal y _D2And subtracter 205 is used for y (t), _D1(t) and y _D2(t) subtract each other, obtain comparison signal y (t).

Digital processing element among above-mentioned all embodiment or the function of pre-demodulating unit specifically can adopt FPGA to be realized.

Need explanation, the frequency discrimination method among above all embodiment to can be used in the demodulating process of fsk signal behind the carrier frequency that fsk signal is corresponding in identifying a code check cycle T, also can finally realizing as follows the demodulation of fsk signal to the evaluation of carrier frequency:

Step 4, according to the corresponding relation of symbol in carrier frequency corresponding to fsk signal and the baseband digital signal described baseband digital signal is reduced.

Accordingly, predemodulator among above-mentioned all embodiment or frequency discriminator also can be used for carrying out in the fsk demodulator pre-demodulating or carrier frequency is identified, Fig. 5 has provided a kind of structure of fsk demodulator, comprise frequency discriminator 100 and decoding unit 200, frequency discriminator 100 comprises pretreatment unit 1 and digital processing element 2, and digital processing element 2 comprises pre-demodulating unit 21 and decision unit 22, wherein, pretreatment unit 1 is used for implementing above-mentioned steps one, pre-demodulating unit 21 is used for implementing above-mentioned steps two, decision unit 22 is used for implementing above-mentioned steps three, and decoding unit 200 is used for implementing above-mentioned steps four.

Fsk signal has the advantages such as antijamming capability is strong, long transmission distance, and the railway system also is widely used the 2FSK modulation system and transmits various control informations.The below will carry out more detailed introduction to technical scheme of the present invention take the railway system as application scenarios.

In the railway system, the structure of the responder system of row control center TCC system can mainly comprise ground transponder 61, car antenna 62 and BTM63 referring to Fig. 6, and BTM63 mainly comprises power board 631, dash receiver 632 and decoding control board 633.Wherein:

Car antenna 62 is a kind of duplexed antennas, and transponder 61 sends the energy signal of 27.095MHz earthward, and the centre frequency that reception is returned by ground transponder 61 is the 2FSK signal of 4.234MHz.The frequency of the upper side frequency that the 2FSK signal that ground transponder 61 sends adopts is 3.951MHz, and the frequency of lower side frequency is 4.516Hz;

Power board 631 is mainly used in the 2FSK signal that car antenna 62 receives is amplified and exports;

Dash receiver 632 is mainly used in processing through the fsk signal that amplifies, and the frequency that finally obtains this 2FSK signal is upper side frequency or the court verdict of lower side frequency;

Decoding control board 633 is mainly used in frequency corresponding to the 2FSK that judges according to dash receiver 632 and the relation of binary system base band digital signal, restores above-mentioned binary radix band signal.

Dash receiver 632 is frequency discriminator, and dash receiver 632 has then formed demodulator with decoding control board 633.

Fig. 7-9 shows a kind of concrete structure of above-mentioned dash receiver, comprises AD sampling A/D chip 71 and fpga chip 72.Its operation principle is as follows:

The 2FSK signal is before input AD sampling A/D chip 71, and the DC component that superposeed becomes direct current signal.After 71 pairs of above-mentioned direct current signals of AD sampling A/D chip are processed, generate 8 (2 ³) binary numeral (be aforementioned digital signal to be demodulated, in the present embodiment, also can be called the 2FSK data) the input fpga chip 72 of precision, for the subsequent algorithm computing.In addition, AD sampling A/D chip 71 is controlled by the local generator module of fpga chip 72, to reach the purpose of coordinated operation.

Local frequency generator module is divided into upper side frequency frequency generator module 73 and lower side frequency frequency generator module 74, respectively according to the following signal of upper and lower side frequency frequency timing output of 2FSK signal: the AD sampling trigger signal; Sine, cosine value (being aforementioned local sinusoidal digital signal and the local generation cosine digital signal of generating) through the generation of sine and cosine tables of data.Upper side frequency frequency generator module 73 is responsible for the output reset signal simultaneously to the integrator in upper side frequency demodulator module 710 and the lower side frequency demodulator module 711.The zero clearing time is code check cycle of binary radix band signal for the default a data position delivery time.Take 564.48Kbit/s as example, the zero clearing time is fixed as 1.772 μ s.

Sine and cosine tables of data module 75 is used for storage sine and cosine numerical value.Because frequency discrimination method provided by the present invention just be not subjected to, the local impact that generates cosine digital signal initial phase, only requires that two signal initial phases are identical, therefore, the initial phase of sinusoidal numerical value can arrange arbitrarily.

In one-period T, frequency is that the wave number of the sine wave of upper side frequency is 8, is 7 and frequency is the wave number of the sine wave of lower side frequency.For the sine wave of upper side frequency, a waveform needs to sample 4 times at least, so in one-period T, be 32 to the minimum sampling number of 2FSK signal.Sampling number to the 2FSK signal can represent with 8K, and wherein K is more than or equal to 4.

Therefore, when the sine and cosine numerical value that has a upper side frequency in use carries out pre-demodulating to the 2FSK data, only need 4 sinusoidal datas and 4 corresponding cosine data get final product, and above-mentioned cosine data can obtain by the corresponding relation with sinusoidal data, also namely only need to get final product by 4 sinusoidal datas.

And frequency is the sine wave of lower side frequency owing to having 7 waveforms in a code check cycle T, each waveform can't be assigned to fixing sampling number, therefore, when the sine and cosine numerical value that has a lower side frequency in use carries out pre-demodulating to the 2FSK data, need 32 sinusoidal datas.

Because technical scheme provided by the invention is not done requirement to initial phase, so can be with the sinusoidal cycles five equilibrium, every the fixed angle value once.

Multiplier 76 can be used for realizing multiplying each other of the sinusoidal numerical value corresponding with upper side frequency and 2FSK data, and multiplier 77 then is used for realizing multiplying each other of the cosine values corresponding with upper side frequency and 2FSK data.In like manner, multiplier 78 and 79 be respectively applied to realize corresponding with lower side frequency just, the multiplying each other of cosine values and 2FSK data.

Upper side frequency demodulator module 710 is used for carrying out the computing of formula 12, and its internal structure can referring to Fig. 8, comprise first adder 81, second adder 82, the first squarer 83, the second squarer 84, multiplier 85, subtracter 86 and integrator 87 and 88.Wherein, integrator 87 is used for the Output rusults of multiplier 76 is carried out integration, and integrator 88 is used for the Output rusults of multiplier 77 is carried out integration.

Lower side frequency demodulator module 711 is used for carrying out the computing of formula 12, and its internal structure and upper side frequency demodulator module 710 are similar.Comprise the 3rd adder 91, the 4th adder 92, the 3rd squarer 93, the 4th squarer 94, multiplier 95, subtracter 96, integrator 97 and 98.Wherein, integrator 97 is used for the Output rusults of multiplier 78 is carried out integration, and integrator 98 is used for the Output rusults of multiplier 78 is carried out integration.

Integrator 87,88,97 and 98 adopts accumulation mode, carries out zero clearing after receiving reset signal.

Decision Decoding device module 712, be used for determining output 0,1 code according to upper side frequency demodulator module 710 and lower side frequency demodulator module 711 input values size, converge simultaneously the FSK decoding figure place of a location number, disposablely carry out the message processing for follow-up CPU by data I/O port transmission.Normal operation is 2 bytes, 16 bit data I/O mouths.

Each embodiment adopts the mode of going forward one by one to describe in this specification, and what each embodiment stressed is and the difference of other embodiment that identical similar part is mutually referring to getting final product between each embodiment.For the disclosed device of embodiment, because it is corresponding with the disclosed method of embodiment, so description is fairly simple, relevant part partly illustrates referring to method and gets final product.

The professional can also further recognize, unit and the step of each example of describing in conjunction with embodiment disclosed herein can realize with electronic hardware, computer software or the combination of the two.For the interchangeability of hardware and software clearly is described, composition and the step of each example described in general manner according to function in the above description.These functions are carried out with hardware or software mode actually, depend on application-specific and the design constraint of technical scheme.For example the function of above-mentioned multiplier, adder both available integrated digital multiplier, adder realized, also can use the programming devices such as fpga chip and programme and realized.The professional and technical personnel can specifically should be used for realizing described function with distinct methods to each, but this realization should not thought and exceeds scope of the present invention.

Each embodiment adopts the mode of going forward one by one to describe in this specification, and what each embodiment stressed is and the difference of other embodiment that identical similar part is mutually referring to getting final product between each embodiment.For the disclosed system of embodiment, because it is corresponding with the disclosed method of embodiment, so description is fairly simple, relevant part partly illustrates referring to method and gets final product.

To the above-mentioned explanation of the disclosed embodiments, make this area professional and technical personnel can realize or use the present invention.Multiple modification to these embodiment will be apparent concerning those skilled in the art, and General Principle as defined herein can be in the situation that do not break away from the spirit or scope of the present invention, in other embodiments realization.Therefore, the present invention will can not be restricted to these embodiment shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.

Claims (12)

1. a frequency shift keying FSK pre-demodulating method is characterized in that, comprising:

Fsk signal is carried out preliminary treatment obtain digital signal to be demodulated, the numerical value in the described digital signal to be demodulated is unsigned value;

The local generating digital signal that use has a different frequency carries out pre-demodulating to described digital signal to be demodulated respectively and processes to obtain a plurality of comparison signals, described local generating digital signal comprises that frequency and initial phase all identical this locality generate sinusoidal digital signal and the local cosine digital signal that generates, the described local numerical value that generates in sinusoidal digital signal and the local generation cosine digital signal is unsigned value, and the frequency of the described local sinusoidal digital signal of generation and local generation cosine digital signal is corresponding one by one with the carrier frequency of described baseband digital signal keying;

Described pre-demodulating is processed and is comprised:

In the predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by the described local sinusoidal digital signal of generation and described digital signal to be demodulated, generate the sinusoidal demodulation integrated signal, the upper limit in described predetermined integral interval and the difference of lower limit are T, and described T is a code check cycle of baseband digital signal;

In described predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by this locality generation cosine digital signal and described digital signal to be demodulated, generate cosine demodulation integrated signal;

Utilize described sinusoidal demodulation integrated signal and cosine demodulation integrated signal to obtain comparison signal.

2. the method for claim 1 is characterized in that, fsk signal is carried out the specific implementation that preliminary treatment obtains digital signal to be demodulated be:

To described fsk signal stack DC component Ak ₁, described A equal the maximum of fsk signal and minimum value difference 1/2nd, described k ₁Be the direct current biasing factor, and k ₁More than or equal to 1;

To stack DC component Ak ₁After fsk signal sample and obtain digital signal to be demodulated.

3. method as claimed in claim 2 is characterized in that,

Being carried out, described fsk signal also comprises generating the local digital signal before preliminary treatment obtains digital signal to be demodulated.

4. such as each described method of claim 1-3, it is characterized in that,

The described concrete mode of utilizing described sinusoidal demodulation integrated signal and cosine demodulation integrated signal to obtain comparison signal is:

Described sinusoidal demodulation integrated signal is carried out a square processing, obtain the first quadrature signal;

Described cosine demodulation integrated signal is carried out a square processing, obtain the second quadrature signal;

With described the first quadrature signal, described the second quadrature signal and DC component A ²T ²k ₁ ²k ₂ ²Superpose, obtain the first superposed signal, wherein, described A equal described fsk signal maximum and minimum value difference 1/2nd, described k ₁And k ₂Be the direct current biasing factor, k ₁And k ₂All more than or equal to 1, and Ak ₁Equal the DC component of described digital signal to be demodulated, k ₂Equal the described local DC component that generates sinusoidal digital signal;

To be amplified by the signal of gained after the stack of described sinusoidal demodulation integrated signal and cosine demodulation integrated signal and obtain the second superposed signal, the gain amplifier of described the second superposed signal is 2ATk ₁k ₂

Described the first superposed signal and the second superposed signal are subtracted each other, obtain described comparison signal.

5. such as each described method of claim 1-3, it is characterized in that,

The described concrete mode of utilizing described sinusoidal demodulation integrated signal and cosine demodulation integrated signal to obtain comparison signal is:

Remove respectively the DC component of described sinusoidal demodulation integrated signal and cosine demodulation integrated signal;

Respectively the sinusoidal demodulation integrated signal that removes DC component and the cosine demodulation integrated signal that removes DC component are carried out a square processing;

To superpose through two signals of square processing.

6. a frequency shift keying FSK frequency discrimination method is used for differentiating the corresponding carrier frequency of fsk signal that is generated by baseband digital signal keyed carrier frequency, it is characterized in that, comprising:

Described fsk signal is carried out preliminary treatment obtain digital signal to be demodulated, the numerical value in the described digital signal to be demodulated is unsigned value;

The local generating digital signal that use has a different frequency carries out pre-demodulating to described digital signal to be demodulated respectively and processes to obtain a plurality of comparison signals, described local generating digital signal comprises that frequency and initial phase all identical this locality generate sinusoidal digital signal and the local cosine digital signal that generates, the described local numerical value that generates in sinusoidal digital signal and the local generation cosine digital signal is unsigned value, and the frequency of the described local sinusoidal digital signal of generation and local generation cosine digital signal is corresponding one by one with the carrier frequency of described baseband digital signal keying;

From described a plurality of comparison signals, select maximum comparison signal, and obtain carrier frequency corresponding to described fsk signal according to the frequency of the corresponding local generating digital signal of described maximum comparison signal;

Described pre-demodulating is processed and is comprised:

In the predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by the described local sinusoidal digital signal of generation and described digital signal to be demodulated, generate the sinusoidal demodulation integrated signal, the upper limit in described predetermined integral interval and the difference of lower limit are T, and described T is a code check cycle of baseband digital signal;

In described predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by this locality generation cosine digital signal and described digital signal to be demodulated, generate cosine demodulation integrated signal;

Utilize described sinusoidal demodulation integrated signal and cosine demodulation integrated signal to obtain comparison signal.

7. a frequency shift keying FSK demodulation method is used for the fsk signal that is generated by baseband digital signal keyed carrier frequency is carried out demodulation, it is characterized in that, comprising:

Described fsk signal is carried out preliminary treatment obtain digital signal to be demodulated, the numerical value in the described digital signal to be demodulated is unsigned value;

The local generating digital signal that use has a different frequency carries out pre-demodulating to described digital signal to be demodulated respectively and processes to obtain a plurality of comparison signals, described local generating digital signal comprises that frequency and initial phase all identical this locality generate sinusoidal digital signal and the local cosine digital signal that generates, the described local numerical value that generates in sinusoidal digital signal and the local generation cosine digital signal is unsigned value, and the frequency of the described local sinusoidal digital signal of generation and local generation cosine digital signal is corresponding one by one with the carrier frequency of described baseband digital signal keying;

From described a plurality of comparison signals, select maximum comparison signal, and obtain carrier frequency corresponding to described fsk signal according to the frequency of the corresponding local generating digital signal of described maximum comparison signal;

Corresponding relation according to symbol in carrier frequency corresponding to described fsk signal and the baseband digital signal reduces to described baseband digital signal;

Described pre-demodulating is processed and is comprised:

In the predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by the described local sinusoidal digital signal of generation and described digital signal to be demodulated, generate the sinusoidal demodulation integrated signal, the upper limit in described predetermined integral interval and the difference of lower limit are T, and described T is a code check cycle of baseband digital signal;

In described predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by this locality generation cosine digital signal and described digital signal to be demodulated, generate cosine demodulation integrated signal;

Utilize described sinusoidal demodulation integrated signal and cosine demodulation integrated signal to obtain comparison signal.

8. a frequency shift keying predemodulator is characterized in that, comprises pretreatment unit and pre-demodulating unit, wherein,

Pretreatment unit is used for that described fsk signal is carried out preliminary treatment and obtains digital signal to be demodulated, and the numerical value in the described digital signal to be demodulated is unsigned value;

The pre-demodulating unit, be used for using the local generating digital signal with different frequency respectively described digital signal to be demodulated to be carried out pre-demodulating and process to obtain a plurality of comparison signals, described local generating digital signal comprises that frequency and initial phase all identical this locality generate sinusoidal digital signal and the local cosine digital signal that generates, the described local numerical value that generates in sinusoidal digital signal and the local generation cosine digital signal is unsigned value, and the frequency of the described local sinusoidal digital signal of generation and local generation cosine digital signal is corresponding one by one with the carrier frequency of described baseband digital signal keying;

Described pre-demodulating is processed and is comprised:

In the predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by the described local sinusoidal digital signal of generation and described digital signal to be demodulated, generate the sinusoidal demodulation integrated signal, the upper limit in described predetermined integral interval and the difference of lower limit are T, and described T is a code check cycle of baseband digital signal;

In described predetermined integral interval, integral processing is carried out in the signal of the gained that multiplied each other by this locality generation cosine digital signal and described digital signal to be demodulated, generate cosine demodulation integrated signal;

Utilize described sinusoidal demodulation integrated signal and cosine demodulation integrated signal to obtain comparison signal.

9. predemodulator as claimed in claim 8, it is characterized in that, described pre-demodulating unit comprises a plurality of pre-demodulating subelements, wherein arbitrary pre-demodulating subelement this locality of adopting frequency of generating sinusoidal digital signal is different from the frequency that this locality that other pre-demodulating subelements adopt generates sinusoidal digital signal, and corresponding with a certain carrier frequency of described baseband digital signal keying;

Arbitrary pre-demodulating subelement comprises the integrator that generates the sinusoidal demodulation integrated signal, integrator and the comparison signal maker that generates cosine demodulation integrated signal, and described comparison signal maker comprises the first superpositing unit, the second superpositing unit and subtracter, wherein:

The first superpositing unit, be used for described sinusoidal demodulation integrated signal is carried out a square processing, obtain the first quadrature signal, described cosine demodulation integrated signal is carried out a square processing, obtain the second quadrature signal, and with described the first quadrature signal, described the second quadrature signal and DC component A ²T ²k ₁ ²k ₂ ²Superpose, obtain the first superposed signal, wherein, described A equal described fsk signal maximum and minimum value difference 1/2nd, described k ₁And k ₂Be the direct current biasing factor, k ₁And k ₂All more than or equal to 1, and Ak ₁Equal the DC component of described digital signal to be demodulated, k ₂Equal the described local DC component that generates sinusoidal digital signal;

The second superpositing unit obtains the second superposed signal for being amplified by the signal of gained after described sinusoidal demodulation integrated signal and the stack of cosine demodulation integrated signal, and the gain amplifier of described the second superposed signal is 2ATk ₁K ₂

Subtracter is used for described the first superposed signal and the second superposed signal are subtracted each other, and obtains described comparison signal.

10. predemodulator as claimed in claim 9 is characterized in that, described pre-demodulating unit is specially field programmable gate array.

11. frequency shift keying frequency discriminator, it is characterized in that, comprise decision unit and such as each described predemodulator of claim 8-10, described decision unit is used for selecting maximum comparison signal from described a plurality of comparison signals, and obtains carrier frequency corresponding to described fsk signal according to the frequency of the corresponding local generating digital signal of described maximum comparison signal.

12. frequency shift keying demodulator, it is characterized in that, comprise decoding unit and frequency discriminator as claimed in claim 11, described decoding unit is used for according to carrier frequency corresponding to described fsk signal and the corresponding relation of baseband digital signal symbol described baseband digital signal being reduced.

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