CN102130084A - Semiconductor chip assembly with a post/base heat spreader and a signal post - Google Patents

Semiconductor chip assembly with a post/base heat spreader and a signal post Download PDF

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Publication number
CN102130084A
CN102130084A CN201010593471XA CN201010593471A CN102130084A CN 102130084 A CN102130084 A CN 102130084A CN 201010593471X A CN201010593471X A CN 201010593471XA CN 201010593471 A CN201010593471 A CN 201010593471A CN 102130084 A CN102130084 A CN 102130084A
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CN
China
Prior art keywords
projection
heat conduction
pedestal
adhesion layer
semiconductor chip
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Granted
Application number
CN201010593471XA
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Chinese (zh)
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CN102130084B (en
Inventor
林文强
王家忠
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Yuqiao Semiconductor Co Ltd
Bridge Semiconductor Corp
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Yuqiao Semiconductor Co Ltd
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Priority claimed from US12/642,795 external-priority patent/US8269336B2/en
Application filed by Yuqiao Semiconductor Co Ltd filed Critical Yuqiao Semiconductor Co Ltd
Publication of CN102130084A publication Critical patent/CN102130084A/en
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Publication of CN102130084B publication Critical patent/CN102130084B/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The heat spreader includes a thermal post and a base. The thermal post extends upwardly from the base into a first opening in the adhesive, and the base extends laterally from the thermal post. The conductive trace includes a pad, a terminal and a signal post. The signal post extends upwardly from the terminal into a second opening in the adhesive.

Description

Have the radiating seat of projection/pedestal and the semiconductor chip group body of signal projection
Technical field
The present invention relates to a kind of semiconductor chip group body, particularly relate to a kind of semiconductor chip group body and manufacture method of forming by semiconductor device, lead, adhesion layer and radiating seat thereof.The cross-reference of related application:
The application's case is the cip application of the 12/616th, No. 773 U.S. patent application case of filing an application on November 11st, 2009, and the content of this case is incorporated this paper by reference into.The application's case also is the cip application of the 12/616th, No. 775 U.S. patent application case of filing an application on November 11st, 2009, and the content of this case is incorporated this paper equally by reference into.The application's case is advocated the priority of the 61/257th, No. 830 U.S. Provisional Patent Application case that on November 3rd, 2009 filed an application in addition, and the content of this case is also incorporated this paper by reference into.
Filed an application on November 11st, 1 the 12/616th, file an application in No. 773 U.S. patent application case and on November 11st, 1 the 12/616th, No. 775 U.S. patent application case be filed an application on September 11st, 2009 the 12/557th, the cip application of No. 540 U.S. patent application case, and also be the cip application of the 12/557th, No. 541 U.S. patent application case of filing an application on September 11st, 2009.
Filed an application on September 11st, 1 the 12/557th, file an application in No. 540 U.S. patent application case and on September 11st, 1 the 12/557th, No. 541 U.S. patent application case are the cip application of the 12/406th, No. 510 U.S. patent application case of filing an application on March 18th, 2009.The 12/406th, No. 510 U.S. patent application case advocate to file an application on May 7th, 2008 the 61/071st, file an application in No. 589 U.S. Provisional Patent Application cases, on May 7th, 2008 the 61/071st, file an application in No. 588 U.S. Provisional Patent Application cases, on April 11st, 2008 the 61/071st, file an application in No. 072 U.S. Provisional Patent Application case and on March 25th, 2008 the 61/064th, the priority of No. 748 U.S. Provisional Patent Application cases, the content of above-mentioned each case are all incorporated this paper by reference into.Filed an application on September 11st, 1 the 12/557th, file an application in No. 540 U.S. patent application case and on September 11st, 1 the 12/557th, No. 541 U.S. patent application case also advocate to file an application on February 9th, 2009 the 61/150th, the priority of No. 980 U.S. Provisional Patent Application cases, its content is incorporated this paper by reference into.
Background technology
Can provide high voltage, high-frequency and dynamical application such as semiconductor device such as semiconductor chip through encapsulation and un-encapsulated; These are applied as the execution specific function, and the power of required consumption is very high, and the height semiconductor device is given birth to heat the more yet power is healed.In addition, behind packaging density raising and dimension reduction, can dwindle, more cause giving birth to heat and aggravate for the surface area of heat radiation.
Semiconductor device easily produces problems such as performance decay and shortening in useful life under high-temperature operation, even fault immediately.High heat not only influences chip usefulness, also may because of thermal expansion do not match to chip and arround device produce the thermal stress effect.Therefore, must make the rapid efficiently radiates heat of chip can guarantee the efficient and the reliability of its operation.Article one, the high-termal conductivity path is normally with thermal energy conduction and be dissipated into the die pad bigger zone of a surface area than chip or chip place.
Light-emitting diode (LED) generally becomes the alternative source of light of incandescent source, fluorescence light source and halogen light source recently.LED can be applications such as medical treatment, military affairs, signboard, signal, aviation, navigation, vehicle, portable device, commercialization and household's illumination high-energy source efficient and illumination for a long time cheaply is provided.For example, LED can be equipment such as light fixture, flashlight, headlight, searchlight, traffic signal light and display light source is provided.
High-power die among the LED also produces a large amount of heat energy when high brightness output is provided.Yet under high-temperature operation, LED can take place that colour cast, brightness reduce, shorten useful life and problem such as fault immediately.In addition, LED has its restriction aspect heat radiation, and then influences its light output and reliability.Therefore, LED especially highlights the demand of market for the high-power die with great heat radiation effect.
The LED packaging body comprises a led chip, a pedestal, electric contact and a hot junction usually.Described pedestal is to be thermally coupled to led chip and in order to support this led chip.Electric contact then is electrically connected to the anode and the negative electrode of led chip.Hot junction is connected to led chip via this heat susceptor, and it is overheated with the prevention led chip that its below carrier can fully dispel the heat.
The research and development that industry actively drops into high-power die packaging body and heat-conducting plate with various designs and manufacturing technology are in the hope of satisfying performance requirements in this environment that extremely cost is competed.
Plastic ball grid array (PBGA) encapsulation is that a chip and a lamination substrate are wrapped in the plastic casing, and then with the tin ball attach to a printed circuit board (PCB) (PCB) on.Described laminated substrate comprises a dielectric layer that is made of glass fibre usually.The heat energy that chip produces can reach the tin ball via plastics and dielectric layer, and then reaches printed circuit board (PCB).Yet because the thermal conductivity of plastics and dielectric layer is low, the radiating effect of PBGA is not good.
Quad flat non-pin (QFN) encapsulation is chip to be arranged on one be welded on the copper die pad of printed circuit board (PCB).The heat energy that chip produces can reach printed circuit board (PCB) via die pad.Yet,, make the QFN encapsulation can't be applicable to high I/O (I/O) chip or passive device because the routing capabilities of its lead frame intermediary layer is limited.
Heat-conducting plate provides functions such as electrical route, heat management and mechanical support for semiconductor device.Heat-conducting plate comprises the weld pad that a substrate, that is used for the signal route provides the radiating seat of heat abstraction function or heat abstractor, a power supply property to be connected to semiconductor device usually, and a power supply property is connected to down the terminal of one deck group body.This substrate can be a laminar structure with single or multiple lift routing circuit system and one layer or more dielectric layer.This radiating seat can be a metal base, metal derby or buries metal level underground.
Heat-conducting plate engages one deck group body down.For example, following one deck group body can be a lamp socket with printed circuit board (PCB) and heat abstractor.In this example, a LED packaging body is to install on heat-conducting plate, and this heat-conducting plate is then installed on heat abstractor, and heat-conducting plate/heat abstractor time group body and printed circuit board (PCB) are installed in lamp socket again.In addition, heat-conducting plate is electrically connected to this printed circuit board (PCB) via lead.From this printed circuit board (PCB) guiding LED packaging body, then disperse the heat energy of LED packaging body and be passed to this heat abstractor by this radiating seat with electric signal for this substrate.Therefore, this heat-conducting plate can be led chip one important hot path is provided.
The 6th, 507, No. 102 United States Patent (USP)s authorizing people such as Juskey disclose a kind of group of body, and wherein a composite base plate that is made of glass fibre and cured thermosetting comprises a central opening.One to have the square or OBL radiating block of similar aforementioned central opening be to attach to this central opening sidewall thereby combine with this substrate.Upper and lower conductive layer attaches to the top and the bottom of this substrate respectively, and electrically connects each other by the plating guide hole that runs through this substrate.One chip is to be arranged on the radiating block and routing is engaged to conductive layer, and an encapsulating material is that mould is established and formed on the chip, and lower conductiving layer then is provided with the tin ball.
During manufacturing, this substrate was one to place second rank (B-stage) the resin film on the lower conductiving layer originally.Radiating block is to be inserted in central opening, thereby is positioned on the lower conductiving layer, and is separated by with a gap with this substrate.Last conductive layer then is located on this substrate.Upper and lower conductive layer makes the resin fusing and flows in the aforementioned gap and solidify after heating reaches pressing each other.Upper and lower conductive layer forms pattern, thereby forms wiring on this substrate, and resin flash is revealed on the radiating block.Remove resin flash then, radiating block is exposed.At last again with chip placing on radiating block and carry out routing and engage and encapsulation.
Therefore, the heat energy of chip generation can reach printed circuit board (PCB) via radiating block.Yet it is when volume production, the operation that radiating block is positioned in the central opening is very taken a lot of work, and with high costs with manual mode.Moreover because the installation tolerance of side direction is little, radiating block is difficult for accurately being positioned in the central opening, causes being prone between substrate and radiating block the situation of gap and routing inequality.Thus, this substrate only part attaches to radiating block, can't obtain enough support forces from radiating block, and delamination easily.In addition, be used to remove the partially conductive layer and also will remove the radiating block that part is not covered by resin flash with the chemical etching liquor that appears resin flash, make the uneven and difficult combination of radiating block, the yield that finally causes organizing body reduces, reliability deficiency and cost are too high.
The 6th, 528, No. 882 United States Patent (USP)s authorizing people such as Ding disclose a kind of high heat radiation spherical grid array package body, and its substrate comprises a metal core layer, and chip then is placed in the die pad zone of metal core layer end face.One insulating barrier is the bottom surface that is formed at metal core layer.Blind hole runs through the straight-through metal core layer of insulating barrier, and is filled with heat radiation tin ball in the hole, is provided with on this substrate in addition and the corresponding tin ball of tin ball that dispels the heat.The heat energy that chip produces can flow to heat radiation tin ball via metal core layer, flows to printed circuit board (PCB) again.Yet the insulating barrier that is located between metal core layer and the printed circuit board (PCB) but causes restriction to the hot-fluid that flows to printed circuit board (PCB).
Authorize the 6th, 670, No. 219 downward ball grid array of a kind of groove of U.S. Patent Publication (CDBGA) packaging body of people such as Lee, wherein a ground plate with central opening is to be arranged on the radiating seat to constitute a heat-radiating substrate.One substrate with central opening is arranged on this ground plate by an adhesion layer with central opening.One chip is to be installed on this radiating seat by in the formed groove of ground plate central opening, and this substrate is provided with the tin ball.Yet because the tin ball is to be positioned on the substrate, radiating seat also can't the contact print circuit board, causes the thermolysis thermal relief convection current of this radiating seat and non-thermal conductivity, thereby its radiating effect of limit significantly.
The 7th, 038, No. 311 United States Patent (USP)s authorizing people such as Woodall provide a kind of high heat radiation BGA packaging body, and its heat abstractor is inverted T-shaped and comprises a post portion and a wide substrate.One substrate that is provided with window type opening is to be placed in the wide substrate, and an adhesion layer then attaches to this substrate with post portion and wide substrate.One chip is to be placed in the post portion and routing is engaged to this substrate, and an encapsulating material is mold formed on chip, then is provided with the tin ball on this substrate.Post portion extends through this window type opening, and by this substrate of wide substrate support, as for the tin ball then be positioned at wide substrate and substrate week intermarginal.The heat energy that chip produces can reach wide substrate via post portion, reaches printed circuit board (PCB) again.Yet owing to must leave the space that holds the tin ball in the wide substrate, wide substrate only is being stretched on corresponding to the position between center window and penetralia tin ball below this substrate.Thus, this substrate is just uneven in manufacture process, and rocks easily and crooked, and then causes installation, the routing of chip to engage and encapsulating material mold formed all very difficult.In addition, this wide substrate may bend because of the mold formed of encapsulating material, in case and the avalanche of tin ball, just may make this packaging body can't be soldered to down one deck group body.Therefore, the yield of this packaging body is on the low side, reliability is not enough and cost is too high.
People's such as Erchak U.S. Patent Application Publication case proposes a kind of light-emitting device group body for No. 2007/0267642, and wherein the pedestal of an inverted T-shaped comprises the insulating barrier that a substrate, a protuberance and have through hole, on the insulating barrier and be provided with electric contact.One packaging body with through hole and transparent upper cover is to be arranged on the electric contact.One led chip is to be arranged at protuberance and to connect this substrate with routing.This protuberance be in abutting connection with this substrate and extend through insulating barrier and packaging body on through hole, enter in the packaging body.Insulating barrier is to be arranged on this substrate, and insulating barrier is provided with electric contact.Packaging body is to be arranged on the described electric contact and with insulating barrier to keep spacing.The heat energy that this chip produces can reach this substrate via protuberance, and then arrives a heat abstractor.Yet described electric contact is difficult for being arranged on the insulating barrier, is difficult to electrically connect with following one deck group body, and the multilayer route can't be provided.
Existing packaging body and heat-conducting plate have significant drawback.For example, radiating effect is caused restriction, yet the electrical insulating material that the epoxy resin of filling with pottery or carborundum etc. has high thermal conductivity has the shortcoming that tackness is low and the volume production cost is too high such as the electrical insulating material of low heat conductivities such as epoxy resin.This electrical insulating material may be in manufacturing process or the operation initial stage promptly because of the delamination of being heated.If then routing capabilities is limited for this substrate individual layer Circuits System, but if this substrate is the multilayer circuit system, then its blocked up dielectric layer will reduce radiating effect.In addition, preceding case technology still has radiating seat usefulness deficiency, volume is excessive or be difficult for being thermally coupled to down problems such as one deck group body.The manufacturing process of preceding case technology also is unsuitable for volume production operation cheaply.
Because all development situations and the relevant limit of existing high power semiconductor device packaging body and heat-conducting plate, industry is real need a kind of cost-effective, usefulness reliable, be suitable for volume production, multi-functional, the semiconductor chip group body that can adjust the signal route flexibly and have excellent heat radiation.
Summary of the invention
The object of the present invention is to provide a kind of semiconductor chip group body.
Another object of the present invention is to provide a kind of method of making semiconductor chipset body.
Semiconductor chip group body of the present invention, it comprises semiconductor device, a radiating seat, a lead and an adhesion layer at least.This semiconductor device is to be electrically connected to this lead and to be thermally coupled to this radiating seat.This radiating seat comprises a heat conduction projection and a pedestal at least.This heat conduction projection extends upward and enters one first opening of this adhesion layer from this pedestal, and this pedestal then extends laterally from this heat conduction projection.This lead comprises a weld pad, a terminal and a signal projection at least.This signal projection extends upward and enters one second opening of this adhesion layer from this terminal.
According to a pattern of the present invention, semiconductor chipset body comprises semiconductor device, an adhesion layer, a radiating seat and a lead at least.This adhesion layer has first opening and second opening at least.This radiating seat comprises a heat conduction projection and a pedestal at least, wherein this heat conduction projection be in abutting connection with this pedestal and along one upward to extending this pedestal top, this pedestal then extends this heat conduction projection below to opposite downward direction along one with this upward, and along extending laterally from this heat conduction projection perpendicular to this side surface direction that upwards reaches downward direction.This lead comprises a weld pad, a terminal and a signal projection at least, and wherein this signal projection is to extend this weld pad below and this terminal top, and the conductive path between this weld pad and this terminal comprises this signal projection.
This semiconductor device is to be positioned at this heat conduction projection top and to be overlapped in this heat conduction projection.This semiconductor device is to be electrically connected to this weld pad, thereby is electrically connected to this terminal; And be thermally coupled to this heat conduction projection, thereby be thermally coupled to this pedestal.This adhesion layer is to be arranged on this pedestal, extends this pedestal top, and extends laterally to this terminal or cross this terminal from this heat conduction projection.This weld pad is to extend this adhesion layer top, and this terminal then extends this adhesion layer below.This heat conduction projection extends into this first opening, and this signal projection then extends into this second opening.In addition, described projection has same thickness and copline each other, and this pedestal and this terminal also have same thickness and copline each other.
This lead can comprise this weld pad, this terminal, this signal projection and a route line.This route line can be in abutting connection with this weld pad.This signal projection can extend this weld pad and this route line below in abutting connection with this route line and this terminal, and extends this terminal top.This weld pad and this route line can be overlapped in this adhesion layer.This terminal can be overlapping by this adhesion layer.Extensible this adhesion layer that runs through of this signal projection.This weld pad, this terminal, this signal projection can contact this adhesion layer with this route line.One conductive path that is positioned between this weld pad and this terminal can comprise this signal projection and this route line.
According to another pattern of the present invention, semiconductor chipset body comprises semiconductor device, an adhesion layer, a radiating seat, a substrate and a lead at least.This adhesion layer has first opening and second opening at least.This radiating seat comprises a heat conduction projection and a pedestal at least, wherein this heat conduction projection be in abutting connection with this pedestal and along one upward to extending this pedestal top, this pedestal then extends this heat conduction projection below to opposite downward direction along one with this upward, and along extending laterally from this heat conduction projection perpendicular to this side surface direction that upwards reaches downward direction.This substrate comprises a weld pad and a dielectric layer at least, and first and second through hole extends through this substrate.This lead comprises this weld pad, a terminal and a signal projection at least, and wherein this signal projection is to extend this weld pad below and this terminal top, and the conductive path between this weld pad and this terminal comprises this signal projection.
This semiconductor device is to be positioned at this heat conduction projection top and to be overlapped in this heat conduction projection.This semiconductor device is to be electrically connected to this weld pad, thereby is electrically connected to this terminal; And be thermally coupled to this heat conduction projection, thereby be thermally coupled to this pedestal.This adhesion layer is to be arranged on this pedestal, extend this pedestal top, and extend in this first through hole first breach between this heat conduction projection and this substrate, extend in this second through hole second breach between this signal projection and this substrate simultaneously, and in described breach, extend across this dielectric layer.This adhesion layer extends laterally to this terminal or crosses this terminal from this heat conduction projection, and is between between this heat conduction projection and this dielectric layer, between this signal projection and this dielectric layer and between this pedestal and this dielectric layer.This substrate is to be arranged on this adhesion layer, and extends this pedestal top.
This weld pad is to extend this dielectric layer top, and this terminal then extends this adhesion layer below.
This heat conduction projection extends into this first opening and this first through hole, and this signal projection then extends into this second opening and this second through hole.In addition, described projection has same thickness and copline each other, and this pedestal and this terminal also have same thickness and copline each other.
This radiating seat can comprise a lid, and this lid is the over top that is positioned at this heat conduction projection, in abutting connection with the top of this heat conduction projection, cover the top of this heat conduction projection simultaneously from the top, and the top side along described side surface direction from this heat conduction projection is to extending.For example, this lid can be rectangle or square, and the top of this heat conduction projection can be circle.In this example, the size of this lid and shape can be through designs, cooperating the thermo-contact surface of this semiconductor device, then do not design according to the thermo-contact surface of this semiconductor device as for the size and the shape at this heat conduction projection top.This lid also can contact and cover this adhesion layer one in abutting connection with this heat conduction projection and with the coplanar part of this heat conduction projection.This lid also can be above this dielectric layer and this weld pad copline.In addition, but this this pedestal of heat conduction projection hot link and this lid.This radiating seat can be made up of this heat conduction projection and this pedestal, or is made up of this heat conduction projection, this pedestal and this lid.This radiating seat also can be made up of copper, aluminium or copper/nickel/aluminium alloy.No matter adopt which composition mode, this radiating seat all can provide thermolysis, and the heat energy of this semiconductor device is diffused to down one deck group body.
This semiconductor device can be arranged on this radiating seat.For example, this semiconductor device can be arranged on this radiating seat and this substrate, is overlapped in this heat conduction projection and this weld pad, is electrically connected to this weld pad by one first scolding tin, and is thermally coupled to this radiating seat by one second scolding tin.Perhaps, this semiconductor device can be arranged at this radiating seat but not on this substrate, is overlapped in this heat conduction projection but not this substrate is electrically connected to this weld pad by a routing, and is thermally coupled to this radiating seat by a solid brilliant material.
This semiconductor device can be the semiconductor chip once encapsulation or un-encapsulated.For example, this semiconductor device can be a LED packaging body that comprises led chip, and it is to be arranged on this radiating seat and this substrate, is overlapped in this heat conduction projection and this weld pad, be electrically connected to this weld pad via one first scolding tin, and be thermally coupled to this radiating seat via one second scolding tin.Perhaps, this semiconductor device can be the semiconductor chip, and it is to be arranged at this radiating seat but not on this substrate, is overlapped in this heat conduction projection but not this substrate is electrically connected to this weld pad via a routing, and is thermally coupled to this radiating seat via a solid brilliant material.
This adhesion layer can contact this heat conduction projection and this dielectric layer in this first breach, and contacts this signal projection and this dielectric layer in this second breach, and contacts this pedestal, this terminal and this dielectric layer outside described breach.This adhesion layer also can cover in described side surface direction and reach around described projection, and similar shape is coated on the sidewall of described projection.This adhesion layer can with the top and the bottom copline of described projection.
This adhesion layer can extend laterally to this terminal or cross this terminal from this heat conduction projection.For example, this adhesion layer and this terminal may extend to the peripheral edge of this group body; In this example, this adhesion layer is to extend laterally to this terminal from this heat conduction projection.Perhaps, this adhesion layer may extend to the peripheral edge of this group body, and this terminal is then kept at a distance with the peripheral edge of this group body; In the case, this adhesion layer is to extend laterally and cross this terminal from this heat conduction projection.
This heat conduction projection can be integrally formed with this pedestal.For example, this heat conduction projection and this pedestal can be single metallic object or comprise single metallic object in its interface, and wherein this single metallic object can be copper.Also extensible this first port that runs through of this heat conduction projection.This heat conduction projection also can be above this dielectric layer and this adhesion layer copline.This heat conduction projection also can be flat-top awl cylindricality, and its diameter is upwards to successively decrease from the flat top of this pedestal towards it in abutting connection with lid.
This signal projection can be integrally formed with this terminal.For example, this signal projection and this terminal can be single metallic object or comprise single metallic object in its interface, and wherein this single metallic object can be copper.Also extensible this second port that runs through of this signal projection.This signal projection also can be above this dielectric layer and this adhesion layer copline.This signal projection also can be flat-top awl cylindricality, and its diameter is upwards to successively decrease towards its flat top in abutting connection with the route line from this terminal.
This pedestal can cover this heat conduction projection from the below, supports this substrate simultaneously, and keeps at a distance with the peripheral edge of this group body.
This substrate can be kept at a distance with this heat conduction projection and this pedestal.This substrate also can be a laminar structure.
This lead can be kept at a distance with this radiating seat.This weld pad can contact this dielectric layer, and this terminal can contact this adhesion layer, and this signal projection then can contact this adhesion layer and this dielectric layer.In addition, this terminal can extend this signal projection below in abutting connection with this signal projection, and extends laterally from this signal projection.
This weld pad can be used as an electric contact of this semiconductor device, and this terminal can be used as down an electric contact of one deck group body, and this weld pad and this terminal can provide vertical signal route between this semiconductor device and this time one deck group body.
This group body can be a first order or second level monocrystalline or polycrystalline device.For example, this group body can be a first order packaging body that comprises one chip or many pieces of chips.Perhaps, this group body can be a second level module that comprises single LED packaging body or a plurality of LED packaging bodies, and wherein respectively this LED packaging body can comprise single led chip or many pieces of led chips.
The present invention makes the method for semiconductor chipset body, and it comprises: a heat conduction projection, a signal projection and a pedestal are provided; One adhesion layer is set on this pedestal, this step comprises one first opening that this heat conduction projection is inserted this adhesion layer, and this signal projection is inserted one second opening of this adhesion layer; One conductive layer is set on this adhesion layer, this step comprises one first through hole of this heat conduction projection being aimed at this conductive layer, and this signal projection is aimed at one second through hole of this conductive layer; Make this adhesion layer upwards flow in this first through hole one between this heat conduction projection and this conductive layer first breach and this second through hole in second breach between this signal projection and this conductive layer; Solidify this adhesion layer; One lead is provided, and this lead comprises a selected part of a weld pad, a terminal, this signal projection and this conductive layer at least; Semiconductor device is set on a radiating seat, wherein this radiating seat comprises this heat conduction projection and this pedestal at least; Electrically connect this semiconductor device to this lead; And this semiconductor device of hot link is to this radiating seat.
According to a pattern of the present invention, a kind of method of making semiconductor chipset body comprises: (1) provides a heat conduction projection, one signal projection, one pedestal, one adhesion layer and a conductive layer, wherein (a) this heat conduction projection is in abutting connection with this pedestal, along one upward to extending this pedestal top, extend into one first opening of this adhesion layer, and aim at one first through hole of this conductive layer, (b) this signal projection is in abutting connection with this pedestal, along this upward to extending this pedestal top, extend into one second opening of this adhesion layer, and aim at one second through hole of this conductive layer, (c) this pedestal is to extend described projection below to opposite downward direction along one upward with this, and along extending laterally from described projection perpendicular to this side surface direction that upwards reaches downward direction, (d) this adhesion layer is to be arranged on this pedestal, extend this pedestal top, and between this pedestal and this conductive layer, and it is uncured, in addition, (e) this conductive layer is to be arranged on this adhesion layer, and extends this adhesion layer top; (2) make this adhesion layer upwards flow in this first through hole one between this heat conduction projection and this conductive layer first breach and this second through hole in second breach between this signal projection and this conductive layer; (3) solidify this adhesion layer; (4) provide a lead, this lead comprises a selected part of a weld pad, a terminal, this signal projection and this conductive layer at least; (5) semiconductor device is set and comprises at least on the radiating seat of this heat conduction projection and this pedestal in one, wherein this semiconductor device is overlapped in this heat conduction projection; (6) electrically connect this semiconductor device to this weld pad, electrically connect this semiconductor device whereby to this terminal, wherein the conductive path between this weld pad and this terminal comprises this signal projection; And this semiconductor device of (7) hot link is to this heat conduction projection, and this semiconductor device of hot link is to this pedestal whereby.
According to another pattern of the present invention, a kind of method of making semiconductor chipset body comprises: (1) provides a heat conduction projection, an one signal projection and a pedestal, wherein this heat conduction projection is adjacency and is integrally formed in this pedestal, and along one upward to extending this pedestal top, this signal projection is adjacency and is integrally formed in this pedestal, and along this upward to extending this pedestal top, and this pedestal is to extend described projection below to opposite downward direction along one upward with this, and extends laterally along the side surface direction that reaches downward direction that makes progress perpendicular to this from described projection; (2) provide an adhesion layer, wherein first opening and second opening extend through this adhesion layer; (3) provide a conductive layer, wherein first and second through hole extends through this conductive layer; (4) this adhesion layer is set on this pedestal, this step comprises inserts this first opening with this heat conduction projection, and this signal projection inserted this second opening, wherein this adhesion layer is to extend this pedestal top, this heat conduction projection extends into this first opening, and this signal projection then extends into this second opening; (5) this conductive layer is set on this adhesion layer, this step comprises aims at this first through hole with this heat conduction projection, and this signal projection aimed at this second through hole, and wherein this conductive layer is to extend this adhesion layer top, this adhesion layer is between this pedestal and this conductive layer and uncured; (6) this adhesion layer of heat fused; (7) make this pedestal and the closing each other of this conductive layer, this heat conduction projection is upwards moved in this first through hole, and this signal projection is upwards moved in this second through hole, simultaneously the fusing adhesion layer between this pedestal and this conductive layer is exerted pressure, this pressure force this fusing adhesion layer upwards flow in this first through hole one between this heat conduction projection and this conductive layer first breach and this second through hole in second breach between this signal projection and this conductive layer; (8) this fusing adhesion layer that is heating and curing is adhered to this conductive layer with described projection and this pedestal mechanicalness whereby; (9) provide a lead, this lead comprises a weld pad, a terminal, a route line and this signal projection at least, wherein this lead comprises a selected part of this conductive layer, and a conductive path that is positioned between this weld pad and this terminal comprises this route line and this signal projection; (10) semiconductor device is set on a radiating seat, this radiating seat comprises this heat conduction projection and this pedestal at least, and wherein this semiconductor device is overlapped in this heat conduction projection; (11) electrically connect this semiconductor device to this weld pad, electrically connect this semiconductor device whereby to this terminal; And this semiconductor device of (12) hot link is to this heat conduction projection, and this semiconductor device of hot link is to this pedestal whereby.
This conductive layer is set can be comprised: this conductive layer is separately set on this adhesion layer, perhaps, earlier this conductive layer is attached to a carrier, again this conductive layer and this carrier together are arranged on this adhesion layer, so that this carrier is overlapped in this conductive layer, this conductive layer then contacts this adhesion layer and between between this adhesion layer and this carrier, follows after this adhesion layer solidifies, remove this carrier earlier, this lead is provided again.
According to another pattern of the present invention, a kind of method of making semiconductor chipset body comprises: (1) provides a heat conduction projection, one signal projection, one pedestal, one adhesion layer and a substrate, wherein (a) this substrate comprises a conductive layer and a dielectric layer at least, (b) this heat conduction projection is in abutting connection with this pedestal, along one upward to extending this pedestal top, extend through one first opening of this adhesion layer, and extend into one first through hole of this substrate, (c) this signal projection is in abutting connection with this pedestal, along this upward to extending this pedestal top, extend through one second opening of this adhesion layer, and extend into one second through hole of this substrate, (d) this pedestal is to extend described projection below to opposite downward direction along one upward with this, and along extending laterally from described projection perpendicular to this side surface direction that upwards reaches downward direction, (e) this adhesion layer is to be arranged on this pedestal, extend this pedestal top, and between this pedestal and this substrate, and it is uncured, (f) this substrate is to be arranged on this adhesion layer, extend this adhesion layer top, and this conductive layer is to extend this dielectric layer top, (g) one first breach is to be positioned at this first through hole, and between this heat conduction projection and this substrate, in addition, (h) one second breach is to be positioned at this second through hole, and between this signal projection and this substrate; (2) make this adhesion layer upwards flow into described breach; (3) solidify this adhesion layer; (4) semiconductor device being set comprises on the radiating seat of this heat conduction projection and this pedestal at least in one, wherein this semiconductor device is overlapped in this heat conduction projection, one lead comprises a selected part of a weld pad, a terminal, this signal projection and this conductive layer at least, and the conductive path between this weld pad and this terminal comprises this signal projection; (5) electrically connect this semiconductor device to this weld pad, electrically connect this semiconductor device whereby to this terminal; And this semiconductor device of (6) hot link is to this heat conduction projection, and this semiconductor device of hot link is to this pedestal whereby.
According to another pattern of the present invention, a kind of method of making semiconductor chipset body comprises: (1) provides a heat conduction projection, an one signal projection and a pedestal, wherein this heat conduction projection is adjacency and is integrally formed in this pedestal, and along one upward to extending this pedestal top, this signal projection is adjacency and is integrally formed in this pedestal, and along this upward to extending this pedestal top, this pedestal is to extend described projection below to opposite downward direction along one upward with this, and extends laterally along the side surface direction that reaches downward direction that makes progress perpendicular to this from described projection; (2) provide an adhesion layer, wherein first opening and second opening extend through this adhesion layer; (3) provide a substrate that comprises a conductive layer and a dielectric layer at least, wherein first and second through hole extends through this substrate; (4) this adhesion layer is set on this pedestal, this step comprises passes this first opening with this heat conduction projection, and this signal projection passed this second opening, wherein this adhesion layer is to extend this pedestal top, this heat conduction projection extends through this first opening, and this signal projection then extends through this second opening; (5) this substrate is set on this adhesion layer, this step comprises inserts this first through hole with this heat conduction projection, and this signal projection inserted this second through hole, wherein this substrate extends this adhesion layer top, this conductive layer extends this dielectric layer top, this heat conduction projection extends through this first opening and enters this first through hole, this signal projection extends through this second opening and enters this second through hole, this adhesion layer is between this pedestal and this substrate and uncured, one first breach is in this first through hole and between this heat conduction projection and this substrate, in addition, one second breach is in this second through hole and between this signal projection and this substrate; (6) this adhesion layer of heat fused; (7) make this pedestal and the closing each other of this substrate, this heat conduction projection is upwards moved in this first through hole, and this signal projection is upwards moved in this second through hole, simultaneously the fusing adhesion layer between this pedestal and this substrate is exerted pressure, wherein this pressure forces this fusing adhesion layer upwards to flow into described breach, and described projection and this fusing adhesion layer are to extend this dielectric layer top; (8) this fusing adhesion layer that is heating and curing is adhered to this substrate with described projection and this pedestal mechanicalness whereby; (9) semiconductor device is set on a radiating seat, this radiating seat comprises this heat conduction projection and this pedestal at least, wherein this semiconductor device is overlapped in this projection, one lead comprises a selected part of a weld pad, a terminal, this signal projection and this conductive layer at least, and the conductive path between this weld pad and this terminal comprises this signal projection; (10) electrically connect this semiconductor device to this weld pad, electrically connect this semiconductor device whereby to this terminal; And this semiconductor device of (11) hot link is to this heat conduction projection, and this semiconductor device of hot link is to this pedestal whereby.
Provide this heat conduction projection, this signal projection and this pedestal to comprise: a metallic plate is provided; Form a patterned etch resistance layer on this metallic plate, its selectivity exposes this metallic plate to the open air; This metallic plate of etching makes it form the defined pattern of this patterned etch resistance layer, forms a groove whereby on this metallic plate, and it extends into but does not run through this metallic plate; Then remove this patterned etch resistance layer, wherein this heat conduction projection comprises one first of this metallic plate and is not subjected to etching part, first not to be subjected to etching part be to protrude in this pedestal top for this, and by this groove side to around, this signal projection then comprises one second of this metallic plate and is not subjected to etching part, second not to be subjected to etching part be to protrude in this pedestal top for this, and by this groove side to around, this pedestal is not subjected to etching part for one of this metallic plate yet, and this is not subjected to etching part is to be positioned at described projection and this groove below.
Provide this adhesion layer to comprise: the film that a uncured epoxy resin is provided.This adhesion layer is flowed can be comprised: melt this uncured epoxy resin; And push this uncured epoxy resin between this pedestal and this substrate.Solidifying this adhesion layer can comprise: the uncured epoxy resin that solidifies this fusing.
Provide this radiating seat to comprise: after solidifying this adhesion layer with this semiconductor device is set before, on this heat conduction projection, provide a lid, this lid is positioned at an over top of this heat conduction projection, top in abutting connection with this heat conduction projection, cover the top of this heat conduction projection simultaneously from the top, and extend laterally along described side surface direction from the top of this heat conduction projection.
Provide this weld pad to comprise: after solidifying this adhesion layer, to remove the selected part of this conductive layer.
Provide this weld pad also can comprise: after solidifying this adhesion layer, grind described projection, this adhesion layer and this conductive layer so that described projection, this adhesion layer and this conductive layer one towards this upward to uper side surface be that side direction flushes each other; Then remove the selected part of this conductive layer, so that this weld pad comprises the selected part of this conductive layer.Described grinding can comprise: grind this adhesion layer and do not grind described projection; Then grind described projection, this adhesion layer and this conductive layer.Described removal can comprise: utilize the pattern etched resistance layer of this weld pad of definable that this conductive layer is carried out wet chemical etch.
Provide this weld pad also can comprise: after grinding was finished, conductive metal deposition was to form one second conductive layer on described projection, this adhesion layer and this conductive layer; Remove the selected part of these conductive layers then, so that this weld pad comprises the selected part of these conductive layers.Conductive metal deposition can comprise to form this second conductive layer: one first coating is located on described projection, this adhesion layer and this conductive layer in the mode of electroless plating lining; Then one second coating is located on this first coating with plating mode.Described removal can comprise: utilize the pattern etched resistance layer of this weld pad of definable that these conductive layers are carried out wet chemical etch.
Provide this terminal to comprise: after solidifying this adhesion layer, to remove the selected part of this pedestal.Described removal can comprise: utilize the pattern etched resistance layer of this terminal of definable that this pedestal is carried out wet chemical etch, so that comprising one of this pedestal, this terminal is not subjected to etching part, this is not subjected to etching part in abutting connection with this signal projection, and with this base-separation, separate each other, so the part of non-this pedestal.Thus, this weld pad just can utilize different pattern etched resistance layers to form simultaneously in same wet chemical etch step with this terminal.
Provide this lid to comprise: the selected part of removing this second conductive layer.Provide this lid also can comprise: to finish aforementioned grinding earlier, utilize the pattern etched resistance layer of this lid of definable to remove the selected part of this second conductive layer then, so that this lid comprises the selected part of this second conductive layer.Thus, this weld pad and this lid just can pass through same grinding step, and utilize same pattern etched resistance layer to form simultaneously in same wet chemical etch step.
This adhesion layer is flowed can be comprised: fill up described breach with this adhesion layer.This adhesion layer is flowed also can be comprised: push this adhesion layer, make it pass through described breach, arrive described projection and this substrate top, and and in the part of described projection end face and the described breach of this substrate top surface adjacency.
Solidifying this adhesion layer can comprise: described projection and this pedestal mechanicalness are incorporated into this substrate.
This semiconductor device is set can be comprised: this semiconductor device is arranged on this lid.This semiconductor device is set also can be comprised: this semiconductor device is arranged at this heat conduction projection, this lid, this first opening and this first through hole top, and make this semiconductor device be overlapped in this heat conduction projection, this lid, this first opening and this first through hole, but be not overlapped in this signal projection, this second opening and this second through hole.
This semiconductor device is set can be comprised: one first scolding tin and one second scolding tin are provided, and wherein this first scolding tin comprises between the LED packaging body and this weld pad of led chip one, and this second scolding tin is then between this LED packaging body and this lid.Electrically connecting this semiconductor device can comprise: this first scolding tin is provided between this LED packaging body and this weld pad.This semiconductor device of hot link can comprise: this second scolding tin is provided between this LED packaging body and this lid.
This semiconductor device is set can be comprised: a solid brilliant material is provided between semiconductor chip and this lid.Electrically connecting this semiconductor device can comprise: provide a routing between this chip and this weld pad.This semiconductor device of hot link can comprise: this solid brilliant material is provided between this chip and this lid.
This adhesion layer can contact described projection, this pedestal, this lid and this dielectric layer, cover this substrate from the below, cover and around described projection in described side surface direction, and extend to this group system make finish after with organize bodies with series-produced other and separate formed peripheral edge.
Make when this group system and to finish and with after bodies separate with series-produced other groups, this pedestal can cover this semiconductor device, this heat conduction projection and this lid from the below, supports this substrate simultaneously, and keeps at a distance with the peripheral edge of this group body.
Beneficial effect of the present invention is: the present invention has multiple advantages.This radiating seat can provide excellent radiating effect, and makes heat energy this adhesion layer of not flowing through.Therefore, this adhesion layer can be the low-cost dielectric of low heat conductivity and is difficult for delamination.This heat conduction projection and this pedestal can be integrally formed to improve reliability.This lid can be this semiconductor device custom-made by size to promote hot linked effect.This adhesion layer can be between between described projection and this substrate and between this pedestal and this substrate, so as to providing firm mechanicalness to be connected between this radiating seat and this substrate.This lead can form simple circuit pattern so that the signal route to be provided, or forms complicated circuit pattern to realize the flexible multilayer signal of tool route.This lead also can provide vertical signal route between this terminal below this weld pad above this dielectric layer and this adhesion layer.This pedestal can be this substrate mechanical support is provided, and prevents its flexural deformation.This group body can utilize the low temperature process manufacturing, not only reduces stress, also improves reliability.The height control operation that this group body also can utilize circuit board, lead frame and coil type substrate manufactory to implement is easily made.
Above-mentioned and other feature of the present invention and advantage will be in hereinafter further being illustrated by various embodiment.
Description of drawings
Fig. 1 to Fig. 4 is a profile, illustrates in one embodiment of the invention in order to make the method for a projection and a pedestal;
Fig. 5 and Fig. 6 are respectively vertical view and the upward view of Fig. 4;
Fig. 7 and Fig. 8 are profile, illustrate in one embodiment of the invention in order to make the method for an adhesion layer;
Fig. 9 and Figure 10 are respectively vertical view and the upward view of Fig. 8;
Figure 11 and Figure 12 are profile, illustrate in one embodiment of the invention in order to make the method for a substrate;
Figure 13 and Figure 14 are respectively vertical view and the upward view of Figure 12;
Figure 15 to Figure 26 is a profile, illustrates in one embodiment of the invention that in order to make the method for a heat-conducting plate, this heat-conducting plate is provided with a substrate on its adhesion layer;
Figure 27 and Figure 28 are respectively vertical view and the upward view of Figure 26;
Figure 29,30 and Figure 31 be respectively profile, vertical view and the upward view of a heat-conducting plate in one embodiment of the invention, this heat-conducting plate is provided with a lead on its adhesion layer;
Figure 32,33 and Figure 34 be respectively profile, vertical view and the upward view of semiconductor chipset body in one embodiment of the invention, this semiconductor chip group body comprises the LED packaging body that a heat-conducting plate and has back contact;
Figure 35,36 and Figure 37 be respectively profile, vertical view and the upward view of semiconductor chipset body in one embodiment of the invention, this semiconductor chip group body comprises the LED packaging body that a heat-conducting plate and has the side pin;
Figure 38,39 and Figure 40 be respectively profile, vertical view and the upward view of semiconductor chipset body in one embodiment of the invention, this semiconductor chip group body comprises a heat-conducting plate and semiconductor chip.
Embodiment
The present invention is described in detail below in conjunction with drawings and Examples.
Fig. 1 to Fig. 4 is a profile, illustrates a kind of method of making a heat conduction projection 22, a signal projection 24 and a pedestal 26 in one embodiment of the invention, and Fig. 5 and Fig. 6 are respectively vertical view and the upward view of Fig. 4.
Fig. 1 is the profile of metallic plate 10, and metallic plate 10 comprises opposing main surperficial 12 and 14.Illustrated metallic plate 10 is that a thickness is 330 microns copper coin.Copper has advantages such as the good and low cost of thermal conductivity height, associativity.Metallic plate 10 can be made by multiple metal, as copper, aluminium, iron-nickel alloy, iron, nickel, silver, gold, its mixture and alloy thereof.
Fig. 2 is a profile, shows to be formed with a patterned etch resistance layer 16 and an etchant resistive layer 18 that comprehensively covers on the metallic plate 10.Patterned etch resistance layer 16 shown in the figure is the photoresist layers that are deposited on the metallic plate 10 with the etchant resistive layer 18 that covers comprehensively, and its production method is to utilize compression molding techniques simultaneously photoresist layer to be pressed on surface 12 and 14 respectively with hot roller.Moist spin-coating method and pouring curtain rubbing method also form technology for the photoresistance that is suitable for.In photoresist layer,, make the light selectivity one light shield (figure does not show) closing, make the photoresistance that is subjected to light partly become and to dissolve by light shield then according to prior art; Remove with developer solution more afterwards and be not subjected to light and still soluble photoresistance part, make photoresist layer form pattern.Therefore, patterned etch resistance layer 16 has the pattern of an alternative exposed surface 12, and comprehensive etchant resistive layer 18 that covers is pattern-free and covering surfaces 14 then.
Fig. 3 is a profile, shows that metallic plate 10 is formed with to be dug into but the groove 20 of penetrating metal plate 10 not.Groove 20 is that the mode with etching metal plate 10 forms, so that metallic plate 10 forms by patterned etch resistance layer 16 defined patterns.Etching mode shown in the figure is positive wet chemical etch.For example, structure can be reversed, make patterned etch resistance layer 16 down, and the etchant resistive layer 18 that comprehensively covers up, utilize a bottom nozzle towards pattern etched resistance layer 16 (figure does not show) that chemical etching liquor is sprayed on metallic plate 10 and patterned etch resistance layer 16 up then, meanwhile, a top jet nozzle towards the etchant resistive layer 18 of comprehensive covering (figure does not show) then will not start, and just can remove etched accessory substance by gravity thus.Perhaps, utilize the etchant resistive layer 18 that comprehensively covers that back-protective is provided, also structure can be immersed in the chemical etching liquor to form groove 20.Described chemical etching liquor has the height specific aim to copper, and can be carved into metallic plate 10 and reach 300 microns.Therefore, groove 20 extends into from surface 12 but penetrating metal plate 10 not, and with 30 microns of surface 14 distances, the degree of depth then is 300 microns.Chemical etching liquor also causes side direction to be etched into to the metallic plate 10 of patterned etch resistance layer 16 belows.The chemical etching liquor that is suitable for can be the solution that contains alkali ammonia or the diluted mixture thing of nitric acid and hydrochloric acid.In other words, described chemical etching liquor can be acidity or alkalescence.The desirable etching period that is enough to form groove 20 and does not cause metallic plate 10 excessively to be exposed to chemical etching liquor can be determined by trial and error pricing.
Fig. 4,5 and Fig. 6 be respectively profile, vertical view and the upward view of the metallic plate 10 behind the etchant resistive layer 18 of removing patterned etch resistance layer 16 and covering comprehensively, wherein patterned etch resistance layer 16 and the etchant resistive layer 18 that comprehensively covers solvent handle and remove.For example, to can be pH be 14 strong basicity potassium hydroxide solution to solvent for use.
Therefore metallic plate 10 after the etching comprises heat conduction projection 22, signal projection 24 and pedestal 26.
Heat conduction projection 22 is not subjected to etching part for metallic plate 10 is subjected to one first of patterned etch resistance layer 16 protections.Heat conduction projection 22 is abuts seat 26, form one with pedestal 26, and be stretched on pedestal 26 tops, and by groove 20 from flanked.Heat conduction projection 22 high 300 microns (equaling the degree of depth of groove 20), the diameter of its end face (circular portion on surface 12) is 1000 microns, the diameter of bottom (circular portion of abuts seat 26) then is 1100 microns.Therefore, heat conduction projection 22 is flat-top awl cylindricality (a similar frustum), and its sidewall convergent, diameter then upwards successively decrease towards its flat circular end face from pedestal 26 places.This convergent sidewall is to form because of the chemical etching liquor side direction is etched into patterned etch resistance layer 16 belows.This end face and the circumference of this bottom concentric (as shown in Figure 5).
Signal projection 24 is not subjected to etching part for metallic plate 10 is subjected to one second of patterned etch resistance layer 16 protections.Signal projection 24 is abuts seat 26, form one with pedestal 26, and be stretched on pedestal 26 tops, and by groove 20 from flanked.Signal projection 24 high 300 microns (equaling the degree of depth of groove 20), the diameter of its end face (circular portion on surface 12) is 300 microns, the diameter of bottom (circular portion of abuts seat 26) then is 400 microns.Therefore, signal projection 24 is flat-top awl cylindricality (a similar frustum), and its sidewall convergent, diameter then upwards successively decrease towards its flat circular end face from pedestal 26 places.This convergent sidewall is to form because of the chemical etching liquor side direction is etched into patterned etch resistance layer 16 belows.This end face and the circumference of this bottom concentric (as shown in Figure 5).
Pedestal 26 one is not subjected to etching part for metallic plate 10 below heat conduction projection 22 and signal projection 24, and extends laterally along a lateral plane (as side surface direction such as left and right) from heat conduction projection 22, signal projection 24, and thickness is 30 microns (being 330-300).
Heat conduction projection 22, signal projection 24 can treated conjugations with reinforcement and epoxy resin and scolder with pedestal 26.For example, heat conduction projection 22, signal projection 24 and pedestal 26 can be through chemical oxidation or microetch to produce more coarse surface.
Heat conduction projection 22, signal projection 24 are single metal (copper) body by the formation of reduction method in the accompanying drawings with pedestal 26.In addition, also can utilize a contact stamped sheet metal 10, wherein this contact has first groove of definable heat conduction projection 22 or second groove or the hole of hole and definable signal projection 24, so that heat conduction projection 22, signal projection 24 and pedestal 26 become stamping forming single metallic object.Perhaps, can utilize the method that increases to form heat conduction projection 22, signal projection 24, its practice is by technology such as plating, chemical vapor deposition (CVD), physical vapor deposition (PVD)s, and heat conduction projection 22, signal projection 24 are deposited on the pedestal 26.For example, can on copper pedestal 26, electroplate scolder heat conduction projection 22 and scolder signal projection 24; In the case, heat conduction projection 22 is to join with metallurgical interface with pedestal 26, is adjacent to each other but is not integrally formed, and signal projection 24 is to join with metallurgical interface with pedestal 26, is adjacent to each other but is not integrally formed.Perhaps, can utilize partly to increase method formation heat conduction projection 22, signal projection 24, for example can above the bottom that heat conduction projection 22,24 its etchings of signal projection form, deposit the top of heat conduction projection 22, signal projection 24 respectively.In addition, heat conduction projection 22, signal projection 24 and pedestal 26 also can form partly to increase method simultaneously, for example can deposit the similar shape top of heat conduction projection 22, signal projection 24 and pedestal 26 above the bottom that heat conduction projection 22, signal projection 24 and pedestal 26 its etchings form respectively.Heat conduction projection 22, signal projection 24 also can be sintered in pedestal 26.
Fig. 7 and Fig. 8 are profile, and a kind of method of making adhesion layer 28 in one embodiment of the invention is described.Fig. 9 and Figure 10 are respectively vertical view and the upward view of drawing according to Fig. 8.
Fig. 7 is the profile of adhesion layer 28, and wherein adhesion layer 28 is the film of the uncured epoxy resin in second rank (B-stage), and it is a uncured and patternless lamellar body, thick 180 microns.
Adhesion layer 28 can be multiple organic or inorganic various dielectric films or the film that system becomes that be electrically insulated.For example, originally adhesion layer 28 can be a film, and wherein the thermosetting epoxy resin of resin kenel immerses a reinforcement material rear section and is cured to mid-term.Described epoxy resin can be FR-4, but also can use such as other epoxy resin such as multifunctional and bismaleimides-triazine (BT) resins.In application-specific, cyanate, polyimides and polytetrafluoroethylene (PTFE) also are available epoxy resin.Described reinforcement material can be electron level glass, also can be other reinforcement materials, as high strength glass, low dielectric constant glass, quartz, Ke Weila fiber (kevlar aramid) and paper etc.Described reinforcement material also can be fabric, adhesive-bonded fabric or non-directional microfibre.Can will add such as silicon fillers such as (levigation vitreous silicas) in the film to promote thermal conductivity, thermal shock resistance and thermal expansion matching.Can utilize commercially available prepreg, as Wisconsin, USA Ao Kelai W.L.Gore; The SPEEDBOARD C film of Associates is an example.
Fig. 8,9 and Figure 10 be respectively profile, vertical view and the upward view of adhesion layer 28 with opening 30,32.Opening 30 is first window, and it runs through adhesion layer 28 and diameter is 1150 microns.Opening 32 is second window, and it runs through adhesion layer 28 and diameter is 450 microns.Opening the 30, the 32nd mechanically bores this film and forms, but also can other technologies make, as punching out and punching press etc.
Figure 11 and Figure 12 are profile, and a kind of method of making substrate 34 in one embodiment of the invention is described, Figure 13 and Figure 14 then are respectively vertical view and the upward view of drawing according to Figure 12.
Figure 11 is the profile of substrate 34.Substrate 34 comprises conductive layer 36 and dielectric layer 38.Conductive layer 36 is electrical conductor, and it contacts dielectric layer 38 and extends dielectric layer 38 tops.38 of dielectric layers are the body that is electrically insulated.For example, conductive layer 36 is that a pattern-free and thickness are 30 microns copper coin, and dielectric layer 38 then is 150 microns epoxy resin for thickness.
Figure 12,13 and Figure 14 be respectively profile, vertical view and the upward view of substrate 34 with through hole 40,42.Through hole 40 is first window, and it runs through substrate 34 and diameter is 1150 microns.Through hole 42 is second window, and it runs through substrate 34 and diameter is 450 microns.Through hole the 40, the 42nd mechanically bores conductive layer 36 and forms with dielectric layer 38, but also can other technologies make, as punching out and punching press etc.The preferably, opening 30 has same diameter with through hole 40, and is to form by same way as on same rig floor with identical drill bit; And opening 32 also has same diameter with through hole 42, and is to form by same way as on same rig floor with identical drill bit.
It is a laminar structure that substrate 34 illustrates at this, but substrate 34 also can be other bodies that is electrical connected, as ceramic wafer or printed circuit board (PCB).Similarly, substrate 34 can comprise the layer body of most embedded circuit in addition.
Figure 15 to Figure 26 is a profile, and a kind of method of making heat-conducting plate 74 in one embodiment of the invention is described, this heat-conducting plate 74 comprises heat conduction projection 22, signal projection 24, pedestal 26, adhesion layer 28 and substrate 34.Figure 27 and Figure 28 are respectively vertical view and the upward view of Figure 26.
Figure 15 is that adhesion layer 28 is arranged at the profile on the pedestal 26.Adhesion layer 28 drops on the pedestal 26, heat conduction projection 22 is upwards inserted and runs through opening 30, and signal projection 24 then upwards inserts and runs through opening 32, finally then makes adhesion layer 28 contacts and is positioned pedestal 26.The preferably, heat conduction projection 22 insert and run through opening 30 after be to aim at opening 30 and be positioned at the middle position of opening 30 but do not contact adhesion layer 28; And signal projection 24 insert and run through opening 32 after also aim at opening 32 and be positioned at the middle position of opening 32 but do not contact adhesion layer 28.
In structure shown in Figure 16, substrate 34 is to be arranged on the adhesion layer 28.Substrate 34 drops on the adhesion layer 28, makes heat conduction projection 22 upwards insert through hole 40, and signal projection 24 then upwards inserts through hole 42, finally then makes substrate 34 contacts and is positioned adhesion layer 28.
Heat conduction projection 22 is aligned through holes 40 and the middle position that is positioned at through hole 40 and contact substrate 34 not after inserting (but not running through) through hole 40.Therefore, breach 44 is to be positioned at through hole 40 and between 34 of heat conduction projection 22 and substrates.Breach 44 lateral rings are around heat conduction projection 22, simultaneously by substrate 34 flanked.In addition, opening 30 and through hole 40 are to align mutually and have same diameter.
Signal projection 24 is aligned through holes 42 and the middle position that is positioned at through hole 42 and contact substrate 34 not after inserting (but not running through) through hole 42.Therefore, breach 46 is in through hole 42 and between signal projection 24 and substrate 34.Breach 46 lateral rings are around signal projection 24, simultaneously by substrate 34 flanked.In addition, opening 32 and through hole 42 are to align mutually and have same diameter.
At this moment, substrate 34 is to be placed on the adhesion layer 28 and contact with it, and extends adhesion layer 28 tops.After heat conduction projection 22 extends through opening 30, enter through hole 40 and arrive dielectric layer 38.Heat conduction projection 22 is than low 60 microns of the end face of conductive layer 36, and via through hole 40 towards one upward to exposing.After signal projection 24 extends through opening 32, enter through hole 42 and arrive dielectric layer 38.Signal projection 24 is than low 60 microns of the end face of conductive layer 36, and via through hole 42 towards this upward to exposing.Adhesion layer 28 contact pedestals 26 with substrate 34 and between this between the two.Adhesion layer 28 contacts dielectric layers 38 but keeps at a distance with conductive layer 36.In this stage, adhesion layer 28 still is the film of the uncured epoxy resin in second rank (B-stage), then is air in the breach 44,46.
Figure 17 illustrates adhesion layer 28 and flow into breach 44,46 after heating and pressurizing.In this figure, the method that forces adhesion layer 28 to flow into breach 44,46 is that conductive layer 36 is imposed downward pressure and/or pedestal 26 is imposed upward pressure, that is to say with pedestal 26 and substrate 34 relative pressings, so as to adhesion layer 28 is exerted pressure; Meanwhile also to adhesion layer 28 heating.The adhesion layer 28 that is heated can be shaped arbitrarily under pressure.Therefore, after the adhesion layer 28 that is positioned at 34 of pedestal 26 and substrates is squeezed, changes its original-shape and upwards flow into breach 44,46.Pedestal 26 continues towards pressing each other, till adhesion layer 28 fills up breach 44,46 with substrate 34.In addition, after the gap between pedestal 26 and the substrate 34 dwindled, adhesion layer 28 still filled up in this gap that has dwindled.
For example, pedestal 26 and conductive layer 36 can be arranged between upper and lower the presenting a theatrical performance as the last item on a programme (figure does not show) of a pressing machine.In addition, can and go up buffering paper (figure does not show) with an overhead gage and be folded between conductive layer 36 and upper holder, and with a lower baffle plate and down buffering paper (figure does not show) be folded between pedestal 26 and bottom platen.With this superimposed body that constitutes be followed successively by from top to bottom upper holder, overhead gage, on cushion paper, substrate 34, adhesion layer 28, pedestal 26, cushion paper, lower baffle plate and bottom platen down.In addition, can utilize the instrument pin (figure does not show) that extends upward and pass pedestal 26 registration holes (figure do not show) from bottom platen that this superimposed body is positioned on the bottom platen.
Then with the upper and lower heating and mutually advancing of presenting a theatrical performance as the last item on a programme, whereby to adhesion layer 28 heating and exert pressure.Baffle plate can disperse the heat of presenting a theatrical performance as the last item on a programme, and even makes heat be uniformly applied to pedestal 26 and substrate 34 adhesion layers 28.Buffering paper then disperses the pressure of presenting a theatrical performance as the last item on a programme, and even makes pressure be uniformly applied to pedestal 26 and substrate 34 adhesion layers 28.Originally, dielectric layer 38 contacts and is pressed on adhesion layer 28.Along with perseveration and the lasting heating of presenting a theatrical performance as the last item on a programme, the adhesion layer 28 that pedestal 26 and substrate are 34 is squeezed and begins fusing, thereby upwards flows into breach 44,46, and arrives at conductive layer 36 after by dielectric layer 38.For example, uncured epoxy resin is clamp-oned in the breach 44,46 by pressure after meeting heat fusing, but reinforcement material and filler are still stayed 34 of pedestal 26 and substrates.The speed that adhesion layer 28 rises in through hole 40 is greater than heat conduction projection 22, eventually to filling up breach 44.The speed that adhesion layer 28 rises in through hole 42 is also greater than signal projection 24, eventually to filling up breach 46.Adhesion layer 28 also rises to the position of a little higher than breach 44,46, and present a theatrical performance as the last item on a programme stop action before, overflow to heat conduction projection 22 end faces and conductive layer 36 end faces in abutting connection with breach 44 places, and signal projection 24 end faces and conductive layer 36 end faces are in abutting connection with breach 46 places.Reality is required just this situation may to take place if film thickness is slightly larger than.Thus, adhesion layer 28 just forms a covering thin layer at heat conduction projection 22 end faces and signal projection 24 end faces.Presenting a theatrical performance as the last item on a programme stops action after touching heat conduction projection 22 and signal projection 24, but still continues adhesion layer 28 heating.
The direction that adhesion layer 28 upwards flows in breach 44,46 is as making progress among the figure shown in the thick arrow, heat conduction projection 22, signal projection 24 and pedestal 26 move up as making progress shown in the thin arrow with respect to substrate 34, and substrate 34 moves down then shown in thin arrow downwards with pedestal 26 with respect to heat conduction projection 22, signal projection 24.
Adhesion layer 28 among Figure 18 has cured.
For example, presenting a theatrical performance as the last item on a programme still continues clamping heat conduction projection 22, signal projection 24 and pedestal 26 and heat supplies after stopping to move, and second rank (B-stage) epoxy resin that will melt whereby is converted to that solidify on third rank (C-stage) or the epoxy resin of sclerosis.Therefore, epoxy resin is to solidify in the mode of similar existing multilayer pressing.Behind the epoxy resin cure, the separation of presenting a theatrical performance as the last item on a programme is so that take out structure from the pressing machine.
The adhesion layer 28 that solidifies provides firm mechanicalness to be connected at 34 of heat conduction projection 22 and substrates, signal projection 24 and 34 of substrates and pedestal 26 and 34 of substrates.Adhesion layer 28 can bear general operation pressure and unlikely distortion damage, then only temporary transient distortion when meeting excessive pressure.Moreover the thermal expansion that adhesion layer 28 can absorb 34 of heat conduction projection 22 and 34 of substrates, signal projection 24 and 34 of substrates and pedestal 26 and substrates does not match.
In this stage, heat conduction projection 22, signal projection 24 and conductive layer 36 be copline roughly, adhesion layer 28 and conductive layer 36 then extend to one face this upward to end face.For example, adhesion layer that pedestal 26 and dielectric layer are 38 28 thick 120 microns reduces 60 microns for 180 microns than its original depth; That is to say that heat conduction projection 22 raises 60 microns in through hole 40, signal projection 24 raises 60 microns in through hole 42, and substrate 34 then descends 60 microns with respect to heat conduction projection 22, signal projection 24.300 microns of the height of heat conduction projection 22 and signal projection 24 are equal to the height that combines of conductive layer 36 (30 microns), dielectric layer 38 (150 microns) and below adhesion layer 28 (120 microns) basically.In addition, heat conduction projection 22 still be positioned at out 30 with through hole 40 in middle position and keep at a distance with substrate 34, signal projection 24 still is positioned at opening 32 keeps at a distance with the middle position of through hole 42 and with substrate 34, and adhesion layer 28 then fills up the space of 34 of pedestal 26 and substrates and fills up breach 44,46.For example, breach 44 (and heat conduction projection 22 and substrate 34 adhesion layer 28) is heat conduction projection 22 end face places wide 75 microns [(1150-1000)/2], and breach 46 (and signal projection 24 and substrate 34 adhesion layer 28) is signal projection 24 end face places wide 75 microns [(450-300)/2].Adhesion layer 28 extends across dielectric layer 38 in breach 44,46.In other words, adhesion layer 28 in the breach 44 be along this upward to and a downward direction is extended and dielectric layer 38 thickness of crossing over breach 44 lateral walls, the adhesion layer 28 in the breach 46 then the edge this upward to and this downward direction extend and cross over dielectric layer 38 thickness of breach 46 lateral walls.Adhesion layer 28 also comprises the thin top portion of breach 44,46 tops, and the end face of its thermal contact conductance projection 22, signal projection 24 and the end face of conductive layer 36 also extend 10 microns above heat conduction projection 22, signal projection 24.
In structure shown in Figure 19, heat conduction projection 22, signal projection 24, adhesion layer 28 reachRemove all at the top of conductive layer 36.
The top of heat conduction projection 22, signal projection 24, adhesion layer 28 and conductive layer 36 is to remove with lapping mode, for example the top of handling structure with rotation diamond wheel and distilled water.Originally, diamond wheel only grinds off adhesion layer 28.Continue to grind, then adhesion layer 28 is moved down attenuation because of grinding the surface.Diamond wheel is thermal contact conductance projection 22, signal projection 24 and conductive layer 36 (may not simultaneously) at last, thereby begins to grind heat conduction projection 22, signal projection 24 and conductive layer 36.After continuing to grind, heat conduction projection 22, signal projection 24, adhesion layer 28 and conductive layer 36 are all moved down attenuation because of grinding the surface.Grinding continues to removes till the desired thickness.Afterwards, remove dirt with the distilled water flushing structure.
Above-mentioned grinding steps grinds off 25 microns with the top of adhesion layer 28, and the top of heat conduction projection 22 is ground off 15 microns, the top of signal projection 24 is ground off 15 microns, and the top of conductive layer 36 is ground off 15 microns.Thickness reduces does not all have obviously influence to heat conduction projection 22, signal projection 24 or adhesion layer 28, but the thickness of conductive layer 36 significantly is reduced to 15 microns from 30 microns.
So far, heat conduction projection 22, signal projection 24, adhesion layer 28 and conductive layer 36 be positioned at jointly dielectric layer 38 tops one face this upward to level and smooth splicing side end face on.Similarly, heat conduction projection 22, signal projection 24 and adhesion layer 28 are coplines each other at pedestal 26 places.
Structure shown in Figure 20 has conductive layer 50, and it is to be deposited on heat conduction projection 22, signal projection 24, adhesion layer 28 and the conductive layer 36.
Conductive layer 50 thermal contact conductance projections 22, signal projection 24, adhesion layer 28 and conductive layer 36, and cover this from the top.For example, structure can be immersed in the activator solution, thereby make adhesion layer 28 produce the catalyst reaction with electroless copper, then one first bronze medal layer is located on heat conduction projection 22, signal projection 24, adhesion layer 28 and the conductive layer 36 in the mode of electroless plating lining, then one second bronze medal layer is located on this first bronze medal layer with plating mode.About 2 microns of the first bronze medal bed thickness, about 13 microns of the second bronze medal bed thickness is so the gross thickness of conductive layer 50 is about 15 microns.Thus, the thickness of conductive layer 36 just increases to about 30 microns (15+15).Conductive layer 50 is as heat conduction projection 22 and a cover layer of signal projection 24 and a thickening layer of conductive layer 36.For ease of explanation, heat conduction projection 22, signal projection 24 all show with individual layer with conductive layer 50 and conductive layer 36 and 50.Because copper is homogeneity lining, boundary line that the boundary line that heat conduction projection 22 and conductive layer are 50, signal projection 24 and conductive layer are 50 and conductive layer 36 and 50 s' boundary line (all illustrating with dotted line) may be difficult for discovering even can't discovering.Yet the boundary line that adhesion layer 28 and conductive layer are 50 is clearly visible.
The upper and lower surface of structure shown in Figure 21 is respectively equipped with patterned etch resistance layer 52 and patterned etch resistance layer 54.Patterned etch resistance layer 52,54 shown in the figure is the photoresist layer that is similar to patterned etch resistance layer 16.Patterned etch resistance layer 52 is provided with the pattern that alternative exposes conductive layer 50 to the open air, and patterned etch resistance layer 54 then is provided with the pattern that alternative exposes pedestal 26 to the open air.
In structure shown in Figure 22, conductive layer 36,50 is removed its selected part forming patterned etch resistance layer 52 defined patterns by etching, and it is selected partly to form patterned etch resistance layer 54 defined patterns and pedestal 26 has also been removed by etching.Described etching is two-sided wet chemical etch, and it is with to be applied to metallic plate similar.For example, utilize a top jet nozzle (figure do not show) and a bottom nozzle (figure does not show) that chemical etching liquor is sprayed on the end face and the bottom surface of structure respectively, perhaps structure is immersed in the chemical etching liquor.Chemical etching liquor can lose conductive layer 36,50 exposing adhesion layer 28 and dielectric layer 38, thereby patternless conductive layer 36,50 changes patterned layer into originally.Chemical etching liquor also loses pedestal 26 to expose adhesion layer 28.
In Figure 23, the pattern etched resistance layer 52,54 on the structure is all removed.The mode of removing patterned etch resistance layer 52,54 can be identical with the mode of the etchant resistive layer 18 of removing patterned etch resistance layer 16, covering comprehensively.
Etched conductive layer 36,50 comprises weld pad 56 and route line 58, and etched conductive layer 50 then comprises lid 60.Weld pad 56 is that conductive layer 36,50 is subjected to 52 protections of patterned etch resistance layer and not etched part with route line 58, and 60 of lids are subjected to the not etched part of patterned etch resistance layer 52 protections for conductive layer 50.Thus, conductive layer 36,50 just becomes patterned layer, and it comprises weld pad 56 with route line 58 but do not comprise lid 60.In addition, route line 58 is a copper conductor, and its contact dielectric layer 38 also extends its top, simultaneously adjacency and electric connection signal projection 24 and weld pad 56.
Pedestal 26 after the etching comprises pedestal 26 (only surplus its middle body) and terminal 62.Pedestal 26 is that former pedestal 26 is subjected to patterned etch resistance layer 54 protection and not etched part, and it is along extending laterally and exceeding outside the heat conduction projection 22 1000 microns in side surface direction.Terminal 62 is that former pedestal 26 is subjected to 54 protections of patterned etch resistance layer and not etched part; it is in abutting connection with signal projection 24; extend signal projection 24 belows, and extend laterally, contact adhesion layer 28 simultaneously and extend adhesion layer 28 belows from signal projection 24.Pedestal 26 still is a pattern-free layer, comprises terminal 62 and keeps the patterned layer of lateral spacings with pedestal 26 but then form one outside pedestal 26 peripheries.Therefore, terminal 62 is separated from one another with pedestal 26, and the part of the non-pedestal 26 of terminal 62.In addition, signal projection 24 forms in abutting connection with route line 58 and terminal 62 and at route line 58 and 62 of terminals and electrically connects.
Signal projection 24, weld pad 56, route line 58 and the terminal 62 common leads 64 that form.Signal projection 24 and route line 58 are conductive paths of 62 of weld pad 56 and terminals.Lead 64 provides from weld pad 56 to terminal vertical (from top to bottom) route of 62.Lead 64 is not limited to this configuration.For example, above-mentioned conductive path can comprise the conductive hole that runs through dielectric layer 38, extra route line (it is positioned at the top and/or the below of dielectric layer 38) and passive device (as be arranged on other weld pads resistance and electric capacity).
Radiating seat 66 comprises heat conduction projection 22, pedestal 26 and lid 60.Heat conduction projection 22 is integrally formed with pedestal 26.Lid 60 is positioned at the over top of heat conduction projection 22, in abutting connection with the top of heat conduction projection 22, covers the top of heat conduction projection 22 simultaneously from the top, and extends laterally by the top of heat conduction projection 22 is past.After lid 60 was set, heat conduction projection 22 was the middle sections that are seated in lid 60 circumference.Lid 60 also contacts and covers from the top part of its below adhesion layer 28, and this part of adhesion layer 28 is and heat conduction projection 22 coplines, in abutting connection with heat conduction projection 22, and flanked heat conduction projection 22.
Radiating seat 66 is essentially the radiating block of an inverted T-shaped, and it comprises post portion (heat conduction projection 22), alar part (part that pedestal 26 extends laterally from post portion) and a heat conductive pad (lid 60).
The structure of Figure 24 is provided with anti-welding green lacquer 68 on adhesion layer 28, dielectric layer 38, conductive layer 50 and lid 60, and is provided with anti-welding green lacquer 70 on pedestal 26, adhesion layer 28 and terminal 62.
Anti-welding green lacquer 68 is an electrical insulation layer, and it can form pattern according to our selection exposing weld pad 56 and lid 60 to the open air, and covers route line 58, the exposed parts of adhesion layer 28 and the exposed parts of dielectric layer 38 from the top.The thickness of anti-welding green lacquer 68 above weld pad 56 and lid 60 is 25 microns, and anti-welding green lacquer 68 extends 55 microns (30+25) above dielectric layer 38.
Anti-welding green lacquer 70 is an electrical insulation layer, and it can form pattern according to our selection exposing pedestal 26 and terminal 62 to the open air, and covers the exposed parts of adhesion layer 28 from the below.The thickness of anti-welding green lacquer 70 below pedestal 26 and terminal 62 is 25 microns, and anti-welding green lacquer 70 extends 55 microns (30+25) below adhesion layer 28.
Anti-welding green lacquer 68,70 is originally for coating the smooth video picture type liquid resin on the structure.On anti-welding green lacquer 68,70, form pattern more afterwards, its practice is to make the light selectivity by light shield (figure does not show), make the anti-welding green lacquer of the part that is subjected to light become and to dissolve, utilize a developing solution to remove then and be not subjected to light and the anti-welding green lacquer of still soluble part, carry out roastingly firmly at last again, above step is existing skill.
The pedestal 26 of structure shown in Figure 25, weld pad 56, lid 60 are provided with lining contact 72 with terminal 62.
Lining contact 72 is a multiple layer metal coating, and its contact pedestal 26 covers the part that it exposes with terminal 62 and from the below, and contact pad 56 covers the part that it exposes with lid 60 and from the top simultaneously.For example, one nickel dam is to be located on pedestal 26, weld pad 56, lid 60 and the terminal 62 in the mode of electroless plating lining, then again a gold medal layer is located on this nickel dam in the mode of electroless plating lining, wherein the interior nickel bed thickness is about 3 microns, about 0.5 micron of the golden bed thickness in surface is so the thickness of lining contact 72 is about 3.5 microns.
Have several advantages as pedestal 26, weld pad 56, lid 60 with the surface treatment of terminal 62 with lining contact 72.Inner nickel dam provides main mechanicalness and electric connection and/or hot link, and surface gold layer then provides a wettable surface in order to the scolder reflow.Lining contact 72 also protects pedestal 26, weld pad 56, lid 60 not to be corroded with terminal 62.Lining contact 72 can comprise various metals to meet the outside needs that connect media.For example, one overlayed on silver layer on the nickel dam can arrange in pairs or groups scolding tin or routing.
For ease of explanation, the pedestal 26, weld pad 56, the lid 60 that are provided with lining contact 72 all show in simple layer body mode with terminal 62.The boundary line (figure does not show) that lining contact 72 and pedestal 26, weld pad 56, lid 60 and terminal are 62 is copper/nickel interface.
So far finish the making of heat-conducting plate 74.
Figure 26,27 and Figure 28 be respectively profile, vertical view and the upward view of heat-conducting plate 74, the edge of heat-conducting plate 74 separates with bracing frame and/or with series-produced adjacent heat-conducting plate along line of cut among the figure.
Heat-conducting plate 74 comprises adhesion layer 28, substrate 34, lead 64, radiating seat 66 and anti-welding green lacquer 68,70.Substrate 34 comprises dielectric layer 38.Lead 64 comprises signal projection 24, weld pad 56, route line 58 and terminal 62.Radiating seat 66 comprises heat conduction projection 22, pedestal 26 and lid 60.
After heat conduction projection 22 extends through opening 30 and enters through hole 40, still be positioned at the middle position of opening 30 and through hole 40.The top of heat conduction projection 22 is adjacent part coplines that are positioned at dielectric layer 38 tops with adhesion layer 28, and then it contacts an adjacent part copline of pedestal 26 with adhesion layer 28 in the bottom of heat conduction projection 22.Heat conduction projection 22 keeps flat-tops awl cylindricalitys, and its convergent sidewall makes its diameter, and 60 smooth dome upwards successively decreases towards heat conduction projection 22 in abutting connection with lid from pedestal 26.
After signal projection 24 extends through opening 32 and enters through hole 42, still be positioned at the middle position of opening 32 and through hole 42.The top of signal projection 24 is adjacent part coplines that are positioned at dielectric layer 38 tops with adhesion layer 28, the bottom of signal projection 24 then with an adjacent part copline of adhesion layer 28 its contact terminals 62.Signal projection 24 keeps flat-top awl cylindricality, and its convergent sidewall makes its diameter upwards successively decrease from the smooth dome of terminal 62 towards signal projection 24 in abutting connection with route line 58.
Pedestal 26 covers heat conduction projection 22 and lid 60 from the below, and keeps at a distance with the peripheral edge of heat-conducting plate 74.
Lid 60 is positioned at heat conduction projection 22 tops, with it in abutting connection with also being hot link.Lid 60 covers the top of heat conduction projection 22 simultaneously from the top, and extends laterally from edge, heat conduction projection 22 tops.Also from the part of top contact and covering adhesion layer 28, this part of adhesion layer 28 is in abutting connection with heat conduction projection 22 to lid 60, and with heat conduction projection 22 coplines, and lateral rings is around heat conduction projection 22.Lid 60 also with weld pad 56 coplines.
Adhesion layer 28 is to be arranged on the pedestal 26 and side's extension thereon.Adhesion layer 28 contacts in breach 44 and between 38 of heat conduction projection 22 and dielectric layers, and fills up the space of 38 of heat conduction projection 22 and dielectric layers.Adhesion layer 28 contacts in breach 46 and between 38 of signal projection 24 and dielectric layers, and fills up the space of 38 of signal projection 24 and dielectric layers.Adhesion layer 28 is then contact and between 38 of pedestal 26 and dielectric layers outside breach 44,46, and fills up the space of 38 of pedestal 26 and dielectric layers.Adhesion layer 28 is to extend laterally and cross terminal 62 from heat conduction projection 22, is overlapped in terminal 62, and covers pedestal 26 from the top and be positioned at part heat conduction projection 22 peripheries outside, covers and around heat conduction projection 22 and signal projection 24 along side surface direction simultaneously.Adhesion layer 28 also fills up most spaces of 66 of substrate 34 and radiating seats.This moment, adhesion layer 28 solidified.
Substrate 34 is to be arranged on the adhesion layer 28 and contact with it.In addition, substrate 34 is stretched in the top of its below adhesion layer 28, and extends pedestal 26 tops.Conductive layer 36 (and weld pad 56 and route line 58) contacts dielectric layer 38 and extends its top, and dielectric layer 38 then contacts and between 36 of adhesion layer 28 and conductive layers.
Heat conduction projection 22 and signal projection 24 have same thickness and copline each other.Pedestal 26 and terminal 62 have same thickness and copline each other.In addition, the top of heat conduction projection 22, signal projection 24 and bottom all with adhesion layer 28 coplines.
Heat conduction projection 22, signal projection 24, pedestal 26, lid 60 and terminal 62 are all kept at a distance with substrate 34.Therefore, substrate 34 and radiating seat 66 are that mechanicalness is connected and electrical isolation each other.
After cutting, its adhesion layer 28, dielectric layer 38 and anti-welding green lacquer 68,70 all extend to and cut the vertical edge that forms with batch heat-conducting plate of making 74.
Weld pad 56 is one to aim at the electrical interface of semiconductor device custom-made by size such as LED packaging body or semiconductor chip, and this semiconductor device will be arranged in successive process on the lid 60.Terminal 62 is one to aim at down the electrical interface of one deck group body (but for example from sealing wire of a printed circuit board (PCB)) custom-made by size.Lid 60 is one to aim at the hot interface of this semiconductor device custom-made by size.Pedestal 26 is one to aim at down the hot interface of one deck group body (heat abstractor of a for example aforementioned printed circuit board (PCB) or an electronic equipment) custom-made by size.In addition, lid 60 is to be thermally coupled to pedestal 26 via heat conduction projection 22.
Weld pad 56 and terminal 62 dislocation each other in vertical direction, and expose to the end face and the bottom surface of heat-conducting plate 74 respectively provide the vertical route between this semiconductor device and following one deck group body whereby.
Both end faces of weld pad 56 and lid 60 are copline in dielectric layer 38 tops, and both bottom surfaces of pedestal 26 and terminal 62 are copline in adhesion layer 28 belows then.
For ease of explanation, lead 64 is that to illustrate be a continuous circuits trace in profile.Yet lead 64 provides the horizontal signal route of X and Y direction usually simultaneously, that is to say that weld pad 56 and terminal 62 form the side direction dislocation at X and Y direction each other, and route line 58 constitutes the path of X and Y direction.
Radiating seat 66 can diffuse to following one deck group body that heat-conducting plate 74 is connected with the heat energy that semiconductor device produced that is arranged at subsequently on the lid 60.The heat energy that this semiconductor device produces flows into lid 60, enters heat conduction projection 22 from lid 60, and enters pedestal 26 via heat conduction projection 22.Heat energy sheds along this downward direction from pedestal 26, for example diffuses to a below heat abstractor.
The heat conduction projection 22 of heat-conducting plate 74, signal projection 24 all do not expose with route line 58, and wherein heat conduction projection 22 is covered by lid 60, and signal projection 24 and route line 58 are to be covered by anti-welding green lacquer 68, and then the while is covered by anti-welding green lacquer 68,70 adhesion layer 28.For ease of explanation, Figure 27 illustrates heat conduction projection 22, signal projection 24, adhesion layer 28 and route line 58 with dotted line.
Heat-conducting plate 74 also comprises other leads 64, and these leads 64 are made of with terminal 62 signal projection 24, weld pad 56, route line 58.For ease of explanation, illustrate and illustrate plain conductor 64 at this.In lead 64, signal projection 24, weld pad 56 and terminal 62 are of similar shape and size usually, and route line 58 then adopts different route configurations usually.For example, part lead 64 is provided with spacing, and is separated from one another, and is electrical isolation, part lead 64 then interlaced with each other or lead same weld pad 56, route line 58 or terminal 62 and be electrically connected to each other.Similarly, part of solder pads 56 can be in order to receive independent signal, and part of solder pads 56 is then shared a signal, power supply or earth terminal.
Heat-conducting plate 74 is applicable to the LED packaging body with indigo plant, green and red LED chips, and wherein each led chip comprises an anode and a negative electrode, and each LED packaging body comprises corresponding anode terminal and cathode terminal.In this example, heat-conducting plate 74 can comprise six weld pads 56 and four terminals 62, so as with each anode from an independent soldering pad 56 guiding one independent terminals 62, and with each negative electrode from the common earth terminal 62 of an independent soldering pad 56 guiding one.
All can utilize a simple and easy cleaning to remove oxide and residue on the exposed metal in each fabrication stage, for example can implement an of short duration oxygen electricity slurry cleaning this case structure.Perhaps, can utilize a potassinm permanganate solution that this case structure is carried out an of short duration wet chemistry cleaning.Similarly, also can utilize distilled water drip washing this case structure to remove dirt.This cleaning can clean required surface and structure do not caused tangible influence or destruction.
The advantage of this case is not need therefrom to separate or be partitioned into confluence or associated circuitry after lead 64 forms.The confluence can be separated in the wet chemical etch step that forms weld pad 56, route line 58, lid 60 and terminal 62.
Heat-conducting plate 74 can comprise and bores saturating or cut logical adhesion layer 28, substrate 34 with anti-welding green lacquer 68,70 and the registration holes that forms (figure does not show).Thus, when heat-conducting plate 74 needs be arranged at a below carrier in successive process, just the instrument pin can be inserted in the registration holes, so as to heat-conducting plate 74 location.
Heat-conducting plate 74 can omit lid 60.Desire to reach this purpose, can adjust patterned etch resistance layer 52, the conductive layer 50 of whole through hole 40 tops all is exposed in order in the chemical etching liquor that forms weld pad 56 and route line 58.Another practice of omitting lid 60 is not establish conductive layer 50.
Heat-conducting plate 74 can hold a plurality of semiconductor device but not only hold single semiconductor device.Desire to reach this purpose, can adjust patterned etch resistance layer 16 with more heat conduction projections 22 of definition and signal projection 24, adjust adhesion layer 28 and open 30,32 more to comprise, adjust substrate 34 to comprise more multi-through hole 40,42, adjust patterned etch resistance layer 52 with the more weld pads 56 of definition, route line 58 and lid 60, and adjust anti-welding green lacquer 68 to comprise more openings.Device beyond the terminal 62 can change lateral position so that provide a 2x2 array for four semiconductor device.In addition, part but the section shape of non-all devices and height (being side view) also can be adjusted to some extent.For example, weld pad 56, lid 60 can keep identical side view with terminal 62, and route line 58 then has different route configurations.
Figure 29,30 and Figure 31 be respectively profile, vertical view and the upward view of a heat-conducting plate 76 in one embodiment of the invention, this heat-conducting plate 76 is provided with a lead 64 on its adhesion layer 28.
Present embodiment omits dielectric layer 38, and lead 64 is to contact with adhesion layer 28.For asking simple and clear, the related description of all heat-conducting plates 74 is applicable to that this embodiment person all incorporates into herein, and identical explanation will not repeat.Similarly, the similar person of device of the device of present embodiment heat-conducting plate 76 and heat-conducting plate 74 all adopts the corresponding reference label.
Heat-conducting plate 76 comprises adhesion layer 28, lead 64, radiating seat 66 and anti-welding green lacquer 68,70.Lead 64 comprises signal projection 24, weld pad 56, route line 58 and terminal 62.Radiating seat 66 comprises heat conduction projection 22, pedestal 26 and lid 60.
The conductive layer 36 more last embodiment of present embodiment are thick.For example, the thickness of conductive layer 36 increases to 130 microns by 30 microns among the last embodiment, and thus, conductive layer 36 just is unlikely to when moving bending and rocks.Therefore weld pad 56 also increases with the thickness of route line 58, and weld pad 56 all contacts and be overlapped in adhesion layer 28 with route line 58.Heat-conducting plate 76 there is no the dielectric layer corresponding to dielectric layer 38.
The production method of heat-conducting plate 76 and heat-conducting plate 74 are similar, but must suitably adjust with conductive layer 36 at heat conduction projection 22, signal projection 24.For example the thickness with metallic plate 10 changes 280 microns into by 330 microns, so that the height of heat conduction projection 22, signal projection 24 is reduced to 250 microns by 300 microns.Shorten etching period and can reach this purpose.According to previously described mode, adhesion layer 28 is arranged on the pedestal 26 then, again conductive layer 36 is separately set on the adhesion layer 28; To adhesion layer 28 heating and pressurization, adhesion layer 28 is flowed and curing; Then make the end face of structure become the plane, again conductive layer 50 is deposited on this end face with lapping mode.Etching conductive layer 36,50 is to form weld pad 56 and route line 58 then, etching conductive layer 50 is to form lid 60, etching pedestal 26 is to form terminal 62, again anti-welding green lacquer 68 is arranged at this end face and exposes weld pad 56 and lid 60 to the open air with selectivity, and the bottom surface that anti-welding green lacquer 70 is arranged at structure exposes pedestal 26 and terminal 62 to the open air with selectivity, carries out surface treatment at pedestal 26, weld pad 56, lid 60 with terminal 62 with lining contact 72 more at last.
Figure 32,33 and Figure 34 be respectively profile, vertical view and the upward view of semiconductor chipset body 100 in one embodiment of the invention, this semiconductor chip group body 100 comprises the LED packaging body 102 that a heat-conducting plate 74 and has back contact.
Semiconductor chip group body 100 comprises heat-conducting plate 74, LED packaging body 102 and scolding tin 104,106.LED packaging body 102 comprises led chip 108, pedestal 110, routing 112, electric contact 114, hot junction 116 and transparent encapsulation material 118.One electrode of led chip 108 (figure do not show) is to be electrically connected to a conductive hole (figure does not show) in the pedestal 110 via routing 112, so as to led chip 108 is electrically connected to electric contact 114.Led chip 108 is to be arranged on the pedestal 110 by a solid brilliant material (figure does not show), makes led chip 108 hot links and mechanicalness attach to pedestal 110, whereby led chip 108 is thermally coupled to hot junction 116.Pedestal 110 is one to have the ceramic block of low electric conductivity and high-termal conductivity, and electric contact 114, hot junction 116 are to be coated on pedestal 110 backs and from the downward projection in pedestal 110 backs.
LED packaging body 102 is to be arranged on substrate 34 and the radiating seat 66, is electrically connected to substrate 34, and is thermally coupled to radiating seat 66.Know clearly it, LED packaging body 102 is to be arranged on weld pad 56 and the lid 60, is overlapped in heat conduction projection 22, and is electrically connected to substrate 34 via scolding tin 104, and be thermally coupled to radiating seat 66 via scolding tin 106.For example, scolding tin 104 contacts and between weld pad 56 and electric contact 114, electrically connects simultaneously and mechanicalness bonding weld pad 56 and electric contact 114, whereby led chip 108 is electrically connected to terminal 62.Similarly, scolding tin 106 contact and between lid 60 and hot junction 116, hot link simultaneously and mechanicalness are binded lid 60 and hot junction 116, whereby led chip 108 are thermally coupled to pedestal 26.The coated metal connection pad that weld pad 56 is provided with nickel/gold is in order to firmly combining with scolding tin 104, and the shape of weld pad 56 and size all cooperate electric contact 114, improves the signal conduction from substrate 34 to LED packaging bodies 102 whereby.Similarly, the coated metal connection pad that lid 60 is provided with nickel/gold is in order to firmly combining with scolding tin 106, and the shape of lid 60 and size all cooperate hot junction 116, improves the heat transmission to radiating seat 66 from LED packaging body 102 whereby.Then and need not cooperate hot junction 116 yet and design as for the shape of heat conduction projection 22 and size.
Transparent encapsulation material 118 is a solid-state protectiveness plastic overmold body that is electrically insulated, and it can be led chip 108 and routing 112 provides such as environmental protection such as the wet and anti-particulates of moisture resistance.Led chip 108 is to be embedded in the transparent encapsulation material 118 with routing 112.
If desire is made semiconductor chip group body 100, can with a solder deposition on weld pad 56 and lid 60, contact 114 and 116 be positioned over respectively on the scolder of weld pad 56 and lid 60 tops then, make this scolder reflow to form scolding tin 104,106 then then.
For example, the mode with screen painting is printed in the tin cream selectivity on weld pad 56 and the lid 60 earlier, then utilizes an extracting head LED packaging body 102 to be positioned on the heat-conducting plate 74 in the mode that stepping repeats with an automation pattern identification system.The extracting head of reflow machine is positioned over electric contact 114, hot junction 116 respectively on the tin cream of weld pad 56 and lid 60 tops.Then heat tin cream, make it, remove thermal source then, wait for tin cream cooling and curing quietly to form sclerosis scolding tin 104,106 with relatively low temperature (as 190 ℃) reflow.Perhaps, can on weld pad 56 and lid 60, place the tin ball, then electric contact 114, hot junction 116 are positioned over respectively on the tin ball of weld pad 56 and lid 60 tops, then heat the tin ball and make its reflow to form scolding tin 104,106 then.
Originally scolder can be deposited on heat-conducting plate 74 or the LED packaging body 102 via lining or printing or placement technique, is located at 102 of heat-conducting plate 74 and LED packaging bodies, and makes its reflow.Scolder also can place on the terminal 62 for one deck group body use down.In addition, can utilize a conduction adhesive agent (for example fill with silver epoxy resin) or other to connect media and replace scolder, and weld pad 56, lid 60 needn't be identical with connection media on the terminal 62.
This semiconductor chip group body 100 is a second level monocrystalline module.
Figure 35,36 and Figure 37 be respectively profile, vertical view and the upward view of semiconductor chipset body 200 in one embodiment of the invention, wherein this semiconductor chip group body 200 comprises the LED packaging body 202 that a heat-conducting plate 74 and has the side pin.
In this embodiment, this LED packaging body 202 has the side pin and does not have back contact.For asking simple and clear, the related description of all semiconductor chip group bodies 100 is applicable to that this embodiment person all incorporates into herein, and identical explanation will not repeat.Similarly, the device of present embodiment group body and the similar person of device who organizes body 100 all adopt the corresponding reference label, but the radix of its coding change 200 into by 100.For example, led chip 208 is corresponding to led chip 108, and pedestal 210 is then corresponding to pedestal 110, by that analogy.
Semiconductor chip group body 200 comprises heat-conducting plate 74, LED packaging body 202 and scolding tin 204,206.LED packaging body 202 comprises led chip 208, pedestal 210, routing 212, pin 214 and transparent encapsulation material 218.Led chip 208 is to be electrically connected to pin 214 via routing 212.Pedestal 210 back sides comprise thermo-contact surface 216, and in addition, pedestal 210 is to be narrower than pedestal 110 and to have identical lateral dimensions and shape with hot junction 116.Led chip 208 is to be arranged on the pedestal 210 via a solid brilliant material (figure does not show), makes led chip 208 hot links and mechanicalness attach to pedestal 210, whereby led chip 208 is thermally coupled to thermo-contact surface 216.Toward extending laterally, thermo-contact surface 216 then faces down pin 214 from pedestal 210.
LED packaging body 202 is to be arranged on substrate 34 and the radiating seat 66, is electrically connected to substrate 34, and is thermally coupled to radiating seat 66.Know clearly it, LED packaging body 202 is to be arranged on weld pad 56 and the lid 60, is overlapped in heat conduction projection 22, and is electrically connected to substrate 34 via scolding tin 204, and be thermally coupled to radiating seat 66 via scolding tin 206.For example, scolding tin 204 contacts and between weld pad 56 and pin 214, electrically connects simultaneously and mechanicalness bonding weld pad 56 and pin 214, whereby led chip 208 is electrically connected to terminal 62.Similarly, scolding tin 206 contact and between lid 60 and thermo-contact surface 216, hot link simultaneously and mechanicalness are binded lid 60 and thermo-contact surface 216, whereby led chip 208 are thermally coupled to pedestal 26.
If desire is made semiconductor chip group body 200, one scolder can be placed on weld pad 56 and the lid 60, on the scolder above weld pad 56 and the lid 60, place pin 214 and thermo-contact surface 216 then respectively, make this scolder reflow then to form scolding tin 204,206 then.
This semiconductor chip group body 200 is a second level monocrystalline module.
Figure 38,39 and Figure 40 be respectively profile, vertical view and the upward view of semiconductor chipset body 300 in one embodiment of the invention, wherein this semiconductor chip group body 300 comprises a heat-conducting plate 74 and semiconductor chip 302.
In this embodiment, this semiconductor device is a chip but not a packaging body, and this chip 302 is to be arranged at aforementioned radiating seat 66 but not on the aforesaid base plate 34.In addition, this chip 302 is to be overlapped in aforementioned heat conduction projection 22 but not aforesaid base plate 34, and this chip 302 is to be electrically connected to aforementioned weld pad 56 via a routing 304, and utilizes a solid brilliant material 306 to be thermally coupled to aforementioned lid 60.
Semiconductor chip group body 300 comprises heat-conducting plate 74, chip 302, routing 304, solid brilliant material 306 and encapsulating material 308.Chip 302 comprises end face 310, bottom surface 312 and routing connection pad 314.End face 310 is for active surface and comprise routing connection pad 314, and bottom surface 312 then is the thermo-contact surface.
Chip 302 is to be arranged on the radiating seat 66, is electrically connected to substrate 34, and is thermally coupled to radiating seat 66.Detailed it, chip 302 is to be arranged on the lid 60, is positioned at the periphery of lid 60, is overlapped in heat conduction projection 22 but underlapped in substrate 34.In addition, chip 302 is to be electrically connected to substrate 34 via routing 304, attaches to radiating seat 66 via solid brilliant material 306 hot links and mechanicalness simultaneously.For example, routing 304 is to be connected in and to electrically connect weld pad 56 and routing connection pad 314, whereby chip 302 is electrically connected to terminal 62.Similarly, Gu brilliant material 306 contacts and between lid 60 and thermo-contact surface 312, hot link simultaneously and mechanicalness are binded lid 60 and thermo-contact surface 312, whereby chip 302 are thermally coupled to pedestal 26.The coated metal connection pad that weld pad 56 is provided with nickel/silver in order to routing 304 firm engagement, improve whereby that the signal to chip 302 transmits from substrate 34.In addition, the shape of lid 60 and size are to join suitablely with thermo-contact surface 312, improve from chip 302 heat to radiating seat 66 whereby and transmit.Then not and also need not cooperate thermo-contact surface 312 and design as for the shape of heat conduction projection 22 and size.
Encapsulating material 308 is a solid-state protectiveness plastic overmold body that is electrically insulated, and it can be chip 302 and routing 304 provides environmental protection such as the wet and anti-particulate of moisture resistance.Chip 302 is to be embedded in the encapsulating material 308 with routing 304.In addition, if chip 302 is the optical chips such as LED, then encapsulating material 308 can be transparence.Encapsulating material 308 is transparence in Figure 39 be for conveniently illustrating.
If desire is made semiconductor chip group body 300, can utilize solid brilliant material 306 that chip 302 is arranged on the lid 60, then weld pad 56 and routing connection pad 314 are engaged with routing, then form encapsulating material 308.
For example, Gu brilliant material 306 was one to have the argentiferous epoxy paste of high-termal conductivity originally, and be printed on the lid 60 with the mode selectivity of screen painting.Utilize an extracting head and an automation pattern identification system chip 302 to be positioned on this epoxy resin silver paste then in the mode that stepping repeats.Then heat this epoxy resin silver paste, it is being hardened to finish solid crystalline substance under low temperature (as 190 ℃) relatively.Routing 304 is a gold thread, and it connects weld pad 56 and routing connection pad 314 with hot ultrasonic waves immediately.At last again with encapsulating material 308 transfer mouldings on structure.
Chip 302 can be electrically connected to weld pad 56 by multiple connection media, utilizes multiple hot adhesive agent hot link and mechanicalness to attach to radiating seat 66, and with multiple encapsulating material encapsulation.
This semiconductor chip group body 300 is a first order monocrystalline packaging body.
Above-mentioned semiconductor chip group body and heat-conducting plate only are illustrative example, and the present invention can realize by other various embodiments.In addition, the foregoing description can be according to the consideration of design and reliability, and the collocation that is mixed with each other is used or used with other embodiment mix and match.For example, this substrate can comprise many arrays individual layer lead and many arrayed multilayers lead.This heat-conducting plate can comprise a plurality of projections, and these projections are to line up an array to use for a plurality of semiconductor device, and in addition, this heat-conducting plate can comprise more leads for cooperating extra semiconductor device.Similarly, this semiconductor device can be a LED packaging body with many pieces of led chips, and this heat-conducting plate then can comprise more leads to cooperate extra led chip.This semiconductor device and this lid can be overlapped in this substrate, and cover this heat conduction projection from the top.
This semiconductor device can use this radiating seat alone or share this radiating seat with other semiconductor device.For example, single semiconductor device can be arranged on this radiating seat, or a plurality of semiconductor device are arranged on this radiating seat.For example, four pieces of small chips that are arranged in the 2x2 array can be attached to this heat conduction projection, this substrate then can comprise extra lead to cooperate the electric connection of these chips.This practice has more economic benefit far beyond a small heat conduction projection is set for each chip.
This semiconductor chip can be optical or non-optical property.For example, this chip can be a LED, a solar cell, a microprocessor, a controller or a radio frequency (RF) power amplifier.Similarly, this semiconductor package body can be a LED packaging body or a radio-frequency module.Therefore, this semiconductor device can be optics or the non-optical chip once encapsulation or un-encapsulated.In addition, we can utilize multiple connection media that this semiconductor device mechanicalness is connected, electrically connects and be thermally coupled to this heat-conducting plate, comprise utilizing welding and using modes such as conduction and/or heat conduction adhesive agent to reach.
This radiating seat can rapidly, effectively and evenly be distributed to down one deck group body with the heat energy that this semiconductor device produced and need not make type of thermal communication cross the elsewhere of this adhesion layer, this substrate or this heat-conducting plate.Just can use the lower adhesion layer of thermal conductivity thus, and then significantly reduce cost.This radiating seat can comprise integrally formed heat conduction projection and pedestal, and is connected and a hot linked lid for metallurgical with this heat conduction projection, improves reliability whereby and reduces cost.This lid can with this weld pad copline so as to form electrically with this semiconductor device, heat energy and mechanicalness be connected.In addition, this lid can be complied with this semiconductor device custom-made by size, and this pedestal then can be strengthened from this semiconductor device to the hot link of one deck group body down whereby according to one deck group scale of construction body is tailor-made down.For example, this heat conduction projection can be rounded on a lateral plane, and this lid can be square or rectangle on a lateral plane, and the side view of the side view of this lid and this semiconductor device hot junction is same or similar.
This radiating seat can be electric connection or electrical isolation with this semiconductor device and this substrate.For example, lip-deep this second conductive layer that is positioned at after the grinding can comprise a route line, and this route line is to extend through this adhesion layer between this substrate and this lid, so as to this semiconductor device is electrically connected to this radiating seat.Afterwards, this radiating seat is ground connection electrically, so as to the electrical ground connection of this semiconductor device.
That this radiating seat can be is copper, aluminium matter, copper/nickel/aluminium alloy or other heat-conducting metal structures.
This heat conduction projection can be deposited on this pedestal or be integrally formed with this pedestal.This heat conduction projection can be integrally formed with this pedestal, thereby become single metallic object (as copper or aluminium).This heat conduction projection also can be integrally formed with this pedestal, makes this both interface comprise single metallic object (for example copper), then comprises other metals (for example the top of projection is scolder, and the bottom of projection and pedestal then are copper) as for the elsewhere.This heat conduction projection also can be integrally formed with this pedestal, makes this both interface comprise the single metallic object of multilayer (for example be provided with a nickel resilient coating outside an aluminium core, then be provided with a bronze medal layer on this nickel resilient coating).
This signal projection can be deposited on this terminal or be integrally formed with this terminal.This signal projection can be integrally formed with this terminal, thereby become single metallic object (as copper or aluminium).This signal projection also can be integrally formed with this terminal, makes this both interface comprise single metallic object (for example copper), then comprises other metals (for example the top of projection is scolder, and the bottom of projection and terminal then are copper) as for the elsewhere.This signal projection also can be integrally formed with this terminal, makes this both interface comprise the single metallic object of multilayer (for example be provided with a nickel resilient coating outside an aluminium core, then be provided with a bronze medal layer on this nickel resilient coating).
This heat conduction projection can comprise a smooth end face, and this end face is and this adhesion layer copline.For example, this heat conduction projection can with this adhesion layer copline, perhaps this heat conduction projection can be accepted etching after this adhesion layer solidifies, thereby the adhesion layer above this heat conduction projection forms a depression.Our this heat conduction projection of also alternative etching is so as to forming a depression that extends to below its end face in this heat conduction projection.Under above-mentioned arbitrary situation, this semiconductor device all can be arranged on this heat conduction projection and be arranged in this depression, and this routing then can this semiconductor device in this depression extends to this weld pad outside this depression.In the case, this semiconductor device can be a led chip, and by this depression with LED light towards this direction focusing that makes progress.
This pedestal can be this substrate mechanical support is provided.For example, this pedestal can prevent the flexural deformation in the process of metal grinding, chip setting, routing joint and mold encapsulant of this substrate.In addition, the back of this pedestal can comprise along the fin of this downward direction projection.For example, can utilize bottom surface that a routing machine cuts this pedestal forming lateral grooves, and these lateral grooves are fin.In this example, the thickness of this pedestal can be 500 microns, and the degree of depth of described groove can be 300 microns, that is to say that the height of described fin can be 300 microns.Described fin can increase the surface area of this pedestal, if described fin is to be exposed in the air but not to be arranged on the heat abstractor, then can promote the thermal conductivity of this pedestal via thermal convection.
This lid can be after this adhesion layer solidifies, before this weld pad and/or this terminal form, in or after, make with multiple deposition technique, comprise with technology such as platings, electroless plating lining, evaporation and splash formation single or multiple lift structure.This lid can adopt the metal material identical with this heat conduction projection, or adopts and the identical metal material in heat conduction projection top in abutting connection with this lid.In addition, this lid can be crossed over this through hole and extend to this substrate, or is seated in the periphery of this through hole.Therefore, this lid can contact this substrate or keep at a distance with this substrate.Under above-mentioned arbitrary situation, this lid all is that the top from this heat conduction projection extends laterally along side surface direction.
This adhesion layer can provide firm mechanicalness to be connected between this radiating seat and this substrate.For example, this adhesion layer can extend laterally and cross the peripheral edge that this lead arrives this group body from this heat conduction projection, and this adhesion layer can fill up the space between this radiating seat and this substrate, and this adhesion layer can be one and has the no hole structure of equally distributed joint line.This adhesion layer also can absorb between this radiating seat and this substrate phenomenon that do not match because of thermal expansion produced.In addition, this adhesion layer can be a low-cost dielectric, and need not possess high-termal conductivity.Moreover this adhesion layer is difficult for delamination.
We can adjust the thickness of this adhesion layer, make this adhesion layer essence fill up described breach, and make nearly all adhesive agent all be positioned at structure in curing and/or after grinding.For example, desirable film thickness can be determined by trial and error pricing.Similarly, we also can adjust the thickness of this dielectric layer to reach this effect.
This substrate can be a laminar structure cheaply, and need not possess high-termal conductivity.In addition, this substrate can comprise single conductive layer or most layer conductive layer.Moreover this substrate can comprise this conductive layer or be made up of this conductive layer.
This conductive layer can be separately set on this adhesion layer.For example, can on this conductive layer, form described through hole earlier, then this conductive layer is arranged on this adhesion layer, make this conductive layer contact this adhesion layer, and towards this upward to exposing, meanwhile, described projection then extends into described through hole, and by described through hole towards this upward to exposing.In this example, the thickness of this conductive layer can be 100 to 200 microns, and for example 125 microns, this thickness is enough on the one hand thick, and is then enough thin on the one hand so unlikely bending is rocked during carrying, so do not need over etching can form pattern.
Also this conductive layer and this dielectric layer together can be arranged on this adhesion layer.For example, can earlier this conductive layer be arranged on this dielectric layer, on this conductive layer and this dielectric layer, form described through hole then, then this conductive layer and this dielectric layer are arranged on this adhesion layer, make this conductive layer towards this upward to exposing, and make this dielectric layer contact and between this conductive layer and this adhesion layer, thereby this conductive layer and this adhesion layer separated, meanwhile, described projection then extends into described through hole, and by described through hole towards this upward to exposing.In this example, the thickness of this conductive layer can be 10 to 50 microns, and for example 30 microns, this thickness is enough on the one hand thick, is enough to provide reliable signal conduction, and is then enough thin on the one hand, can reduce weight and cost.In addition, this dielectric layer perseverance is the part of this heat-conducting plate.
Also this conductive layer and a carrier can be arranged on this adhesion layer simultaneously.For example, can utilize a film that this conductive layer is attached to a carrier such as amphiorentation polyethylene terephthalate glued membrane (Mylar) earlier, then only at this conductive layer but not form described through hole on this carrier, then this conductive layer and this carrier are arranged on this adhesion layer, make this carrier cover this conductive layer, and towards this upward to exposing, and make the contact of this film and between this carrier and this conductive layer, then contact and between this film and this adhesion layer as for this conductive layer, meanwhile, described projection is then aimed at described through hole, and is covered from the top by this carrier.This adhesion layer can utilize ultraviolet light to decompose this film after solidifying so that this carrier is divested from this conductive layer, thereby make this conductive layer towards this upward to exposing, just can grind afterwards and this conductive layer of patterning to form this lead.In this example, the thickness of this conductive layer can be 10 to 50 microns, and for example 30 microns, this thickness is enough on the one hand thick, is enough to provide reliable signal conduction, and is then enough thin on the one hand, can reduce weight and cost; Thickness as for this carrier can be 300 to 500 microns, and this thickness is enough on the one hand thick, and is enough thin again on the one hand so unlikely bending is rocked during carrying, helps to reduce weight and cost.This carrier only is a temporary transient fixture, and an impermanent part that belongs to this heat-conducting plate.
Visual this semiconductor device of this weld pad and this terminal adopts multiple packing forms with the needs of following one deck group body.
The end face of this weld pad and the end face of this lid can be copline, just can strengthen the welding between this semiconductor device and this heat-conducting plate by the avalanche degree of control tin ball thus.
This weld pad and this route line that are positioned on this dielectric layer can be made with multiple deposition technique when this substrate or already is not arranged on this adhesion layer as yet, comprise with technology such as plating, electroless plating lining, evaporation and splashes forming the single or multiple lift structure.For example, can when this substrate is not arranged on this adhesion layer as yet or after this substrate attaches to described projection and this pedestal by this adhesion layer, on this substrate, form the pattern of this conductive layer.
Carrying out the surface-treated operation with described lining contact can carry out before or after this weld pad and the formation of this terminal.For example, this coating can be deposited on this pedestal and this second conductive layer, utilizes the patterned etch resistance layer to define this weld pad and this terminal then and carries out etching, so that this coating has pattern.
This lead can comprise extra weld pad, terminal, conductive hole, signal projection, route line and passive device, and can be not isomorphism type.This lead can be used as a signal layer, a power layer or a ground plane, looks closely the purpose of its corresponding semiconductor device weld pad and decides.This lead also can comprise various conducting metals, for example copper, gold, nickel, silver, palladium, tin, its mixture and alloy thereof.Desirable composition had both depended on the outside character that connects media, also depended on the consideration of design and reliability aspect.In addition, those skilled in the art should understand, used copper can be fine copper in this semiconductor chip group body, but normally based on the alloy of copper, as copper-zirconium (99.9% bronze medal), copper-Yin-phosphorus-magnesium (99.7% bronze medal) and copper-Xi-iron-phosphorus (99.7% bronze medal), so as to improving as mechanical performances such as tensile strength and ductility.
In the ordinary course of things, the surface that is preferably in after the aforementioned grinding is provided with this lid, dielectric layer, anti-welding green lacquer, lining contact and second conductive layer, but then can omit it in certain embodiments.For example, the mode of boring produces if this opening and through hole are with punching, thereby the shape at this heat conduction projection top and size are all matched with the thermo-contact surface of this semiconductor device, then can omit this lid and this second conductive layer to reduce cost.Similarly, can omit this dielectric layer to reduce cost.
This heat-conducting plate can comprise a thermal hole, this thermal hole is to keep at a distance with described projection, and outside described opening and described through hole, extend and pass this dielectric layer and this adhesion layer, while adjacency and this pedestal of hot link and this lid, promote the radiating effect to this pedestal whereby, and promote that heat energy spreads in this pedestal from this lid.
The group body of this case can provide level or vertical single or multiple lift signal route.
Lin Wen wait by force the people on November 11st, 2009 file an application the 12/616th, No. 773 U.S. patent application case: " having the radiating seat of projection/pedestal and the semiconductor chip group body of substrate " promptly discloses a kind of structure with horizontal individual layer signal route, wherein weld pad, terminal and route line all are positioned at the dielectric layer top, and the content of this U.S. patent application case is incorporated this paper into by reference at this.
Lin Wen wait by force the people on November 11st, 2009 file an application the 12/616th, No. 775 U.S. patent application case: " having the radiating seat of projection/pedestal and the semiconductor chip group body of lead " then discloses another kind of structure with horizontal individual layer signal route, wherein weld pad, terminal and route line are to be positioned at the adhesion layer top, and this structure is not provided with dielectric layer, and the content of this U.S. patent application case is incorporated this paper into by reference at this.
People such as Wang Jiazhong on September 11st, 2009 file an application the 12/557th, No. 540 U.S. patent application case: " having the radiating seat of projection/pedestal and the semiconductor chip group body of horizontal signal route " discloses a kind of structure with horizontal multilayer signal route, wherein the weld pad of dielectric layer top and terminal are that first and second conductive hole of this dielectric layer is passed in utilization and the route line of this dielectric layer below is reached electric connection, and the content of this U.S. patent application case is incorporated this paper into by reference at this.
People such as Wang Jiazhong on September 11st, 2009 file an application the 12/557th, No. 541 U.S. patent application case: " having the radiating seat of projection/pedestal and the semiconductor chip group body of vertical signal route " then discloses a kind of structure with vertical multilayer signal route, wherein the terminal of the weld pad of dielectric layer top and adhesion layer below is to utilize first conductive hole, route line below this dielectric layer that passes this dielectric layer and second conductive hole that passes this adhesion layer to reach electric connection, and the content of this U.S. patent application case is incorporated this paper into by reference at this.
The operation form of this heat-conducting plate can be single or multiple heat-conducting plate, decides on designing for manufacturing.For example, can make single heat-conducting plate separately.Perhaps, can utilize the anti-welding green lacquer in single metal plate, single adhesion layer, single substrate, the anti-welding green lacquer in single top and the single bottom batch a plurality of heat-conducting plates of manufacturing simultaneously, then row separates again.Similarly, at each heat-conducting plate in same batch, we also can utilize the anti-welding green lacquer in single metal plate, single adhesion layer, single substrate, the anti-welding green lacquer in single top and single bottom batch to make multicomponent simultaneously not for the radiating seat and the lead of single semiconductor device use.
For example, can on a metallic plate, etch many grooves to form this pedestal, a plurality of heat conduction projection and a plurality of signal projection; Then a uncured adhesion layer with opening of corresponding described projection is arranged on this pedestal, so that each projection all extends through a corresponding opening; Then a substrate (it has the through hole of single conductive layer, single dielectric layer and corresponding described projection) is arranged on this adhesion layer, so that each projection all extends through a corresponding opening and enters a pair of through hole of answering; Then utilize and present a theatrical performance as the last item on a programme, force this adhesion layer to enter the breach between described projection and this substrate in the described through hole this pedestal and the closing each other of this substrate; Solidify this adhesion layer then, grind described projection, this adhesion layer and this first conductive layer then to form an end face; Then the lining of second conductive layer is arranged on described projection, this adhesion layer and this first conductive layer; Then this first and second conductive layer of etching is to form the weld pad and the route line of the not corresponding described signal projection of multicomponent, this second conductive layer of etching to be forming the lid of the corresponding described heat conduction projection of a plurality of difference, and this pedestal of etching is with the pedestal that forms the described heat conduction projection of a plurality of correspondences and the terminal of the described signal projection of a plurality of correspondence; Then the anti-welding green lacquer in top is located on the structure, and make the anti-welding green lacquer in this top produce pattern, so as to exposing described weld pad and described lid to the open air, in addition the anti-welding green lacquer in bottom is located on this structure, make the anti-welding green lacquer in this bottom produce pattern, so as to exposing described pedestal and described terminal to the open air; Then described pedestal, described weld pad, described terminal and described lid are carried out surface treatment with the lining contact; At last in the cutting of the appropriate location of described heat-conducting plate peripheral edge or this substrate of splitting, this adhesion layer and described anti-welding green lacquer, so that individual other heat-conducting plate is separated from one another.
The operation form of this semiconductor chip group body can be single group of body or a plurality of groups of bodies, depends on designing for manufacturing.For example, can make single group of body separately.Perhaps, batch a plurality of groups of bodies of manufacturing separate each heat-conducting plate afterwards more one by one simultaneously.Similarly, also a plurality of semiconductor device electric connections, hot link and mechanicalness can be connected to each heat-conducting plate in batch volume production.
For example, a plurality of tin cream parts can be deposited on respectively on a plurality of weld pads and the lid, then a plurality of LED packaging bodies are placed respectively on the described tin cream part, then heat simultaneously described tin cream partly so that its reflow, sclerosis and form a plurality of pads again each heat-conducting plate is separated one by one afterwards.
Be that a plurality of solid brilliant materials are deposited on respectively on a plurality of lids in another example, then many pieces of chips are positioned over respectively on the described solid brilliant material, heat described solid brilliant material afterwards more simultaneously so that its sclerosis and form a plurality of solid brilliant, then described chip routing is engaged to corresponding pad, then form corresponding encapsulating material, again each heat-conducting plate is separated one by one at last at described chip and routing.
We can make each heat-conducting plate separated from one another by one step or multiple tracks step.For example, a plurality of heat-conducting plates batch can be made a flat board, then a plurality of semiconductor device are arranged on this flat board, and then a plurality of semiconductor chip group bodies that should flat board constituted separate one by one.Perhaps, a plurality of heat-conducting plates batch can be made a flat board, a plurality of heat-conducting plate branches that then should flat board constituted are cut to a plurality of heat conduction laths, then a plurality of semiconductor device are arranged at respectively on the described heat conduction lath, a plurality of semiconductor chip group bodies that again each heat conduction lath constituted at last are separated into individuality.In addition, when cutting apart heat-conducting plate, can utilize machine cuts, laser cutting, compartition or other applicable technologies.
In this article, " adjacency " meaning of one's words refers to that device is integrally formed (forming single individuality) or be in contact with one another (each other continuously every or do not separate).For example, this heat conduction projection is in abutting connection with this pedestal, and this adopts when forming this heat conduction projection the method that increases or reduction method irrelevant.
" overlapping " meaning of one's words refers to be positioned at the top and extends the periphery of a below device." overlapping " comprises and extends the inside and outside of this periphery or be seated in this periphery.For example, this semiconductor device is to be overlapped in this heat conduction projection, be to run through this semiconductor device and this heat conduction projection simultaneously because of an imaginary vertical line, be all the device (as this lid) that this imagination vertical line runs through no matter whether have another between this semiconductor device and this heat conduction projection, no matter and also whether have another imaginary vertical line only to run through this semiconductor device and do not run through this heat conduction projection (that is to say be positioned at this heat conduction projection periphery outer).Similarly, this adhesion layer is to be overlapped in this pedestal and overlapping by this weld pad, and this pedestal is then overlapping by this heat conduction projection.Similarly, this heat conduction projection is to be overlapped in this pedestal and to be positioned at its periphery.In addition, " overlapping " and " be positioned at top " synonym, " superimposed " then with " being positioned at the below " synonym.
" contact " meaning of one's words refers to direct contact.For example, this dielectric layer contacts this weld pad but does not contact this heat conduction projection or this pedestal.
" covering " meaning of one's words refers to from the top, covers fully from the below and/or from the side.For example, this pedestal covers this heat conduction projection from the below, but this heat conduction projection does not cover this pedestal from the top.
" layer " word comprises the layer body that is provided with pattern or does not establish pattern.For example, when this substrate was arranged on this adhesion layer, this conductive layer can be a blank patternless flat board on this dielectric layer; And after this semiconductor device was arranged on this radiating seat, this conductive layer can be on this dielectric layer one and has the circuit pattern of lead at interval.In addition, " layer " can comprise most overlapping layers.
" weld pad " one is meant that one is used to be connected and/or engage the join domain of outside connection media (as scolder or routing) when speaking with this lead collocation use, should then this lead can be electrically connected to this semiconductor device by outside connection media.
" terminal " language is meant a join domain when using with this lead collocation, it can contact and/or engage the outside media (as scolder or routing) that connects, and should then this lead can be electrically connected to an external equipment relevant with following one deck group body (for example a printed circuit board (PCB) or a connected lead) by outside connection media.
" lid " one is meant that one is used to be connected and/or engage the contact area of outside connection media (as scolder or heat conduction adhesive agent) when speaking with this radiating seat collocation use, should then this radiating seat can be thermally coupled to this semiconductor device by outside connection media.
" opening " refers to perforated holes together with languages such as " through holes ".For example, when this heat conduction projection inserted this opening of this adhesion layer, this heat conduction projection was that the edge is upward to being exposed to this adhesion layer.Similarly, when this heat conduction projection inserted this through hole of this substrate, this heat conduction projection was that the edge is upward to being exposed to this substrate.
" insertion " meaning of one's words refers to relatively moving between device.For example, " this heat conduction projection is inserted in this through hole " and comprise: this heat conduction projection maintains static and is moved to this pedestal by this substrate; This substrate maintains static and is moved to this substrate by this heat conduction projection; And this heat conduction projection and the closing each other of this substrate.Again for example, " it is interior that this heat conduction projection is inserted (or extending to) this through hole " comprises: this heat conduction projection runs through (penetrate and pass) this through hole; And this heat conduction projection inserts but does not run through (penetrate but do not pass) this through hole.
" closing each other " language also refers to relatively moving between device.For example, " this pedestal and the closing each other of this substrate " comprise: this pedestal maintains static and by this this pedestal of substrate migration; This substrate maintains static and is moved to this substrate by this pedestal; And this pedestal and this substrate are close mutually.
" aligning " meaning of one's words refers to the relative position between device.For example, when this adhesion layer has been arranged on this pedestal, this substrate has been arranged on this adhesion layer, this heat conduction projection has inserted and aimed at this opening, and when this through hole has been aimed at this opening, no matter this heat conduction projection is to insert this through hole or be positioned at below this through hole and with it to keep at a distance, and this heat conduction projection has all been aimed at this through hole.
" be arranged at " one the language comprise with single or multiple supporting device between contact and noncontact.For example, this semiconductor device is to be arranged on this radiating seat, no matter this semiconductor device is this radiating seat of actual contact or is separated by with a solid brilliant material with this radiating seat.Similarly, this semiconductor device is to be arranged on this radiating seat, and though this semiconductor device be only be arranged on this radiating seat or be arranged at this radiating seat simultaneously and this substrate on.
" adhesion layer ... among this breach " meaning of one's words refers to be arranged in this adhesion layer of this breach.For example, " adhesion layer extends across this dielectric layer in this breach " this adhesion layer of meaning in this breach extends across this dielectric layer.Similarly, " adhesion layer is in contact among this breach and between between this heat conduction projection and this dielectric layer " mean that this adhesion layer in this breach contacts and between this dielectric layer of this heat conduction projection of this breach madial wall and this breach lateral wall.
" top " meaning of one's words is pointed to go up and is extended, and comprises adjacency and non-adjacent device and overlapping and non-overlapped device.For example, this heat conduction projection is to extend this pedestal top, simultaneously in abutting connection with, be overlapped in this pedestal and go out from this pedestal projection.Similarly, this heat conduction projection is to extend to this dielectric layer top, even if this heat conduction projection not in abutting connection with or be overlapped in this dielectric layer.
" below " meaning of one's words is pointed to down and is extended, and comprises adjacency and non-adjacent device and overlapping and non-overlapped device.For example, this pedestal is to extend this heat conduction projection below, and is overlapping by this heat conduction projection in abutting connection with this heat conduction projection, and goes out from this heat conduction projection projection.Similarly, this heat conduction projection is to extend this dielectric layer below, even if this heat conduction projection is not in abutting connection with this dielectric layer or overlapping by this dielectric layer.
The vertical direction that so-called " making progress " reaches " downwards " is not the orientation that depends on this semiconductor chip group body (or this heat-conducting plate), and all personages who is familiar with this skill can understand the direction of its actual indication easily.For example, this heat conduction projection be along upward to vertical extent in this pedestal top, this adhesion layer then along the downward direction vertical extent in this weld pad below, whether whether this and this group body be inverted and/or be to be arranged on the heat abstractor to have nothing to do.Similarly, this pedestal is to extend from this heat conduction projection " side direction " along a lateral plane, and whether this and this group body is inverted, rotates or is tilted and have nothing to do.Therefore, should be upwards and downward direction be toward each other and perpendicular to side surface direction, in addition, the device of side direction alignment be one perpendicular to this upwards with the lateral plane of downward direction on copline each other.
Semiconductor chip group body of the present invention has multiple advantages.Plain and the extremely suitable volume production of reliability height, the price of this group body.This group body is particularly useful for easily producing high heat and needs excellent radiating effect can effectively reach the high power semiconductor device of reliable operation, for example LED packaging body, large-scale semiconductor chip and a plurality of small semiconductor device that uses simultaneously (for example many pieces of small semiconductor chips of arranging with array way).
The manufacturing process of this case has the height applicability, and is with electric connection, hot link and the mechanicalness interconnection technique of unique, progressive mode in conjunction with the various maturations of utilization.In addition, the manufacturing process of this case does not need expensive tool to implement.Therefore, this manufacturing process can significantly promote output, yield, usefulness and the cost benefit of existing encapsulation technology.Moreover the group body utmost point of this case is suitable for copper chip and unleaded environmental requirement.
Embodiment described herein is the usefulness for illustration, existing device of this wherein related skill or step or through simplifying or omitting to some extent in order to avoid fuzzy characteristics of the present invention.Similarly, clear for making accompanying drawing, repeat in the accompanying drawing or non-essential device and reference number or omission to some extent.
The personage who is skillful in this skill ought can think and various variation and modification easily at embodiment as herein described.For example, the order of the content of aforesaid material, size, shape, size, step and step is an example all only.Above-mentioned personage can be engaged in these changes, adjustment and impartial skill under the condition that does not break away from spirit of the present invention and scope, scope wherein of the present invention is defined by claims.

Claims (50)

1. semiconductor chip group body, it is characterized in that: this semiconductor chip group body comprises at least:
Semiconductor device;
One adhesion layer, it has first opening and second opening at least;
One radiating seat, it comprises a heat conduction projection and a pedestal at least, wherein this heat conduction projection be in abutting connection with this pedestal and along one upward to extending this pedestal top, this pedestal is to extend this heat conduction projection below to opposite downward direction along one upward with this, and along extending laterally from this heat conduction projection perpendicular to this side surface direction that upwards reaches downward direction; And
One lead, it comprises a weld pad, a terminal and a signal projection at least, and wherein this signal projection is to extend this weld pad below and this terminal top, and the conductive path between this weld pad and this terminal comprises this signal projection;
Wherein this semiconductor device is to be positioned at this heat conduction projection top and to be overlapped in this heat conduction projection, this semiconductor device is to be electrically connected to this weld pad, thereby be electrically connected to this terminal, and this semiconductor device is to be thermally coupled to this heat conduction projection, thereby is thermally coupled to this pedestal;
Wherein this adhesion layer is to be arranged on this pedestal, extend this pedestal top, and this heat conduction projection extends laterally to this terminal or crosses this terminal certainly;
Wherein this weld pad is to extend this adhesion layer top, and this terminal then extends this adhesion layer below; And
Wherein this heat conduction projection extends into this first opening, and this signal projection extends into this second opening, and described projection has same thickness and copline each other, and this pedestal and this terminal have same thickness and copline each other.
2. semiconductor chip group body according to claim 1 is characterized in that: this semiconductor device is one to comprise the LED packaging body of led chip.
3. semiconductor chip group body according to claim 2 is characterized in that: this LED packaging body is to utilize one first scolding tin to be electrically connected to this weld pad, and utilizes one second scolding tin to be thermally coupled to this radiating seat.
4. semiconductor chip group body according to claim 1 is characterized in that: this semiconductor device is the semiconductor chip.
5. semiconductor chip group body according to claim 4 is characterized in that: this chip is to utilize a routing to be electrically connected to this weld pad, and utilizes a solid brilliant material to be thermally coupled to this radiating seat.
6. semiconductor chip group body according to claim 1 is characterized in that: this adhesion layer contacts described projection, this pedestal, this weld pad and this terminal.
7. semiconductor chip group body according to claim 1 is characterized in that: this adhesion layer is in described side surface direction covering and around described projection.
8. semiconductor chip group body according to claim 1, it is characterized in that: this adhesion layer similar shape is coated on the sidewall of described projection.
9. semiconductor chip group body according to claim 1 is characterized in that: the top of this adhesion layer and described projection and bottom copline.
10. semiconductor chip group body according to claim 1 is characterized in that: this adhesion layer extends laterally and crosses this terminal from this heat conduction projection.
11. semiconductor chip group body according to claim 1 is characterized in that: this adhesion layer extends to the peripheral edge of this semiconductor chip group body.
12. semiconductor chip group body according to claim 1 is characterized in that: this heat conduction projection is integrally formed with this pedestal, this signal projection is then integrally formed with this terminal.
13. semiconductor chip group body according to claim 1, it is characterized in that: this heat conduction projection is a flat-top awl cylindricality, flat top to this heat conduction projection is to be upwards to successively decrease to its diameter from this pedestal, and this signal projection is a flat-top awl cylindricality, and the flat top to this signal projection is to be upwards to successively decrease to its diameter from this terminal.
14. semiconductor chip group body according to claim 1 is characterized in that: this pedestal covers this heat conduction projection from the below, support this adhesion layer, and keeps at a distance with the peripheral edge of this semiconductor chip group body.
15. semiconductor chip group body according to claim 1 is characterized in that: this lead is to keep at a distance with this radiating seat, and this weld pad, this terminal then contact this adhesion layer with this signal projection.
16. semiconductor chip group body according to claim 1 is characterized in that: this terminal is in abutting connection with this signal projection, extends this signal projection below, and extends laterally from this signal projection along described side surface direction.
17. semiconductor chip group body according to claim 1, it is characterized in that: this radiating seat comprises a lid at least, this lid is positioned at an over top of this heat conduction projection, this top in abutting connection with this heat conduction projection, and cover this top of this heat conduction projection from the top, extend laterally along described side surface direction this top simultaneously from this heat conduction projection.
18. semiconductor chip group body according to claim 17 is characterized in that: this lid and this weld pad are copline in this adhesion layer top.
19. semiconductor chip group body according to claim 17 is characterized in that: this lid is rectangle or square, this top of this heat conduction projection then is circular.
20. semiconductor chip group body according to claim 17, it is characterized in that: the size of this lid and shape are to cooperate the thermo-contact surface of this semiconductor device and design, and the size at this top of this heat conduction projection and shape then are not to cooperate this thermo-contact surface of this semiconductor device and design.
21. a semiconductor chip group body is characterized in that: this semiconductor chip group body comprises at least:
Semiconductor device;
One adhesion layer, it has first opening and second opening at least;
One radiating seat, it comprises a heat conduction projection and a pedestal at least, wherein this heat conduction projection is in abutting connection with this pedestal and integrally formed with this pedestal, and this heat conduction projection is upward to extending this pedestal top along one, this pedestal is to extend this heat conduction projection below to opposite downward direction along one upward with this, and along extending laterally from this heat conduction projection perpendicular to this side surface direction that upwards reaches downward direction; And
One lead, it comprises a weld pad, a terminal, a route line and a signal projection at least, wherein this route line is in abutting connection with this weld pad, this signal projection is then in abutting connection with this route line and this terminal, and extend below this weld pad and this route line, extend this terminal top simultaneously, and the conductive path between this weld pad and this terminal comprises this route line and this signal projection;
Wherein this semiconductor device is to be arranged on this radiating seat, be overlapped in this heat conduction projection but be not overlapped in this signal projection, this semiconductor device is to be electrically connected to this weld pad, thereby be electrically connected to this terminal, and this semiconductor device is to be thermally coupled to this heat conduction projection, thereby is thermally coupled to this pedestal;
Wherein this adhesion layer is to be arranged on this pedestal, extends this pedestal top, and in described side surface direction covering and around described projection, extends to the peripheral edge of this semiconductor chip group body simultaneously;
Wherein this weld pad extends this adhesion layer top; And
Wherein this heat conduction projection extends into this first opening, this signal projection extends into this second opening, described projection has same thickness, copline each other, and extend through this adhesion layer, this pedestal and this terminal have same thickness, each other copline, and extend this adhesion layer below, the top of described projection and bottom are and this adhesion layer copline.
22. semiconductor chip group body according to claim 21, it is characterized in that: this semiconductor device is the semiconductor chip, and be to utilize a solid brilliant material to be arranged on this radiating seat, and utilize a routing to be electrically connected to this weld pad, utilize simultaneously and should be thermally coupled to this radiating seat by solid brilliant material.
23. semiconductor chip group body according to claim 21 is characterized in that: this adhesion layer contacts described projection, this pedestal, this weld pad, this terminal and this route line.
24. semiconductor chip group body according to claim 21, it is characterized in that: this heat conduction projection is a flat-top awl cylindricality, flat top to this heat conduction projection is to be upwards to successively decrease to its diameter from this pedestal, this top of this heat conduction projection is circular, one lid is to be arranged on this top of this heat conduction projection, be positioned at this over top of this heat conduction projection, this top in abutting connection with this heat conduction projection, and cover this top of this heat conduction projection from the top, extend laterally along described side surface direction this top from this heat conduction projection simultaneously, this lid is rectangle or square.
25. semiconductor chip group body according to claim 24 is characterized in that: this lid and this weld pad are copline in this adhesion layer top.
26. a semiconductor chip group body is characterized in that: this semiconductor chip group body comprises at least:
Semiconductor device;
One adhesion layer, it has first opening and second opening at least;
One radiating seat, it comprises a heat conduction projection and a pedestal at least, wherein this heat conduction projection is in abutting connection with this pedestal, and along one upward to extending this pedestal top, this pedestal is to extend this heat conduction projection below to opposite downward direction along one upward with this, and along extending laterally from this heat conduction projection perpendicular to this side surface direction that upwards reaches downward direction;
One substrate, it comprises a weld pad and a dielectric layer at least, and wherein first and second through hole extends through this substrate; And
One lead, it comprises this weld pad, a terminal and a signal projection at least, and wherein this signal projection is to extend this weld pad below and this terminal top, and the conductive path between this weld pad and this terminal comprises this signal projection;
Wherein this semiconductor device is to be positioned at this heat conduction projection top and to be overlapped in this heat conduction projection, this semiconductor device is to be electrically connected to this weld pad, thereby be electrically connected to this terminal, and this semiconductor device is to be thermally coupled to this heat conduction projection, thereby is thermally coupled to this pedestal;
Wherein this adhesion layer is to be arranged on this pedestal, extend this pedestal top, extend into first breach of this first through hole interior between this heat conduction projection and this substrate, extend into second breach of this second through hole interior between this signal projection and this substrate, and in described breach, extend across this dielectric layer, this adhesion layer extends laterally to this terminal or crosses this terminal from this heat conduction projection, and this adhesion layer is between between this heat conduction projection and this dielectric layer, between this signal projection and this dielectric layer and between this pedestal and this dielectric layer;
Wherein this substrate is to be arranged on this adhesion layer, and extends this pedestal top;
Wherein this weld pad is to extend this dielectric layer top, and this terminal then extends this adhesion layer below; And
Wherein this heat conduction projection extends into this first opening and this first through hole, and this signal projection extends into this second opening and this second through hole, and described projection has same thickness and copline each other, and this pedestal and this terminal have same thickness and copline each other.
27. semiconductor chip group body according to claim 26 is characterized in that: this semiconductor device is one to comprise the LED packaging body of led chip.
28. semiconductor chip group body according to claim 27 is characterized in that: this LED packaging body is to utilize one first scolding tin to be electrically connected to this weld pad, and utilizes one second scolding tin to be thermally coupled to this radiating seat.
29. semiconductor chip group body according to claim 26 is characterized in that: this semiconductor device is the semiconductor chip.
30. semiconductor chip group body according to claim 29 is characterized in that: this chip is to utilize a routing to be electrically connected to this weld pad, and utilizes a solid brilliant material to be thermally coupled to this radiating seat.
31. semiconductor chip group body according to claim 26, it is characterized in that: this adhesion layer contacts this heat conduction projection and this dielectric layer in this first breach, and in this second breach, contact this signal projection and this dielectric layer, simultaneously in described this pedestal of breach outer contacting, this terminal and this dielectric layer.
32. semiconductor chip group body according to claim 26 is characterized in that: this adhesion layer is in described side surface direction covering and around described projection.
33. semiconductor chip group body according to claim 26, it is characterized in that: this adhesion layer similar shape is coated on the sidewall of described projection.
34. semiconductor chip group body according to claim 26 is characterized in that: the top of this adhesion layer and described projection and bottom copline.
35. semiconductor chip group body according to claim 26 is characterized in that: this adhesion layer extends laterally and crosses this terminal from this heat conduction projection.
36. semiconductor chip group body according to claim 26 is characterized in that: this adhesion layer extends to the peripheral edge of this semiconductor chip group body.
37. semiconductor chip group body according to claim 26 is characterized in that: this heat conduction projection is integrally formed with this pedestal, this signal projection is then integrally formed with this terminal.
38. semiconductor chip group body according to claim 26, it is characterized in that: this heat conduction projection is a flat-top awl cylindricality, flat top to this heat conduction projection is to be upwards to successively decrease to its diameter from this pedestal, and this signal projection is a flat-top awl cylindricality, and the flat top to this signal projection is to be upwards to successively decrease to its diameter from this terminal.
39. semiconductor chip group body according to claim 26 is characterized in that: this pedestal covers this heat conduction projection from the below, support this substrate, and keeps at a distance with the peripheral edge of this semiconductor chip group body.
40. semiconductor chip group body according to claim 26 is characterized in that: this lead is to keep at a distance with this radiating seat, and this weld pad contacts this dielectric layer, this adhesion layer of this termination contact, and this signal projection then contacts this adhesion layer and this dielectric layer.
41. semiconductor chip group body according to claim 26 is characterized in that: this terminal is in abutting connection with this signal projection, extends this signal projection below, and extends laterally from this signal projection along described side surface direction.
42. semiconductor chip group body according to claim 26, it is characterized in that: this radiating seat comprises a lid at least, this lid is positioned at an over top of this heat conduction projection, this top in abutting connection with this heat conduction projection, and cover this top of this heat conduction projection from the top, extend laterally along described side surface direction this top simultaneously from this heat conduction projection.
43. according to the described semiconductor chip group of claim 42 body, it is characterized in that: this lid and this weld pad are copline in this dielectric layer top.
44. according to the described semiconductor chip group of claim 42 body, it is characterized in that: this lid is rectangle or square, this top of this heat conduction projection then is circular.
45. according to the described semiconductor chip group of claim 42 body, it is characterized in that: the size of this lid and shape are to cooperate the thermo-contact surface of this semiconductor device and design, and the size at this top of this heat conduction projection and shape then are not to cooperate this thermo-contact surface of this semiconductor device and design.
46. a semiconductor chip group body is characterized in that: this semiconductor chip group body comprises at least:
Semiconductor device;
One adhesion layer, it has first opening and second opening at least;
One radiating seat, it comprises a heat conduction projection at least, one pedestal and a lid, wherein this heat conduction projection is in abutting connection with this pedestal and integrally formed with this pedestal, this heat conduction projection is upward to extending this pedestal top along one, and provide hot link for this pedestal and this lid, this pedestal is to extend this heat conduction projection below to opposite downward direction along one upward with this, and along extending laterally from this heat conduction projection perpendicular to this side surface direction that upwards reaches downward direction, this lid is positioned at an over top of this heat conduction projection, this top in abutting connection with this heat conduction projection, and cover this top of this heat conduction projection from the top, extend laterally along described side surface direction this top simultaneously from this heat conduction projection;
One substrate, it comprises a weld pad, a route line and a dielectric layer at least, and wherein first and second through hole extends through this substrate; And
One lead, it comprises this weld pad, this route line, a terminal and a signal projection at least, wherein this route line is in abutting connection with this weld pad, this signal projection is then in abutting connection with this route line and this terminal, and extend below this weld pad and this route line, extend this terminal top simultaneously, and the conductive path between this weld pad and this terminal comprises this route line and this signal projection;
Wherein this semiconductor device is to be arranged on this lid, be overlapped in this heat conduction projection but be not overlapped in this signal projection, this semiconductor device is to be electrically connected to this weld pad, thereby is electrically connected to this terminal, and this semiconductor device is to be thermally coupled to this lid, thereby is thermally coupled to this pedestal;
Wherein this adhesion layer is to be arranged on this pedestal, extend this pedestal top, extend into first breach of this first through hole interior between this heat conduction projection and this substrate, extend into second breach of this second through hole interior between this signal projection and this substrate, and in described breach, extend across this dielectric layer, this adhesion layer is between this heat conduction projection and this dielectric layer, between this signal projection and this dielectric layer and between this pedestal and this dielectric layer, this adhesion layer covers and around described projection in described side surface direction, and extends to the peripheral edge of this semiconductor chip group body;
Wherein this weld pad extends this dielectric layer top; And
Wherein this heat conduction projection extends into this first opening and this first through hole, this signal projection extends into this second opening and this second through hole, described projection has same thickness, copline each other, and extend through this adhesion layer and this dielectric layer, this pedestal and this terminal have same thickness, each other copline, and extend this adhesion layer and this dielectric layer below, the top of described projection and bottom are and this adhesion layer copline.
47. according to the described semiconductor chip group of claim 46 body, it is characterized in that: this semiconductor device is the semiconductor chip, and be to utilize a solid brilliant material to be arranged on this lid, and utilize a routing to be electrically connected to this weld pad, utilize simultaneously and should be thermally coupled to this lid by solid brilliant material.
48. according to the described semiconductor chip group of claim 46 body, it is characterized in that: this adhesion layer contacts described projection and this dielectric layer in described breach, and in described this pedestal of breach outer contacting, this terminal and this dielectric layer, this dielectric layer then contacts this weld pad and this route line, and keeps at a distance with described projection, this pedestal and this terminal.
49. according to the described semiconductor chip group of claim 46 body, it is characterized in that: this heat conduction projection is a flat-top awl cylindricality, its diameter is to be upwards to successively decrease from this pedestal to this lid, this signal projection is a flat-top awl cylindricality, its diameter is to be upwards to successively decrease from this terminal to this route line, this top of this heat conduction projection is circular, and this lid then is rectangle or square.
50. according to the described semiconductor chip group of claim 46 body, it is characterized in that: this lid and this weld pad are copline in this dielectric layer top.
CN201010593471XA 2009-12-19 2010-12-17 Semiconductor chip assembly with a post/base heat spreader and a signal post Expired - Fee Related CN102130084B (en)

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