CN102386075A - Lightly-doped groove injection method - Google Patents
Lightly-doped groove injection method Download PDFInfo
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- CN102386075A CN102386075A CN201010272577XA CN201010272577A CN102386075A CN 102386075 A CN102386075 A CN 102386075A CN 201010272577X A CN201010272577X A CN 201010272577XA CN 201010272577 A CN201010272577 A CN 201010272577A CN 102386075 A CN102386075 A CN 102386075A
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Abstract
The invention provides a lightly-doped groove injection method which is applied to the treatment of a silicon wafer in an NMOS (N-channel Metal Oxide Semiconductor) manufacture process. The method comprises a step of injecting a doped material of ions below a grid oxide layer, wherein the doped material comprises fluorine-contained ions. According to the lightly-doped groove injection method provided by the invention, by using the fluorine-contained ions to carry out the lightly-doped groove injection method, the stability of electrons in a substrate area between source/drain electrodes is enhanced, thereby effectively avoiding generating thermal ion injection effects by the NMOS in an extreme condition.
Description
Technical field
The present invention relates to N groove metal oxide semiconductor (NMOS, N Metal-Oxide Semiconductor) manufacture method, be specifically related to a kind of light dope groove and inject (Pocket Implant) method.
Background technology
Difference and P groove metal oxide semiconductor (PMOS, P Metal-Oxide Semiconductor), the N groove metal oxide semiconductor can produce thermion injection effect (HCI, Hot Carrier Injection).Specifically be to say, along with reducing of chip size, it is a lot of that the supply power voltage of chip, operating voltage do not have corresponding minimizing, so corresponding electric field strength has increased, caused electronic motion speed to increase.When the energy of electronics is sufficiently high, will leave silicon substrate, tunnelling gets into grid oxic horizon, thereby changes threshold voltage.This effect can increase the threshold voltage of NMOS, and influences the NMOS long term reliability.
Existing NMOS manufacture method may further comprise the steps: the formation of (1) polysilicon gate (Gate) and offset spacer (Offset Spacer); (2) n-lightly doped drain (nLDD) injects, and the shallow p of the being infused in trap of dopant material of ion is sentenced the source/leakage that is equipped with medium or high dose subsequently inject formation source/drain region; (3) the light dope groove injects, the grid oxic horizon below between source/drain electrode near channel region injection light dope ion, to prevent the thermion injection effect.
Inject at said method step (3) light dope groove, as shown in Figure 1, dopant ion is selected boron ion (B+) for use; Through the boron ion is passed grid oxic horizon 103 at a certain angle; Be injected into polysilicon gate 105 and side wall 104 belows, the position between source/drain electrode 102 in the p trap 101.Through silicon hydrogen Si-H key or silicon deuterium Si-D keys with a large amount of existence in the above-mentioned area; Replace with silicon boron Si-B key; Because the bond energy of silicon boron key is greater than the bond energy of si-h bond and silicon deuterium key; Above-mentioned light dope groove method for implanting can be avoided the silicon generation covalent bond fracture on the substrate, leaves silicon substrate when promptly avoiding the energy of electronics sufficiently high, and tunnelling gets into grid oxic horizon.But because the bond energy of silicon boron key is not high enough, present technology still can not well avoid NMOS under thermion injection effect test condition, to produce the thermion injection effect.Under the common thermion injection effect test condition, generally can adopt 125 degrees centigrade, the condition of 130% normal working voltage, wherein 130% normal working voltage is meant that the NMOS to for example 2.5V normal working voltage tests with the voltage of 3.3V.
Summary of the invention
In view of this; Main purpose of the present invention is can not solve the poor stability of NMOS, under extreme conditions can produce the technical problem of thermion injection effect to light dope groove method for implanting of the prior art, and a kind of light dope groove method for implanting that can improve NMOS stability is provided.
For achieving the above object, technical scheme provided by the invention is following:
A kind of light dope groove method for implanting is applied in the NMOS manufacturing process the processing of silicon chip, comprises the step with the dopant material injector grid oxide layer below of ion; Said dopant material comprises fluoride ion.
Preferably, the implant angle of said fluoride ion is the 15-60 degree.
Preferably, said fluoride ion is the boron difluoride ion
Or fluorine ion F
+
Preferably, the injection energy of said boron difluoride ion
is 20～70 kiloelectron-volts; Implantation dosage is 2E13～8E13 atom per square centimeter.
Preferably, said fluorine ion F
+Injecting energy is 2～20 kiloelectron-volts; Implantation dosage is 2E13～2E14 atom per square centimeter.
Light dope groove method for implanting of the present invention has following beneficial effect:
At first; Light dope groove method for implanting of the present invention; Fluoride ion is injected groove; Utilizing fluosilicic Si-F bond energy is higher 6.9 electronvolt (ev), thereby has strengthened the stability of the electronics in the area between source/drain electrode, has avoided NMOS that the thermion injection effect under extreme conditions takes place effectively.
In addition; Light dope groove method for implanting of the present invention; Utilizing boron difluoride ion
to carry out the light dope groove injects; The injection energy of ion is 20～70 kiloelectron-volts; Implantation dosage is 2E13～8E13 atom per square centimeter, efficiently fluoride ion is injected into area between source/drain electrode, has strengthened the job stability of NMOS.
Have, light dope groove method for implanting of the present invention utilizes fluorine ion F again
+Carry out the light dope groove and inject, the injection energy of ion is 2～20 kiloelectron-volts, and implantation dosage is 2E13～2E14 atom per square centimeter, and fluoride ion is injected into area between source/drain electrode, has strengthened the job stability of NMOS.
Description of drawings
Fig. 1 is a light dope groove method for implanting sketch map in the prior art;
Fig. 2 is the method for implanting sketch map of a kind of embodiment of light dope groove method for implanting of the present invention;
Fig. 3 is the method for implanting sketch map of the other a kind of embodiment of light dope groove method for implanting of the present invention;
Reference numeral among the figure is expressed as:
101,201, the 301-p trap; 102,202,302-source/drain electrode;
103,203, the 303-grid oxic horizon; 104,204, the 304-side wall; 105,205, the 305-polysilicon gate.
Embodiment
The invention provides a kind of light dope groove method for implanting, be applied in the NMOS manufacturing process, comprise step the dopant material injector grid oxide layer below of ion to the processing of silicon chip; Said dopant material comprises fluoride ion.
Light dope groove method for implanting of the present invention; Fluoride ion is injected groove; Utilizing fluosilicic Si-F bond energy is higher 6.9 electronvolt (ev), thereby has strengthened the stability of the electronics in the area between source/drain electrode, has effectively avoided NMOS that the thermion injection effect under extreme conditions takes place.
For make the object of the invention, technical scheme, and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, to further explain of the present invention.
Embodiment 1
As shown in Figure 2; A kind of light dope groove method for implanting; It is that boron difluoride ion
is passed grid oxic horizon 203 at a certain angle; Be injected into polysilicon gate 205 and side wall 204 belows, the position between source/drain electrode 202 in the p trap 201 forms a large amount of fluosilicic keys in this position; Increase the bond energy and the stability of the covalent bond of silicon, to avoid producing the thermion injection effect.The implant angle of boron difluoride ion
is the 15-60 degree; Injecting energy is 20～70 kiloelectron-volts, and implantation dosage is 2E13～8E13 atom per square centimeter.
The light dope groove method for implanting of present embodiment is injected into area between source/drain electrode with boron difluoride ion
efficiently, has strengthened the job stability of NMOS.
Embodiment 2
As shown in Figure 3, a kind of light dope groove method for implanting, it is with fluorine ion F
+Pass grid oxic horizon 303 at a certain angle; Be injected into polysilicon gate 305 and side wall 304 belows, the position between source/drain electrode 302 in the p trap 301, and form a large amount of fluosilicic keys in this position; Increase the bond energy and the stability of the covalent bond of silicon, to avoid producing the thermion injection effect.Fluorine ion F
+Implant angle be the 15-60 degree, injecting energy is 20～70 kiloelectron-volts, implantation dosage is 2E13～8E13 atom per square centimeter.
The light dope groove method for implanting of present embodiment is injected into area between source/drain electrode with fluorine ion efficiently, has strengthened the job stability of NMOS.
The above is merely preferred embodiment of the present invention, and is in order to restriction the present invention, not all within spirit of the present invention and principle, any modification of being made, is equal to replacement, improvement etc., all should be included within the scope that the present invention protects.
Claims (5)
1. light dope groove method for implanting is applied in the NMOS manufacturing process processing of silicon chip is comprised the step with the dopant material injector grid oxide layer below of ion;
It is characterized in that said dopant material comprises fluoride ion.
2. method according to claim 1 is characterized in that, the implant angle of said fluoride ion is the 15-60 degree with respect to horizontal direction.
3. method according to claim 1 and 2 is characterized in that, said fluoride ion is the boron difluoride ion
Or fluorine ion F
+
4. method according to claim 3; It is characterized in that the injection energy of said boron difluoride ion
is 20～70 kiloelectron-volts; Implantation dosage is 2E13～8E13 atom per square centimeter.
5. method according to claim 3 is characterized in that, said fluorine ion F
+Injecting energy is 2～20 kiloelectron-volts; Implantation dosage is 2E13～2E14 atom per square centimeter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010272577XA CN102386075A (en) | 2010-08-27 | 2010-08-27 | Lightly-doped groove injection method |
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| CN201010272577XA CN102386075A (en) | 2010-08-27 | 2010-08-27 | Lightly-doped groove injection method |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5413945A (en) * | 1994-08-12 | 1995-05-09 | United Micro Electronics Corporation | Blanket N-LDD implantation for sub-micron MOS device manufacturing |
| US6180443B1 (en) * | 1998-05-04 | 2001-01-30 | Lg Semicon Co., Ltd. | Semiconductor device and method of fabricating the same |
| US20050142821A1 (en) * | 2003-12-27 | 2005-06-30 | Hak-Dong Kim | Methods of forming halo regions in NMOS transistors |
-
2010
- 2010-08-27 CN CN201010272577XA patent/CN102386075A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5413945A (en) * | 1994-08-12 | 1995-05-09 | United Micro Electronics Corporation | Blanket N-LDD implantation for sub-micron MOS device manufacturing |
| US6180443B1 (en) * | 1998-05-04 | 2001-01-30 | Lg Semicon Co., Ltd. | Semiconductor device and method of fabricating the same |
| US20050142821A1 (en) * | 2003-12-27 | 2005-06-30 | Hak-Dong Kim | Methods of forming halo regions in NMOS transistors |
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Application publication date: 20120321 |