CN102426294A - Clock phase difference measurement method and device - Google Patents
Clock phase difference measurement method and device Download PDFInfo
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- CN102426294A CN102426294A CN2011102245688A CN201110224568A CN102426294A CN 102426294 A CN102426294 A CN 102426294A CN 2011102245688 A CN2011102245688 A CN 2011102245688A CN 201110224568 A CN201110224568 A CN 201110224568A CN 102426294 A CN102426294 A CN 102426294A
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Abstract
The invention provides a clock phase difference measurement method and a device. The method comprises the following steps: carrying out phase adjustment on a first path of signal of two paths of signals with the same frequency; carrying out exclusive OR treatment on a second path of signal and the first path of signal after phase adjustment to generate a phase different pulse signal, and sending the phase difference pulse signal into a response processing module; judging whether the response processing module outputs a response signal, and outputting the response signal by the response processing module when the pulse width of an input signal is larger than or equal to the response pulse width of the response processing module; continuing to carry out phase adjustment and follow-up operations on the second path of signal after phase adjustment until the response processing module does not output response signals; and acquiring the phase difference of the two paths of signals with the same frequency according to the times of phase adjustment on the first path of signal and the step value of each time of phase adjustment when the response signal is not output. The technical scheme of the invention realizes the measurement of clock phase difference with higher measurement precision, and the measurement cost is reduced.
Description
Technical field
The present invention relates to electronic technology, relate in particular to a kind of clock skew measuring method and equipment.
Background technology
The measurement of clock skew is meant the time difference of measuring with rising edge or negative edge between the frequency clock signal.Along with the introducing of some new technologies in the communication field is had higher requirement to the measuring accuracy of clock skew, (the Institute of Electrical andElectronics Engineers of IEEE-USA for example; Abbreviate as: IEEE) 1588 application can make the time pass through Network Transmission; The precision of transmission can reach nanosecond (ns); Requirement such as when this time transmits in equipment and will have pair; To the time see to be exactly from electric signal the alignment of two-way rising edge of clock signal or negative edge, this has just related to and has measured the phase differential of two-way clock signal and the technology of compensation thereof, the clock signal that IEEE 1588 technology relate to generally is 1 hertz (Hz) or 100HZ or the lower signal of 1KHz equifrequent; Usually within 1ns, this has just proposed the measurement demand to the clock skew of low frequency, 1ns class precision to the precision of requirement alignment.
The method of at present common measurement clock skew is two-way to be carried out phase difference with the frequency clock signal calculate phase differential; Phase differential is carried out step-by-step counting as the signal strobe control counter to the clock signal of higher frequency, and the cycle of the clock signal of count results and higher frequency is multiplied each other can obtain the phase differential of two-way homogenous frequency signal.This measuring method is applicable to measuring accuracy is required lower clock signal; For measuring frequency requirement as the clock signal of the required higher frequency of the time clock correction of this degree of precision of 1ns level greater than GHz (GHz), this acquires a certain degree of difficulty in realization and realizes that cost is higher.
Adopt d type flip flop to detect the method for phase difference between two channels of square wave input signals in the prior art in addition.In the method, adopt d type flip flop that the two-way square-wave signal is carried out phase demodulation, give next stage with the pulse signal of phase demodulation acquisition and carry out the phase difference value differentiation.The process need of concrete differential phase difference converts digital signal into simulating signal earlier, and then through analog to digital conversion (Analog-to-Digital conversion; Abbreviate as: AD) gather and operations such as the integration phase differential that could reflect out.This method can identify the time clock correction to degree of precision as the 1ns level, and is comparatively complicated but this method realizes, realizes that cost is higher equally.
Summary of the invention
The present invention provides a kind of clock skew measuring method and equipment, in order to realize that the measurement than the clock skew of high measurement accuracy is reduced the cost of clock phase difference measurements.
The present invention provides a kind of clock skew measuring method, comprising:
First via signal in the two-way homogenous frequency signal is carried out the phase place adjustment;
The second road signal in the said two-way homogenous frequency signal and the adjusted first via signal of phase place are carried out the XOR processing, generate the phase differential pulse signal, and said phase differential pulse signal is sent into said response processing module as the input signal of response processing module;
Whether judge said response processing module according to said phase differential pulse signal output response signal, said response processing module is at the pulse width of input signal output response signal during more than or equal to the response pulsewidth of said response processing module;
When said response processing module output response signal, continue to carry out adjusted the second road signal of said phase place is carried out phase place adjustment and subsequent operation, up to said response processing module not till the output response signal;
When said response processing module not during output response signal,, obtain the phase differential of said two-way homogenous frequency signal according to the step value of the number of times that said first via signal is carried out the phase place adjustment with each phase place adjustment.
The present invention provides a kind of clock skew measuring equipment, comprising:
Phase adjusting module is used for the first via signal of two-way homogenous frequency signal is carried out the phase place adjustment;
The pulse acquisition module; Be used for the second road signal and the adjusted first via signal of phase place of said two-way homogenous frequency signal are carried out the XOR processing; Generate the phase differential pulse signal, and said phase differential pulse signal is sent into said response processing module as the input signal of response processing module;
Said response processing module is used at the pulse width of input signal output response signal during more than or equal to the response pulsewidth of said response processing module;
The response judge module is used to judge that whether said response processing module is according to said phase differential pulse signal output response signal;
Trigger module is used for when said response judge module is judged said response processing module output response signal, triggers said phase adjusting module and continues the adjusted first via signal of said phase place is carried out the phase place adjustment;
The phase differential acquisition module; Be used for judging said response processing module not during output response signal at said response judge module; Carry out the number of times of phase place adjustment and the step value of each phase place adjustment according to said first via signal, obtain the phase differential of said two-way homogenous frequency signal.
Clock skew measuring method of the present invention and equipment; Through road signal in the two-way homogenous frequency signal being carried out the phase place adjustment; And obtain and adjust the phase differential pulse signal of two paths of signals afterwards; With the input signal of phase differential pulse signal as response processing module, utilize response processing module when the pulse width of input signal responds pulsewidth more than or equal to it, to produce the characteristics of response signal, judge whether the phase differential through the adjusted two paths of signals of phase place reaches certain accuracy requirement; The step value of when reaching certain accuracy requirement, adjusting according to the number of times that one road signal is carried out the phase place adjustment and each phase place; Obtain the phase differential of two-way homogenous frequency signal, this method is simple, is easy to use existing device to realize; And make full use of existing device the response sensitivity of time is realized the measurement than the phase differential of high measurement accuracy is realized that cost is lower.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art; To do one to the accompanying drawing of required use in embodiment or the description of the Prior Art below introduces simply; Obviously, the accompanying drawing in describing below is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
The process flow diagram of the clock skew measuring method that Fig. 1 provides for one embodiment of the invention;
The structural representation of the clock skew measuring equipment that Fig. 2 provides for one embodiment of the invention;
Fig. 3 A is the structural representation of the clock skew measuring equipment that provides of another embodiment of the present invention;
Fig. 3 B is without the waveform synoptic diagram of the clock signal of phase place adjustment in another embodiment of the present invention;
Fig. 3 C is the waveform synoptic diagram of the adjusted clock signal of process phase place in another embodiment of the present invention;
Fig. 3 D carries out the waveform synoptic diagram that XOR is handled the phase differential pulse signal that obtains to the two-way clock signal in another embodiment of the present invention.
Embodiment
For the purpose, technical scheme and the advantage that make the embodiment of the invention clearer; To combine the accompanying drawing in the embodiment of the invention below; Technical scheme in the embodiment of the invention is carried out clear, intactly description; Obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the present invention's protection.
The process flow diagram of the clock skew measuring method that Fig. 1 provides for one embodiment of the invention.As shown in Figure 1, the method for present embodiment comprises:
The two-way homogenous frequency signal is carried out phase difference measurement be meant the time difference of measuring rising edge between homogenous frequency signal or negative edge.In the present embodiment, at first road signal in the two-way homogenous frequency signal is carried out the phase place adjustment, realize phase alignment the two-way homogenous frequency signal through the stratum-3 clock synchronous device.Wherein, the selected road signal that carries out the phase place adjustment is said first via signal.To one road signal wherein carry out that the phase place adjustment comprises that the reach that this road signal is carried out phase place is handled or to this road signal carry out phase place after move processing.Concrete; The reach that this road signal is carried out phase place handle still carry out phase place after move the relation of handling the phase differential of looking this road signal and another road signal and decide; For example: when this road signal is compared its phase lag with another road signal, need carry out the reach processing of phase place to this road signal; When this road signal is compared the phase lag of another road signal with another road signal, need to this road signal carry out phase place after move processing.
In the present embodiment, can use stratum-3 clock synchronous device common in the communications field that one road signal is wherein carried out the phase place adjustment; Usually the phase place setting range of stratum-3 clock synchronous device is at positive and negative hundreds of ns, and the step-length of adjustment usually several to tens psecs (ps).For example: employed stratum-3 clock synchronous device can be the DS3104 device, and the phase place setting range of this DS3104 device is positive and negative 200ns, and its adjustment step-length is 6ps.This shows; Present embodiment uses modal stratum-3 clock synchronous device that two paths of signals is carried out phase alignment; Can the phase differential precision of two paths of signals be controlled at ps level scope, and the realization of stratum-3 clock synchronous device is quite ripe, its price is also quite cheap.
When the phase differential of two-way homogenous frequency signal hour, can only use a stratum-3 clock synchronous device; When the phase differential of two-way homogenous frequency signal is big; Can also use the mutual cascade of a plurality of (two or more) stratum-3 clock synchronous device, a plurality of stratum-3 clock synchronous device through mutual cascade are carried out repeatedly the phase place adjustment to one road signal wherein continuously in phase place adjustment process.For example: when using two DS3104 device cascades, once can realize one road signal is wherein carried out the phase place adjustment of 12ps, and total regulating power can reach 400ns.
After one road signal being carried out the phase place adjustment through the stratum-3 clock synchronous device; To carry out the XOR processing without one road signal (i.e. the second road signal) of phase place adjustment with through the road signal that phase place is adjusted; Generate the phase differential pulse signal, then the phase differential pulse signal is sent into response processing module as the input of response processing module.
Wherein, response processing module is at the pulse width of input signal output response signal during more than or equal to the response pulsewidth of response processing module, on the contrary output response signal not.This response processing module can be realized by semiconductor devices, and makes full use of the higher characteristic of response sensitivity that semiconductor devices changes signal, and whether the phase differential of differentiating the two-way homogenous frequency signal reaches certain accuracy requirement.For semiconductor devices, whether can output response signal be with good conditionsi according to input signal, require the level of input signal after variation, will have certain retention time (promptly responding pulsewidth) could produce response signal usually.Present embodiment utilizes this only characteristics of ability output response signal when the pulse width of input signal responds pulsewidth more than or equal to it of semiconductor devices, judges whether the phase differential of two-way homogenous frequency signal reaches certain accuracy requirement.
By above-mentioned visible, present embodiment receives the restriction of the response pulsewidth of response process pulsewidth to the measuring accuracy of the phase differential of two-way homogenous frequency signal.At present, the response pulsewidth of the response processing module of being realized by semiconductor devices tens to a hundreds of ps, is far smaller than the ns level, so can realize the measurement to the clock skew of 1ns level or more senior measuring accuracy usually.In addition, semiconductor devices is quite ripe, and its relative low price.
In the practical implementation process, can judge whether output response signal of response processing module through the width of signal on the output pin of monitoring response processing module.For example: when response processing module is specially a counter; When the pulse width as its phase of input signals difference pulse signal responds pulsewidth more than or equal to it; Output has the count pulse of certain width; So when having the pulse signal that satisfies certain width on the output pin that monitors counter, confirm this counter output response signal; Otherwise, confirm not output response signal of this counter.
When the response processing module output response signal, the phase differential that the two-way homogenous frequency signal is described does not also reach in the represented accuracy rating of the response pulsewidth of response processing module, so continue first via signal is carried out the phase place adjustment.For example: before supposing the phase place of first via signal has been carried out the reach of 6ps, then continued Phase advance 6ps, be about to the Phase advance 12ps of first via signal with first via signal.Then, continue the phase differential pulse signal of the adjusted first via signal of phase place and the second road signal is sent into response processing module, and judge whether output response signal of response processing module, up to response processing module not till the output response signal.
When response processing module not during output response signal; Explain that the phase differential of two-way homogenous frequency signal has reached the represented accuracy rating of response pulsewidth of response processing module; When the response pulsewidth of response processing module is the ps level; Two-way homogenous frequency signal phase differential at this moment is promptly in ps level scope; And according to the phase differential that first via signal is carried out the phase place adjustment number of times and the two-way homogenous frequency signal that step value obtained of each phase place adjustment also just in the ps level, the measurement requirement of satisfied measuring accuracy to the 1ns level.
Concrete, when the step value of each phase place adjustment is identical, can the phase place adjustment number of times to first via signal be multiply by identical step value, draw the phase differential of two-way homogenous frequency signal.When the step value of each phase place adjustment not simultaneously, can be with the step value addition of each phase place adjustment, the result of final addition is the phase differential of two-way homogenous frequency signal.
By above-mentioned visible, the clock skew measuring method of present embodiment gets access to the phase differential of two-way homogenous frequency signal, and its measuring error can accomplish 1ns or littler than 1ns, the measurement of the phase differential of the clock signal that has realized measuring accuracy is had relatively high expectations.
The clock skew measuring method of present embodiment; Realize that principle is simple relatively; Can make full use of in the communications field existing device realizes; Realize that cost is lower, and make full use of the characteristic of the response sensitivity of existing device in the communications field, can measuring error be limited in 1ns level or the level lower than 1ns; Be applicable to the measurement of the phase differential of the various clock signals that measuring accuracy is had relatively high expectations, solved measuring accuracy is had relatively high expectations and the problems of measurement of phase differential between the lower low frequency signal of frequency.
The structural representation of the clock skew measuring equipment that Fig. 2 provides for one embodiment of the invention.As shown in Figure 2, the equipment of present embodiment comprises: phase adjusting module 21, pulse acquisition module 22, response processing module 23, response judge module 24, trigger module 25 and phase differential acquisition module 26.
Wherein, phase adjusting module 21 is connected with pulse acquisition module 22, is used for the first via signal of two-way homogenous frequency signal is carried out the phase place adjustment.Pulse acquisition module 22; Be connected with response processing module 23; Be used for the second road signal and the adjusted first via signal of phase place of two-way homogenous frequency signal are carried out the XOR processing; Generate the phase differential pulse signal, and the phase differential pulse signal is sent into response processing module 23 as the input signal of response processing module 23.Response processing module 23 is connected with response judge module 24, is used at the pulse width of input signal output response signal during more than or equal to the response pulsewidth of response processing module 23.Response judge module 24 is used to judge that whether response processing module 23 is according to phase differential pulse signal output response signal.Trigger module 25 is connected with response judge module 24, is used for when response judge module 24 is judged response processing module 23 output response signals, triggers phase adjusting module 21 and continues the adjusted first via signal of phase place is carried out the phase place adjustment.Phase differential acquisition module 26; Be connected with response judge module 24; Be used for judging response processing module 23 not during output response signal,, obtain the phase differential of two-way homogenous frequency signal according to the step value of the number of times that first via signal is carried out the phase place adjustment with each phase place adjustment at response judge module 24.
Above-mentioned each functional module can be used for carrying out the flow process of clock skew measuring method shown in Figure 1, and its concrete principle of work repeats no more, and sees the description of method embodiment for details.
Wherein, phase adjusting module 21 can be realized by comparatively common in an existing communication field stratum-3 clock synchronous device, also can be realized by the stratum-3 clock synchronous device of a plurality of mutual cascades.Response processing module 23 can be realized by semiconductor devices comparatively common in the communications field; It for example can be the counter of realizing by semiconductor devices; Its input signal is the phase differential pulse signal of present embodiment, and the response sensitivity of semiconductor devices is its response pulsewidth.
Further, the pulse acquisition module in the clock skew measuring equipment of present embodiment 22 can be by CPLD (Complex Programmable Logic Device with response processing module 23; Abbreviate as: CPLD) or field programmable gate array (Field Programmable Gate Array; Abbreviate as: realize that FPGA) more preferably two modules are integrated on same CPLD or the FPGA.
Further, the response judge module 24 of present embodiment, trigger module 25 and phase differential acquisition module 26 can be by CPU (Central Processing Unit; Abbreviate as: CPU) realize.Wherein, phase adjusting module 21, pulse acquisition module 22 and response processing module 23 receive the control of CPU, and whole clock skew measuring equipment is accomplished the phase difference measurement to the two-way homogenous frequency signal under the control of CPU.
Further again; The clock skew measuring equipment of present embodiment can be realized that the phase adjusting module 21 in the i.e. clock phase difference measurement equipment, pulse acquisition module 22, response processing module 23, response judge module 24, trigger module 25 and phase differential acquisition module 26 all are integrated on CPLD or the FPGA by CPLD or FPGA.
The clock skew measuring equipment of present embodiment; In order to realize the flow process of the clock skew measuring method that the foregoing description provides; Its each functional module can be realized by existing device in the communications field; Realize that cost is lower, and make full use of the characteristic of the response sensitivity of existing device in the communications field, can measuring error be limited in 1ns level or the level lower than 1ns; Be applicable to the measurement of the phase differential of the various clock signals that measuring accuracy is had relatively high expectations, solved measuring accuracy is had relatively high expectations and the problems of measurement of phase differential between the lower low frequency signal of frequency.
Fig. 3 A is the structural representation of the clock skew measuring equipment that provides of another embodiment of the present invention.Fig. 3 B is without the waveform synoptic diagram of the clock signal of phase place adjustment in another embodiment of the present invention; Fig. 3 C is the waveform synoptic diagram of the adjusted clock signal of process phase place in another embodiment of the present invention; Fig. 3 D carries out the waveform synoptic diagram that XOR is handled the phase differential pulse signal that obtains to the two-way clock signal in another embodiment of the present invention.Shown in Fig. 3 A, the equipment of present embodiment comprises: phasing unit 10, phase identification unit 20 and CPU30.
Wherein, the phasing unit 10 of present embodiment is equivalent to the phase adjusting module 21 among Fig. 2, and it can be realized that equally it is used for two-way is carried out the phase place adjustment with a road of frequency clock signal by stratum-3 clock synchronous device (for example DS3104).Wherein, without the waveform of one tunnel clock signal of phase place adjustment shown in Fig. 3 B, through make after the adjustment of phasing unit 10 one or many phase places phase identification unit 20 no longer the waveform of the clock signal during output response signal shown in Fig. 3 C.
Wherein, CPU30 is equivalent to response judge module 24, trigger module 25 and the phase differential acquisition module 26 among Fig. 2.Whether CPU30 is mainly used in monitoring phase identification unit 20 has counting pulse signal output; And there is counting pulse signal when output control phasing unit 10 to continue the adjusted clock signal of phase place is carried out the phase place adjustment monitoring phase identification unit 20; And be responsible for the number of times that the record phasing unit carries out the phase place adjustment to one tunnel clock signal wherein; When not having counting pulse signal output in phase identification unit 20; Step value multiplies each other when adjusting with phasing unit 10 each phase places according to the phase place adjustment number of times of record, obtains the phase differential of two-way clock signal.
The clock skew measuring equipment of present embodiment; Under the control of CPU30, make phasing unit 10 constantly move the wherein phase place of one tunnel clock signal; The XOR part is constantly calculated the phase differential between the adjusted clock signal of phase place and another road clock signal; Till the phase differential that calculates makes that counter can't respond; The pulse width of phase differential pulse signal that shows this moment is less than certain time value, that is the phase differential that shows two-way clock signal this moment is less than certain represented one magnitude of certain time value.
The phase place adjustment step value of the phasing unit of usually, being realized by the stratum-3 clock synchronous device 10 is much smaller than 1ns.And the logical block of present stage CPLD chip internal is very fast to the response speed of clock, that is to say or response sensitivity very high to respond pulsewidth in other words very little.For example: with the 5M family chip is example; Common chips such as 5M40Z/5M80Z/5M160Z/5M240Z/5M570Z are as long as clock high level or low level duration just can produce response signal greater than 253ps, and the response pulsewidth that is to say those chips is 253ps; And common chips such as 5M1270Z/5M2210Z need only the clock high level or the low level time just can produce response signal greater than 216ps, and the response pulsewidth that is to say those chips is 216ps.With chips such as 5M1270Z/5M2210Z is example; As long as the time interval of clock high level is greater than 216ps; The counter of those chip internals just can be counted; That is to say through existing chip to be easy to realize the counter in the phase identification unit 20 in the present embodiment, and the response pulsewidth of assurance counter is in the ps level.Wherein, When the phase place adjustment step value of the phasing unit 10 of present embodiment is 6ps, and the response pulsewidth of the counter in the phase identification unit 20 is when being 216ps, can realize that measuring accuracy is not more than the measurement of the phase differential of 216ps through phase place adjustment repeatedly; The measuring accuracy of the 1ns level that requires much larger than IEEE 1588 fields; And stratum-3 clock synchronous device and CPLD chip are relatively ripe, and price comparison is cheap, thereby has reduced the realization cost of present embodiment.
One of ordinary skill in the art will appreciate that: all or part of step that realizes said method embodiment can be accomplished through the relevant hardware of programmed instruction; Aforesaid program can be stored in the computer read/write memory medium; This program the step that comprises said method embodiment when carrying out; And aforesaid storage medium comprises: various media that can be program code stored such as ROM, RAM, magnetic disc or CD.
What should explain at last is: above embodiment is only in order to explaining technical scheme of the present invention, but not to its restriction; Although with reference to previous embodiment the present invention has been carried out detailed explanation, those of ordinary skill in the art is to be understood that: it still can be made amendment to the technical scheme that aforementioned each embodiment put down in writing, and perhaps part technical characterictic wherein is equal to replacement; And these are revised or replacement, do not make the spirit and the scope of the essence disengaging various embodiments of the present invention technical scheme of relevant art scheme.
Claims (7)
1. a clock skew measuring method is characterized in that, comprising:
First via signal in the two-way homogenous frequency signal is carried out the phase place adjustment;
The second road signal in the said two-way homogenous frequency signal and the adjusted first via signal of phase place are carried out the XOR processing, generate the phase differential pulse signal, and said phase differential pulse signal is sent into said response processing module as the input signal of response processing module;
Whether judge said response processing module according to said phase differential pulse signal output response signal, said response processing module is at the pulse width of input signal output response signal during more than or equal to the response pulsewidth of said response processing module;
When said response processing module output response signal, continue to carry out adjusted the second road signal of said phase place is carried out phase place adjustment and subsequent operation, up to said response processing module not till the output response signal;
When said response processing module not during output response signal,, obtain the phase differential of said two-way homogenous frequency signal according to the step value of the number of times that said first via signal is carried out the phase place adjustment with each phase place adjustment.
2. clock skew measuring method according to claim 1 is characterized in that, saidly first via signal in the two-way homogenous frequency signal is carried out phase place adjustment comprises:
Use the stratum-3 clock synchronous device of a stratum-3 clock synchronous device or a plurality of mutual cascades that said first via signal is carried out the phase place adjustment.
3. a clock skew measuring equipment is characterized in that, comprising:
Phase adjusting module is used for the first via signal of two-way homogenous frequency signal is carried out the phase place adjustment;
The pulse acquisition module; Be used for the second road signal and the adjusted first via signal of phase place of said two-way homogenous frequency signal are carried out the XOR processing; Generate the phase differential pulse signal, and said phase differential pulse signal is sent into said response processing module as the input signal of response processing module;
Said response processing module is used at the pulse width of input signal output response signal during more than or equal to the response pulsewidth of said response processing module;
The response judge module is used to judge that whether said response processing module is according to said phase differential pulse signal output response signal;
Trigger module is used for when said response judge module is judged said response processing module output response signal, triggers said phase adjusting module and continues the adjusted first via signal of said phase place is carried out the phase place adjustment;
The phase differential acquisition module; Be used for judging said response processing module not during output response signal at said response judge module; According to the step value of the number of times that said first via signal is carried out the phase place adjustment, obtain the phase differential of said two-way homogenous frequency signal with each phase place adjustment.
4. clock skew measuring equipment according to claim 3 is characterized in that, said phase adjusting module is the stratum-3 clock synchronous device of a stratum-3 clock synchronous device or a plurality of mutual cascades.
5. according to claim 3 or 4 described clock skew measuring equipments, it is characterized in that said response processing module is a semiconductor devices, the response pulsewidth of said response processing module is the response sensitivity of said semiconductor devices.
6. according to claim 3 or 4 described clock skew measuring equipments, it is characterized in that said phase differential acquisition module and said response processing module are realized by CPLD.
7. according to claim 3 or 4 described clock skew measuring equipments; It is characterized in that said phase adjusting module, said pulse acquisition module, said response processing module, said response judge module, said trigger module and said phase differential acquisition module are realized by CPLD.
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| CN106443184A (en) * | 2016-11-23 | 2017-02-22 | 优利德科技(中国)有限公司 | Phase detection device and phase detection method |
| CN106443184B (en) * | 2016-11-23 | 2023-07-14 | 优利德科技(中国)股份有限公司 | Phase detection device and phase detection method |
| CN107436383A (en) * | 2017-08-22 | 2017-12-05 | 电子科技大学 | A kind of high-precision pulse signal time difference measuring device and measuring method |
| CN107436383B (en) * | 2017-08-22 | 2019-08-16 | 电子科技大学 | A kind of high-precision pulse signal time difference measuring device and measurement method |
| CN117713983A (en) * | 2024-02-05 | 2024-03-15 | 浙江华创视讯科技有限公司 | Clock synchronization monitoring method, device, cascade system and computer equipment |
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