CN102473804B - P-contact layer for III phosphide semiconductor luminescent device - Google Patents

P-contact layer for III phosphide semiconductor luminescent device Download PDF

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Publication number
CN102473804B
CN102473804B CN201080029721.5A CN201080029721A CN102473804B CN 102473804 B CN102473804 B CN 102473804B CN 201080029721 A CN201080029721 A CN 201080029721A CN 102473804 B CN102473804 B CN 102473804B
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contact
contact layer
layer
metal
gaas
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CN102473804A (en
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T.钟
A.芒克霍尔姆
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Koninklijke Philips NV
Lumileds LLC
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Koninklijke Philips Electronics NV
Philips Lumileds Lighing Co LLC
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/387—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/405—Reflective materials

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  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Led Device Packages (AREA)

Abstract

A kind of device includes semiconductor structure, and it has at least one the III phosphide luminescent layer being arranged between n-type region and p-type area.This semiconductor structure also includes GaAsxP1‑xP-contact layer, wherein x < 0.45.First metal contact directly contacts GaAsxP1‑xP-contact layer.Second metal contact is electrically connected to n-type region.First and second metal contacts are formed on the same side of semiconductor structure.

Description

P-contact layer for III phosphide semiconductor luminescent device
Technical field
The present invention relates to III phosphide luminescent device, and send out more particularly to for flip-chip III phosphide The contact layer of optical device.
Background technology
Such as (AlxGa1-x)1-yInyThe III phosphide semiconductor device of P light emitting diode (LED) be used to from Red to amber visible wavelength.AlInGaP LED is formed typically via growing each epitaxial layer in GaAs growth substrates, P-type layer that each epitaxial layer has included light-emitting active layer sandwiched and n-layer.High-quality ternary and quaternary substrate make extremely difficult, The most generally use GaAs substrate.In order to make low defect LED layer, (AlxGa1-x)1-yInyNecessary of the lattice paprmeter of P epitaxial layer Join the lattice paprmeter of GaAs.In order to mate GaAs lattice paprmeter, y=0.48.X value is adjusted to obtain desired transmitting wavelength.
It is illustrated in Figure 1 the flip-chip III phosphide LED described in US 7,244,630.The lower limit of N-shaped AlInP Preparative layer 22 is grown on growth substrates (not shown).The band gap of AlInP limiting layer 22 is more than the band gap of active layer. (AlxGa1-x)0.47In0.53The active layer 24 of P can include multiple layer, and this active layer is grown on limiting layer 22.The p-type of AlInP Upper limiting layer 26 is grown on active layer 24.Heavily-doped p-type AlInGaP contact layer 71 may be provided on layer 26.Layer 24,26 and 71 it is etched away to expose n-AlInP limiting layer 22 and for making electrical contact with.Metal n-electrode 83 is subsequently formed into electrical contact N-AlInP limiting layer 22, and p-electrode 84 be formed as contact p+ AlInGaP layer 71.
P and n-electrode are attached to the metal pad on potted element 87.After electrode is attached to potted element 87, can To remove substrate.Metal pad on potted element 87 top is electrically coupled to the p on bottom potted element 87 and n-electrode by path 90、91.Electrode 90,91 can be soldered to the pad on circuit board or is welded to the pad in another encapsulation.
The top surface (the n-AlInP layer 22 in this example) of LED is further processed have light extraction features 92.This Feature can include roughening or other technology, such as orderly veining or photon crystal structure, thus increases light output.
Summary of the invention
It is an object of the invention to form one and there is GaAsxP1-xP-contact layer with directly contact this GaAsxP1-xP-contact layer Metal contact device.Various embodiments of the present invention can have the contact resistance lower than traditional III phosphide devices.
According to various embodiments of the present invention, a kind of device includes semiconductor structure, and this semiconductor structure has and is arranged in n-type area At least one III phosphide luminescent layer between territory and p-type area.This semiconductor structure also includes GaAsxP1-xP-contact Layer, wherein x < 0.45.First metal contact directly contacts GaAsxP1-xP-contact layer.Second metal contact is electrically connected to n-type area Territory.First and second metal contacts are formed on the same side of semiconductor structure.
Accompanying drawing explanation
Fig. 1 illustrates prior art flip-chip III phosphide LED.
Fig. 2 illustrates the III phosphide devices structure being grown in growth substrates.
Fig. 3 explanation is forming p-contact, the structure of Fig. 2 after etching formation table top and formation n contact.
Fig. 4 illustrates the III phosphide devices being arranged on base.
Fig. 5 explanation has the energy band diagram of a part for the device of conventional contacts layer.
Fig. 6 explanation is according to the energy band diagram of a part for the device of various embodiments of the present invention.
Detailed description of the invention
In the device of all devices as illustrated in Figure 1, contact layer 71 typically GaP.Form ohm p-contact of GaP And it is difficult for not reducing the reflection that photon equilibrium state causes at metal-semiconductor interface.P metal-semiconductor interface is preferably Smooth as far as possible and uniform, to minimize photon equilibrium state.The traditional p metal contact being formed on GaP contact layer is typically introduced into Metal pricking object (spike) and heterointerface, this causes less desirable photon equilibrium state.
In various embodiments of the present invention, metal p-contact is formed on GaAsP contact layer rather than GaP contact layer.
Fig. 2-4 explanation forms the device according to various embodiments of the present invention.In fig. 2, device architecture is grown in growth substrates On 10, this growth substrates can be the suitable growth substrates of GaAs or any.First n-type region 12 is grown in growth substrates 10 On.N-type region 12 can include the multilamellar of different component and concentration of dopant, and this multilamellar such as includes: preparation layer, can be such as N-shaped or the cushion of involuntary doping or nucleating layer；Releasing layer, it is designed to remove at substrate promote to discharge subsequently growth afterwards Substrate or thinning semiconductor structure；And N-shaped or even p-type device layer, it is designed for light-emitting zone efficient transmission light institute Desired concrete optics or electrical properties.N-type region 12 can include such as (AlxGa1-x)0.52In0.48P n contact layer, wherein x= 0.4。
Luminous or active region 14 is grown on N-shaped 12.Active region 14 can be single thickness or thin luminescent layer, or Person is the multi-quantum well active region territory of multiple thin or thick mqw light emitting layer including being separated by barrier layer.
P-type area 16 is grown on active region 14.Being similar to n-type region, p-type area can include different component, thickness Degree and the multilamellar of concentration of dopant, this multilamellar includes layer or the n-layer of involuntary doping.P-type area 16 can include such as GaP or AlInP p coating.In certain embodiments, p-type area 16 includes the coating adjoining active region and as described below is arranged in Transitional region between coating and contact layer.Such as, coating can be 1.5 μ m-thick Al0.48In0.52P(or AlInGaP) layer, and Transitional region can be the content gradually variational (Al of thin (thickness is 20-5000)xGa1-x)0.5In0.5P layer, such as from AlInP gradual change To (Al0.3Ga0.7)0.47In0.53P。
According to various embodiments of the present invention, P-contact layer 18 is grown on p-type area 16.P-contact layer 18 can be such as GaAsxP1-x.As component x is less than 0.45 so that this material is in indirect band gap region, minimizes so that absorbing.P-contact layer 18 can have constant composition x, or can be from x=0(GaP) content gradually variational is to GaAsxP1-x, wherein x < 0.45.There is perseverance Determine in the P-contact layer 18 of component x, in certain embodiments 0 < x < 0.45, in certain embodiments 0.2 < x < 0.4, and one X=0.3 in a little embodiments.In the P-contact layer 18 of content gradually variational, x is gradient to 0.45 from 0 in certain embodiments, real at some Execute in example and be gradient to 0.2 to 0.4 from 0, and be gradient to 0.3 from 0 in certain embodiments.P-contact layer 18 can use such as Mg, Zn or C is doped to 3e18cm-3To 1e19cm-3Concentration.P-contact layer 18 thickness the most in certain embodiments can be between 20 With 2 μm, and thickness can be 0.5 μm in certain embodiments.
In certain embodiments, use tetrabutyl arsine (TBAs) as arsine source and tetrabutyl phosphine (TBP) as phosphine source, raw Long GaAsP P-contact layer 18.TBAs and TBP is utilized to substitute such as arsine (AsH3) and phosphine (PH3) conventional source can allow p-contact Layer 18 grows at lower temperature, and this can obtain having the higher-quality material more preferably contacting attribute.Such as, as TBAs and When TBP is used as source, growth temperature can reduce up to 100 C, and this can increase Mg doping according to the factor of 2-2.5 and be incorporated to effect Rate.The increasing to enable of Mg doping efficiency realizes lower reactor background concn (remaining adulterant lower in background) and can To make the more consistent LED with more High Light Output.
In figure 3, form contacting metal and etch formation table top in the devices.Such as by heavy in separate areas 21 Long-pending metal ohmic contact, can be initially formed p-contact.Metal ohmic contact 21 can be such as AuZn or Al, and it is formed as a little And with after annealing.Mirror 20 can be such as silver, and this mirror is formed on metal ohmic contact region 21.Ohmic area 21 is one In a little embodiments, diameter is between 1 to 5 μm and the most a diameter of 3 μm, and separate in certain embodiments 5 to 15 μm and separate 10 μm in certain embodiments.
The p-contact of part, p-type layer 16 and 18 and active region 14 can be removed thus expose of n-type region 12 Divide 27.N contact 25 can be such as AuGe, and this n contact is formed on the exposed portion 27 of n-type region 12.N and p-contact 25 He 20/21 can be electrically insulated by groove, and this groove can be filled with insulant 23.It is exposed for formation by etching The part 27 of the n-type region of contact can stride across device distribution.
In the diagram, device attached is removed to base and growth substrates.N and p-contact 25 and 20 interconnect 35 by n and p With 33 and electricity and be physically connected to base 87.Interconnection can be such as solder, gold or other suitable material any.Pass through Such as reflux solder interconnection or gold interconnecting ultrasound combine, and device can be attached to base 87.Path (not shown in Fig. 4) is the end of by Metal pad on seat 87 tops is electrically coupled to the p on bottom base 87 and n-electrode 90,91.Electrode 90,91 can be soldered to electricity Pad on the plate of road, or it is welded to the pad in another encapsulation.
After being arranged on base 87 by device, such as, can remove growth substrates 10 by etching.Can thinning Remove the semiconductor structure 30 stayed after growth substrates.Such as by being roughened or etching to form such as photonic crystal Pattern, can by top surface veining thus improve light extraction.
Fig. 5 explanation includes the energy band diagram of a part for the device of tradition GaP contact layer.Fig. 6 illustrates according to each reality of the present invention That executes example includes GaAsP contact layer and gradual change (AlxGa1-x)0.5In0.5The energy band diagram of a part for the device of P transition zone.In Fig. 5 The breach in valence band between p-type area 16 and p-GaP contact layer 40 can capture hole.As illustrated in Figure 6, GaAsP contact layer The valence band of 18 is more advantageously alignd with the valence band of transition zone in p-type area 16, and GaAsP has less band gap, and this is permissible Increase activity hole concentration and also reduce contact resistance, this so that cut-in voltage can be reduced and increase power efficiency (wall-plug Efficiency).
Additionally, between the wavelength of 580 to 620nm (say be as described in active region 14 generally launch this wavelength model Enclose), GaAsP P-contact layer 18 is highly transparent.The transparency of GaAsP P-contact layer 18 can reduce absorbed inside and increase Big from the light extraction of device.
It addition, form tradition p metal contact on GaP contact layer to frequently result in metal pricking object and heterointerface, this Cause less desirable photon equilibrium state.Alloying technology (it can be such as high annealing) period after p metal deposit, can Metal pricking object can be formed.During alloying step, metal is diffused in p-contact semiconductor layer with uneven speed.As a result, Some region of contact layer has bigger metal infiltration, and other region has less metal infiltration.Uneven infiltration meeting Photon is caused to be scattered at interface or absorb, such as when the metal of diffusion forms, with P-contact layer, the alloy absorbing photon.As above The described GaAs according to various embodiments of the present inventionxP1-xContact layer has the more favourable band arrangement with p-contact metal (lineup) so that alloying can be need not or alloying temperature can reduce, thus cause interface evenly and Less metal pricking object.
Have been described in the present invention, it will be understood by those skilled in the art that in view of present disclosure, the present invention can be entered Row sum-equal matrix is without departing from the spirit of inventive concept described herein.Therefore, the scope of the present invention is not limited to illustrated and retouches The specific embodiment stated.

Claims (8)

1. a light emitting semiconductor device, including:
Semiconductor structure, comprising:
At least one the III phosphide luminescent layer being arranged between n-type region and p-type area；And
It is grown directly upon the GaAs in this p-type areaxP1-xP-contact layer, wherein x < 0.45, and GaAsxP1-xP-contact layer has Graded component x；And
First metal contact, it directly contacts this GaAsxP1-xP-contact layer；And
Second metal contact, it is electrically connected to this n-type region；
Wherein the first metal contact contacts on the same side being formed at this semiconductor structure with the second metal,
Wherein this p-type area includes:
Directly contact the coating of this luminescent layer；And
(the Al with graded component being arranged between this coating and this P-contact layerxGa1-x)0.5In0.5P region, wherein with p The boundary of contact layer, (AlxGa1-x)0.5In0.5The valence band in P region is alignd with the valence band of P-contact layer, and
Wherein at GaAsxP1-xIn P-contact layer, x is gradient to 0.45 to the first metal contact from 0 from p-type area.
2. the device of claim 1, wherein at GaAsxP1-xIn P-contact layer, x contacts from 0 gradual change to the first metal from p-type area To 0.2 to 0.4.
3. the device of claim 1, wherein the contact of this first metal includes:
Mirror；And
It is arranged in this mirror and this GaAsxP1-xMultiple ohmic contact regions between P-contact layer.
4. the device of claim 3, wherein this mirror include silver-colored and the plurality of ohmic contact regions include AuZn and Al wherein it One.
5. for the method manufacturing light emitting semiconductor device, including:
Growing semiconductor structure in growth substrates, this semiconductor structure includes:
At least one the III phosphide luminescent layer being arranged between n-type region and p-type area；And
It is grown directly upon the GaAs in this p-type areaxP1-xP-contact layer, wherein x < 0.45, and GaAsxP1-xP-contact layer has Graded component x；
Formed and directly contact this GaAsxP1-xFirst metal contact of P-contact layer；
Etch away this part of at least one III phosphide luminescent layer and this p-type area to expose this n-type area of a part Territory；And
Form the second metal contact being electrically connected to this n-type region；
Wherein the first metal contact contacts on the same side being formed at this semiconductor structure with the second metal,
Wherein this p-type area includes:
Directly contact the coating of this luminescent layer；And
(the Al with graded component being arranged between this coating and this P-contact layerxGa1-x)0.5In0.5P region, wherein with p The boundary of contact layer, (AlxGa1-x)0.5In0.5The valence band in P region is alignd with the valence band of P-contact layer, and
Wherein at GaAsxP1-xIn P-contact layer, x is gradient to 0.45 to the first metal contact from 0 from p-type area.
6. the method for claim 5, wherein growth semiconductor structure includes using tetrabutyl arsine (TBAs) to grow this p as arsine source Contact layer.
7. the method for claim 5, wherein growth semiconductor structure includes using tetrabutyl phosphine (TBP) to grow this p as phosphine source Contact layer.
8. the method for claim 5, also includes removing this growth substrates.
CN201080029721.5A 2009-06-30 2010-05-27 P-contact layer for III phosphide semiconductor luminescent device Active CN102473804B (en)

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US12/494,988 US8017958B2 (en) 2009-06-30 2009-06-30 P-contact layer for a III-P semiconductor light emitting device
PCT/IB2010/052367 WO2011001308A1 (en) 2009-06-30 2010-05-27 P-contact layer for a iii-p semiconductor light emitting device

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US20110284891A1 (en) 2011-11-24
US20100327299A1 (en) 2010-12-30
CN102473804A (en) 2012-05-23
BRPI1010215A2 (en) 2017-01-24
KR20170075018A (en) 2017-06-30
US8017958B2 (en) 2011-09-13
JP2017118150A (en) 2017-06-29
WO2011001308A1 (en) 2011-01-06
TW201106501A (en) 2011-02-16
BRPI1010215B1 (en) 2020-03-31
TWI528586B (en) 2016-04-01
KR101886733B1 (en) 2018-08-09
KR101750397B1 (en) 2017-06-23
US8816368B2 (en) 2014-08-26
JP2016034036A (en) 2016-03-10

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