CN102800362B - The erasing processing method excessively of nonvolatile storage and the system of process - Google Patents

The erasing processing method excessively of nonvolatile storage and the system of process Download PDF

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CN102800362B
CN102800362B CN201110138594.9A CN201110138594A CN102800362B CN 102800362 B CN102800362 B CN 102800362B CN 201110138594 A CN201110138594 A CN 201110138594A CN 102800362 B CN102800362 B CN 102800362B
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threshold voltage
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wordline
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CN102800362A (en
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苏志强
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Zhaoyi Innovation Technology Group Co ltd
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GigaDevice Semiconductor Beijing Inc
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Abstract

What the invention provides a kind of nonvolatile storage crosses erasing processing method, comprises the following steps: be applied more than the process voltage of target threshold voltage in logical block in the wordline of all memory element;Whether verify the threshold voltage of all memory element be more than or equal to target threshold voltage, if so, then end operation, otherwise, then carry out next step;All threshold voltages after verification are carried out soft programming operation less than the memory element of target threshold voltage, and returns previous step.Present invention also offers the erasing of crossing of a kind of nonvolatile storage realizing preceding method and process system.The erasing processing method excessively of the nonvolatile storage of the present invention and the system of process, it is possible to quickly make all of memory element return to normal erasing state, saved the time that erasing processes, improve the efficiency of test.

Description

The erasing processing method excessively of nonvolatile storage and the system of process
Technical field
The present invention relates to semiconductor memory technologies field, what particularly relate to a kind of nonvolatile storage crosses erasing processing method and process system.
Background technology
For the correctness of verifying memory product, a series of testing process can be carried out before product export.These storage products can include non-volatile memory product (such as, flash memory Flash, or can electricity except programmable read only memory EEPROM etc.), it is also possible to include One Time Programmable OTP class memorizer.General testing process can include the short circuit/out of circuit test of product pin (pin), logic function test, electrically erasable characteristic test (so that whether the data judging in this volatile storage can be electrically erased through the gate and write new data again), procedure code test (procedure code writing this non-volatility memorizer is read and compared with this write-in program code, whether the read-write motion to judge this non-volatility memorizer is correct) etc..
In carrying out electrically erasable characteristic test process, for flash memory (FlashMemory), it is the memorizer of a kind of based semiconductor, internal information, the online functional characteristics such as erasable still can be retained after there is system power failure, flash memory injects mechanism by thermoelectron and realizes device programming, adopts tunnel-effect to realize erasing.
In order to accelerate the process of erasing step, generally all can apply stronger erased conditions to carry out wiping (erase) operation, in this case, some memory element (cell) in logical block (block) were then likely to occur the state of erasing (over-erase).Crossing the morphogenetic main cause of erasing shape is: assuming that the grid G end at a flash memory applies the voltage of-8V, source S end and substrate apply the voltage of+7V, and drain D end is not added with voltage, and the persistent period of single erasing pulse is from several milliseconds to a few tens of milliseconds.In erase process, as long as a logical block has memory element to be not reaching to erasing state, then need again to apply erasing pulse to whole logical block.Owing on the FG of each memory element in a logical block, electron number is different, therefore each memory element is also different by the impact of erasing pulse.Namely time to the applying erasing pulse of certain logical block, in this logical block, the electronics on the FG of each memory element is also different to the number of substrate transfer, repeatedly applying erasing pulse until when all memory element all reach erasing state in logical block, the threshold voltage (V of the memory element that those electron transfer numbers are moreT) be likely to will be lower than erasing state range, now, these threshold voltages were at erasing state lower than erasing state range memory element.
Under normal circumstances, after the erasing state of logical block completes (after namely referring to erase_verify verification erasing successful operation), adopt stronger soft programming condition that the memory element being in erasing state is returned to normal erasing state.Namely it is continuously applied to programming pulse to these memory element crossing erasing, until these memory element are returned to normal erasing state.But, owing to the erasing through stronger erased conditions operates, can cause that in logical block, the threshold voltage distribution range of memory element is very wide, the threshold voltage of some memory element is too low, even below 0V.In this case, through soft programming operation, the threshold voltage still also having partial memory cell lower than 0V or is only slightly larger than 0V, it is impossible to return to normal erasing state.Therefore, it is generally the case that quadratic programming process can be carried out, the wordline being about to still be below 0V or the memory element of being a bit larger tham 0V through once crossing threshold voltage after erasing processes applies voltage, until return to normal erasing state.But partial memory cell is simply operated by quadratic programming, when needs apply voltage, it is necessary to according to this partial memory cell address carrying out one by one, the time therefore spent is longer, reduces the whole efficiency of test.
Summary of the invention
The technical problem to be solved is to provide erasing processing method and the process system excessively of a kind of nonvolatile storage, it is possible to quickly makes all of memory element return to normal erasing state, saved the time that erasing processes, and improve the efficiency of test.
In order to solve the problems referred to above, what the invention discloses a kind of nonvolatile storage crosses erasing processing method, comprises the following steps:
Logical block is applied more than in the wordline of all memory element the process voltage of target threshold voltage;
Whether verify the threshold voltage of all memory element be more than or equal to target threshold voltage, if so, then end operation, otherwise, then carry out next step;
All threshold voltages after verification are carried out soft programming operation less than the memory element of target threshold voltage, and returns previous step.
Further, the choosing method of described process voltage is:
Determine target threshold voltage and overdrive voltage;
The value of described process voltage is target threshold voltage and overdrive voltage sum.
Further, the value of described target threshold voltage is the minima normally wiping state lower threshold voltages scope.
Further, the span of described target threshold voltage is 0.5V-1V.
Further, whether the threshold voltage of all memory element of described verification comprises the following steps be more than or equal to target threshold voltage:
Selecting a reference memory unit, the threshold voltage of described reference memory unit is target threshold voltage, and applies a reference voltage to the wordline of this memory element, it is thus achieved that predetermined reference current;
Apply a positive voltage to the wordline of each memory element to be verified, draw the measurement electric current in this memory element to be verified;
Comparison reference electric current and each measurement electric current, if measuring electric current more than reference current, then the threshold voltage of memory element is less than target threshold voltage, otherwise, then be more than or equal to target threshold voltage.
Further, described predetermined reference current is determined according to the size of logical block, and logical block is more big, and predetermined reference current is more big.
Further, the span of described predetermined reference current is 10 μ A-20 μ A.
Further, the target threshold voltage that value is this memory element to be verified of the positive voltage applied to the wordline of memory element to be verified and overdrive voltage sum.
Further, described overdrive voltage and described target threshold voltage sum are not more than the upper limit of threshold voltage when described memorizer is in normal erasing state.
Further, the span of described overdrive voltage is between 0.1V to 0.3V.
Further, whether the threshold voltage of all memory element of described verification also includes be more than or equal to target threshold voltage: when applying a positive voltage to the wordline of memory element to be verified, gives and one negative voltage of applying in the wordline of other memory element on the described same bit line of memory element to be verified.
In order to solve the problems referred to above, the invention also discloses the erasing of crossing of nonvolatile storage and process system, including:
Voltage applies module, and the wordline of memory element all in logical block is applied more than the process voltage of target threshold voltage;
Whether correction verification module, be used for the threshold voltage verifying each memory element after overvoltage applies be more than or equal to target threshold voltage;
Soft programming module, for carrying out soft programming operation to threshold voltage less than the memory element of target threshold voltage.
Further, described correction verification module includes:
Voltage applies submodule, and reference memory unit and each memory element are applied voltage;
Current measurement submodule, measures the reference current of reference memory unit and the measurement electric current of each memory element;
Comparison sub-module, compares the measurement electric current of the reference current produced in reference memory unit and each memory element;If measuring electric current more than reference current, then the threshold voltage of memory element is less than target threshold voltage, otherwise, then be more than or equal to target threshold voltage.
Compared with prior art, the invention have the advantages that
Crossing of the nonvolatile storage of the present invention wipes processing method and process system by the mode by all memory element in logical block are applied more than target threshold voltage simultaneously, it is possible to make major part memory element quickly return to normal erasing state.Then remaining threshold voltage is carried out soft programming operation less than the memory element of target threshold voltage simultaneously, until all of memory element all returns to normal erasing state.In processing procedure, it is possible to multiple memory element are operated, it is not necessary to operate one by one according to access unit address, therefore saved the process time of erasing, thus improve the efficiency of test simultaneously.
Further, verify all memory element threshold voltage whether be more than or equal in target threshold voltage, for the wordline of memory element to be verified applying positive voltage simultaneously to the wordline of the remaining memory cell on same bit line applies negative voltage, the accuracy that can avoid producing leakage current on bit line and affect measurement electric current, improves the accuracy of checking procedure.
Accompanying drawing explanation
Fig. 1 is the flow chart crossing erasing processing method embodiment of a kind of nonvolatile storage of the present invention;
Fig. 2 is the flow chart of the embodiment of the method one of the threshold voltage of the verification memory element crossed in erasing processing method embodiment of a kind of nonvolatile storage of the present invention;
Fig. 3 is the flow chart of the embodiment of the method two of the threshold voltage of the verification memory element crossed in erasing processing method embodiment of a kind of nonvolatile storage of the present invention;
The erasing of crossing that Fig. 4 is a kind of nonvolatile storage of the present invention processes the structural representation of system embodiment one;
The erasing of crossing that Fig. 5 is a kind of nonvolatile storage of the present invention processes the structural representation of system embodiment two.
Detailed description of the invention
Understandable for enabling the above-mentioned purpose of the present invention, feature and advantage to become apparent from, below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation.
For making those skilled in the art be more fully understood that the present invention, simply introduce the principle of compositionality of nonvolatile storage below.
Nonvolatile storage is made up of memory element (cell), and cell includes electric capacity and transistor, and the data in cell depend on the electric charge being stored in electric capacity, the access of the switch control data of transistor.It is said that in general, a cell can include source electrode (source, S), draining (drain, D), grid (gate, G), and floating grid (floatinggate, FG), floating grid FG can be used for meeting voltage VG.If VG is positive voltage, between floating grid FG and drain D, produce tunnel-effect, make electronics inject floating grid FG, be namely programmed into;Erasing then at substrate making alive (positive voltage or negative voltage), can utilize the tunnel-effect between floating grid FG and source S, and the electric charge (negative charge or positive charge) being injected into floating grid FG is attracted to substrate.Cell data are 0 or 1 to depend on whether having electronics in floating grid FG.If floating grid FG has electronics, between source S and drain D, induce positive conducting channel, make metal-oxide-semiconductor turn on, namely represent and be stored in 0.If without electronics in floating grid FG, being then formed without conducting channel, metal-oxide-semiconductor is not turned on, and is namely stored in 1.
With reference to Fig. 1, it is shown that the erasing processing method embodiment one excessively of a kind of nonvolatile storage of the present invention, comprise the following steps:
Step 101, is applied more than the process voltage of target threshold voltage in logical block in the wordline (wordline, WL) of all memory element.
By the wordline of memory element all in logical block is applied more than the process voltage of target threshold voltage, the threshold voltage of memory element can be promoted, operation simultaneously can shorten the overall time crossing erasing process of a logical block, thus improving the efficiency that erasing processes.
Wherein, process voltage be sized to target threshold voltage and overdrive voltage sum is determined.Target threshold voltage is meet the normal minima wiping state lower threshold voltages scope in a technological process.Such as, meet, to " more than 0.5V ", the threshold voltage size normally wiped by belonging to the adjusting thresholds of " less than 0 or near 0 near " of erasing category.Then this 0.5V is target threshold voltage.The span of target threshold voltage is between 0.5V-1V under normal circumstances.Overdrive voltage is the value arranged to improve the effect of erasing, is that more memory element is in normal erasing state in order to make to apply after step through overvoltage.Because the threshold voltage of memory element needs in a span interval, this memory element just belongs to the memory element being in normal condition, therefore, the value of overdrive voltage can not be too big, memory element after voltage otherwise can be made to apply is well over the scope that threshold voltage allows, so overdrive voltage and target threshold voltage sum should be in the upper limit of threshold voltage during normal erasing state less than memorizer.Equally, the value of overdrive voltage can not be too little, if too little, when voltage applies, role is less, it is necessary to more pulse just can make memory element return to normal erasing state.So, in general processing procedure, the value of overdrive voltage is between 0.1V to 0.3V.
Whether step 102, verify the threshold voltage of all memory element be more than or equal to target threshold voltage, if so, then end operation, otherwise, then carry out step 103.
Need to carry out verification operation, to judge whether the memory element after overvoltage applies returns to normal erasing state after voltage applies.If after verification, all of memory element all returns to normal erasing state, namely threshold voltage both is greater than or equal to target threshold voltage, then just illustrating that erasing processed and be complete, this test is over, it is possible to carried out other operations after erasing processes.If also having the threshold voltage of partial memory cell less than target threshold voltage, then illustrated that erasing processed and also do not complete, it is necessary to carried out subsequent operation.
All threshold voltages after verification are carried out soft programming operation less than the memory element of target threshold voltage, and return previous step by step 103.
Because after the operation of step 101, major part memory element can return to normal erasing state, memory element also in erasing state excessively is sub-fraction, and the threshold voltage of the memory element of this part have also been obtained suitable lifting, so, at this moment remaining memory element is carried out soft programming operation, these memory element just can be made to return to normal erasing state.Wherein, soft programming operation carries out based on bit line (bitline, BL), it is not necessary to carry out one by one according to access unit address, such that it is able to shorten the time of soft programming operation, improves efficiency.After carrying out a soft programming operation, it is possible to also have partial memory cell and be in erasing state, after verification, just can again carry out soft programming operation, so repeat, until all of memory element returns to normal erasing state.
With reference to Fig. 2, the threshold voltage V of aforesaid verification memory elementTWhether can adopt following steps be more than or equal to target threshold voltage:
D1, selects a reference memory unit, and the threshold voltage of described reference memory unit is target threshold voltage, and applies a reference voltage to the wordline of this memory element, it is thus achieved that predetermined reference current.
D2, applies a positive voltage to the wordline of each memory element to be verified, draws the measurement electric current in this memory element to be verified, and wherein, the value of this positive voltage is target threshold voltage and the overdrive voltage sum of memory element to be verified.
D3, comparison reference electric current and measurement electric current, if measuring electric current more than reference current, then the threshold voltage of memory element is less than target threshold voltage, otherwise, then be more than or equal to target threshold voltage.
Wherein, the reference voltage of the wordline of reference memory unit can be determined according to the threshold voltage of required reference current and reference memory unit.Under normal circumstances, required reference current value is determined according to the size of the logical block of required test, and logical block is more big, and required reference current is also more big, otherwise, then more little.For the logical block of normal size, required reference current value is typically between 10 μ A-20 μ A.For general reference memory unit, when the difference of the reference voltage of applying and the threshold voltage of reference memory unit is between 0V~3V, usually obtain such reference current.Such as, if the threshold voltage of reference memory unit is 1V, predetermined reference current is 10 μ A, if for current reference memory unit, reference voltage is set to 3V and can obtain the electric current of 10 μ A, then reference voltage is then set to 3V.It addition, in order to protect each element on memorizer, reference voltage takes less value as far as possible.Such as, 3V or 4V.The determination of overdrive voltage is identical with the defining method of the overdrive voltage in preceding method, is also generally take between 0.1V to 0.3V.
Below in conjunction with the example threshold voltage V to aforesaid verification memory elementTWhether it is described in detail be more than or equal to target threshold voltage.
Hypothetical target threshold voltage is 0.5V, then the threshold voltage of reference memory unit is also 0.5V.After overvoltage applies, still there is the threshold voltage V of the memory element of partTLess than target threshold voltage, and the threshold voltage V of this partTDistribution between-0.8V~0.2V.
So, in the process of verification, predetermined reference current is 10 μ A, and the electric current produced in this memory element to be verified when this predetermined reference current is driving voltage with the positive voltage that the wordline of memory element to be verified is applied with the difference of the threshold voltage of memory element to be verified is identical.By calculating, the reference voltage now applied is that 2V can be obtained by predetermined reference current, then just can apply the reference voltage of 2V to reference memory unit..
As it was previously stated, apply the positive voltage of target threshold voltage and overdrive voltage sum, the i.e. positive voltage of 0.6~0.8V in the wordline of memory element to be verified.It is assumed that overdrive voltage is 0.2V, then added positive voltage is 0.7V, if the threshold voltage V of now this memory element to be verifiedTLess than target threshold voltage, then being applied to the voltage difference between the threshold voltage of the voltage in the wordline of this memory element to be verified and this memory element to be verified can more than overdrive voltage.So, if voltage difference is more than overdrive voltage, then the measurement electric current in the wordline of memory element now to be verified can more than reference current, therefore, now can be determined that the threshold voltage of this memory element to be verified is less than target threshold voltage 0.5V, now existed erasing.Otherwise, then may determine that the threshold voltage of this memory element to be verified is be more than or equal to target threshold voltage.
With reference to Fig. 3, further, above-mentioned steps D2 can also give and one negative voltage of applying in other the memory element wordline on the same bit line of memory element.In other memory element wordline, applying negative voltage can ensure that and will not produce leakage current on bit line, it is to avoid the measurement electric current in memory element is produced impact, it is ensured that the accuracy measuring electric current of memory element.This negative voltage can also according to remaining threshold voltage VTThreshold voltage V less than the memory element of target threshold voltageTDistribution determine.In order to ensure effectiveness, the negative voltage being commonly applied equals to or less than remaining threshold voltage VTMinima.Such as, if minimum threshold voltage VT=-1V, then the negative voltage applied can be-1V, it is also possible to less than-1V.
With reference to Fig. 4, it is shown that the erasing of crossing of a kind of nonvolatile storage of the present invention processes system 100, applies module 10, correction verification module 30 and soft programming module 50 including voltage.
Voltage applies module 10, and the wordline of memory element all in logical block is applied more than the process voltage of target threshold voltage.It is thus desirable to apply the wordline of all memory element to process voltage simultaneously, therefore voltage is applied module 10 and can be realized the applying of voltage to all memory element by the mode that processor controls.
Whether correction verification module 30, be used for the threshold voltage verifying each memory element after overvoltage applies be more than or equal to target threshold voltage.
Soft programming module 50, for carrying out soft programming operation for threshold voltage less than the memory element of target threshold voltage, improve the threshold voltage of memory element by applying the positive voltage of certain time in the memory element that there is erasing, make memory element return to normal erasing state.
With reference to Fig. 5, further, this correction verification module 30 also includes voltage and applies submodule 31, current measurement submodule 32 and comparison sub-module 33.
First pass through voltage applying submodule 31 and apply certain reference voltage to the memory element of a reference, apply the positive voltage of a target threshold voltage and overdrive voltage sum less than the memory element of target threshold voltage then to threshold voltage.Multiple voltage wherein can be adopted to apply submodule 31, and the position of each voltage to be applied arranges a voltage and applies submodule 31, to facilitate, required voltage is adjusted.
Current measurement submodule 32 is for measuring the reference current of reference memory unit and the measurement electric current of each memory element, and the result of measurement is passed to comparison module 33.
The reference current of generation in reference memory unit and the measurement electric current of each memory element are compared by comparison sub-module 33, if measuring electric current more than reference current, then illustrate that the threshold voltage of memory element is less than target threshold voltage, otherwise, then be more than or equal to target threshold voltage.In the present embodiment, comparison sub-module 33 can be SenseAmplifier (sense amplifier) circuit, by SenseAmplifier circuit, the reference current measuring electric current and reference unit of memory element is compared, then comparative result is exported, such as " 1 " (represent and measure electric current less than reference current) or " 0 " (represent and measure electric current more than reference current).
Each embodiment in this specification all adopts the mode gone forward one by one to describe, and what each embodiment stressed is the difference with other embodiments, between each embodiment identical similar part mutually referring to.For system embodiment, due to itself and embodiment of the method basic simlarity, so what describe is fairly simple, relevant part illustrates referring to the part of embodiment of the method.
Above erasing processing method and the process system excessively of a kind of nonvolatile storage provided by the present invention is described in detail, principles of the invention and embodiment are set forth by specific case used herein, and the explanation of above example is only intended to help to understand method and the core concept thereof of the present invention;Simultaneously for one of ordinary skill in the art, according to the thought of the present invention, all will change in specific embodiments and applications, in sum, this specification content should not be construed as limitation of the present invention.

Claims (9)

1. an erasing processing method excessively for nonvolatile storage, comprises the following steps:
Logical block is applied more than in the wordline of all memory element the process voltage of target threshold voltage;
Whether verify the threshold voltage of all memory element be more than or equal to target threshold voltage, if so, then end operation, otherwise, then carry out next step;Whether the threshold voltage of all memory element of described verification includes be more than or equal to target threshold voltage: applies a positive voltage to the wordline of each memory element to be verified, draws the measurement electric current in this memory element to be verified;When applying a positive voltage to the wordline of memory element to be verified, give and one negative voltage of applying in the wordline of other memory element on the described same bit line of memory element to be verified;Negative voltage is determined less than the distribution of the threshold voltage of the memory element of target threshold voltage according to remaining threshold voltage, and negative voltage is equal to or less than the minima of remaining threshold voltage;
All threshold voltages after verification are carried out soft programming operation less than the memory element of target threshold voltage, and returns previous step;
Wherein, the span of described target threshold voltage is 0.5V-1V, does not include 1V;The choosing method of described process voltage is:
Determine target threshold voltage and overdrive voltage;
The value of described process voltage is target threshold voltage and overdrive voltage sum.
2. the method for claim 1, it is characterised in that whether the threshold voltage of all memory element of described verification is further comprising the steps of be more than or equal to target threshold voltage:
Selecting a reference memory unit, the threshold voltage of described reference memory unit is target threshold voltage, and applies a reference voltage to the wordline of this reference memory unit, it is thus achieved that predetermined reference current;
Comparison reference electric current and each measurement electric current, if measuring electric current more than reference current, then the threshold voltage of memory element is less than target threshold voltage, otherwise, then be more than or equal to target threshold voltage.
3. method as claimed in claim 2, it is characterised in that described predetermined reference current is determined according to the size of logical block, and logical block is more big, and predetermined reference current is more big.
4. method as claimed in claim 3, it is characterised in that the span of described predetermined reference current is 10 μ A-20 μ A.
5. the method for claim 1, it is characterised in that the target threshold voltage that value is this memory element to be verified of the positive voltage applied to the wordline of memory element to be verified and overdrive voltage sum.
6. the method as described in claim 1 or 5, it is characterised in that described overdrive voltage and described target threshold voltage sum are not more than described memorizer and are in the upper limit of threshold voltage when normally wiping state.
7. method as claimed in claim 6, it is characterised in that the span of described overdrive voltage is between 0.1V to 0.3V.
8. the erasing of crossing of a nonvolatile storage processes system, it is characterised in that including:
Voltage applies module, and the wordline of memory element all in logical block is applied more than the process voltage of target threshold voltage;
Whether correction verification module, be used for the threshold voltage verifying each memory element after overvoltage applies be more than or equal to target threshold voltage;The wordline specifically giving each memory element to be verified applies a positive voltage, draws the measurement electric current in this memory element to be verified;When applying a positive voltage to the wordline of memory element to be verified, give and one negative voltage of applying in the wordline of other memory element on the described same bit line of memory element to be verified;Negative voltage is determined less than the distribution of the threshold voltage of the memory element of target threshold voltage according to remaining threshold voltage, and negative voltage is equal to or less than the minima of remaining threshold voltage;
Soft programming module, for carrying out soft programming operation to threshold voltage less than the memory element of target threshold voltage;
Wherein, the span of described target threshold voltage is 0.5V-1V, does not include 1V;
Described process voltage is chosen in the following manner: determine target threshold voltage and overdrive voltage;The value of described process voltage is target threshold voltage and overdrive voltage sum.
9. system as claimed in claim 8, it is characterised in that described correction verification module includes:
Voltage applies submodule, and reference memory unit and each memory element are applied voltage;
Current measurement submodule, measures the reference current of reference memory unit and the measurement electric current of each memory element;
Comparison sub-module, compares the measurement electric current of the reference current produced in reference memory unit and each memory element;If measuring electric current more than reference current, then the threshold voltage of memory element is less than target threshold voltage, otherwise, then be more than or equal to target threshold voltage.
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Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104376872B (en) * 2013-08-16 2018-07-06 北京兆易创新科技股份有限公司 A kind of processing method interrupted to flash memory erasing
CN104751897B (en) * 2013-12-26 2018-02-06 北京兆易创新科技股份有限公司 A kind of programmed method of nonvolatile memory
CN103854700B (en) * 2014-02-28 2018-05-01 北京兆易创新科技股份有限公司 The method for deleting and device of a kind of nonvolatile memory
KR20160116913A (en) * 2015-03-31 2016-10-10 에스케이하이닉스 주식회사 Semiconductor memory device outputting status fail signal and method of operating thereof
CN108074614B (en) * 2016-11-11 2020-12-08 北京兆易创新科技股份有限公司 Method and device for improving NOR type FLASH stability
US10049750B2 (en) * 2016-11-14 2018-08-14 Micron Technology, Inc. Methods including establishing a negative body potential in a memory cell
KR20190020880A (en) * 2017-08-21 2019-03-05 에스케이하이닉스 주식회사 Memory device and operating method thereof
US10249378B1 (en) * 2017-11-09 2019-04-02 Winbond Electronics Corp. Flash memory device and method for recovering over-erased memory cells
CN110619915B (en) * 2018-06-20 2023-11-03 芯天下技术股份有限公司 Over-erasure processing method and device for novel nonvolatile memory
CN109346120B (en) * 2018-10-09 2021-04-23 深圳市江波龙电子股份有限公司 Method, device and system for testing and adjusting reference current of memory
CN110514927B (en) * 2019-08-16 2022-04-22 惠州Tcl移动通信有限公司 Device abnormality detection method for mobile terminal, and computer-readable medium

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5600593A (en) * 1994-12-06 1997-02-04 National Semiconductor Corporation Apparatus and method for reducing erased threshold voltage distribution in flash memory arrays
US5742541A (en) * 1995-03-24 1998-04-21 Sharp Kabushiki Kaisha Writing method for nonvolatile semiconductor memory with soft-write repair for over-erased cells
US6011722A (en) * 1998-10-13 2000-01-04 Lucent Technologies Inc. Method for erasing and programming memory devices
CN1691207A (en) * 2004-04-30 2005-11-02 晶豪科技股份有限公司 Circuit and method for preventing non-volatile memory from over-erasing
CN101241760A (en) * 2006-12-19 2008-08-13 三星电子株式会社 Flash memory device and method of erasing flash memory device
CN101438352A (en) * 2006-04-05 2009-05-20 斯班逊有限公司 Flash memory programming and verification with reduced leakage current

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5600593A (en) * 1994-12-06 1997-02-04 National Semiconductor Corporation Apparatus and method for reducing erased threshold voltage distribution in flash memory arrays
US5742541A (en) * 1995-03-24 1998-04-21 Sharp Kabushiki Kaisha Writing method for nonvolatile semiconductor memory with soft-write repair for over-erased cells
US6011722A (en) * 1998-10-13 2000-01-04 Lucent Technologies Inc. Method for erasing and programming memory devices
CN1691207A (en) * 2004-04-30 2005-11-02 晶豪科技股份有限公司 Circuit and method for preventing non-volatile memory from over-erasing
CN101438352A (en) * 2006-04-05 2009-05-20 斯班逊有限公司 Flash memory programming and verification with reduced leakage current
CN101241760A (en) * 2006-12-19 2008-08-13 三星电子株式会社 Flash memory device and method of erasing flash memory device

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