CN103579012A - Method for producing AAQFN packaging piece provided with solder ball face - Google Patents
Method for producing AAQFN packaging piece provided with solder ball face Download PDFInfo
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- CN103579012A CN103579012A CN201310508832.XA CN201310508832A CN103579012A CN 103579012 A CN103579012 A CN 103579012A CN 201310508832 A CN201310508832 A CN 201310508832A CN 103579012 A CN103579012 A CN 103579012A
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- passivation layer
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- groove
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
Disclosed is a method for producing an AAQFN packaging piece provided with a solder ball face. The method comprises the steps that thinning and scribing are conducted on a wafer provided with salient points; a bare copper frame is coated with photoresist; second grooves are formed in the bare copper frame; a first passivation layer is coated and a UBM1 window is etched out on the first passivation layer at the bottoms of the second grooves; high-frequency sputtering is conducted on a composite metal layer; chip salient points are made to enter the second grooves to be connected with the UBM1 layer; solidification is conducted after plastic packaging; the back face of the frame is grinded, a second passivation layer is coated and the grooves are etched; a third passivation layer is coated; second pattern grooves are etched; sputtering is conducted on a first metal layer and fourth grooves are etched out; the surface of the third passivation layer is coated with a fourth passivation layer, fifth grooves are etched out, and even sputtering is conducted inside the fifth grooves to form a UBM2 layer; soldering, printing, cutting separating and testing are conducted to obtain the AAQFN packaging piece provided with the solder ball face. The production method can replace CPS for substrate production, realizes flexible application of IC chips in CPS packaging of lead frames, reduces the thickness of the frame and meets the requirements for thin packaging.
Description
Technical field
The invention belongs to electronic information Element of automatic control technical field, relate to a kind of AAQFN packaging part production method, be specifically related to a kind of tape welding spherical array flat-four-side without pin (AAQFN) packaging part production method.
Background technology
For a long time, be subject to the restriction of etching template and etch process technology, conventional QFN product is continuing individual pen (1 circle) the lead frame pattern of the exploitation nineties in 20th century always.Owing to being limited in individual pen encapsulation, therefore pins of products is few, and I/O is few, can not meet the demand of high density, many I/O encapsulation.Nearly 2 years domestic has started to research and develop multi-turn QFN, but because framework manufacturing process difficulty is larger, only has indivedual international vendors can design, produce, and be subject to the restriction of associated companies patent, and pin is less relatively, and the R&D cycle is long.Therefore, although compare, adopt substrate production soldered ball as the BGA encapsulation of output, lead frame multi-turn QFN packaging efficiency is high, and cost is relatively low, use encapsulation flexibly, but multi-turn QFN is limited to lead frame manufacturer, can not meet the requirement of the flexible Application of short, flat, fast and different chips.
Summary of the invention
The object of this invention is to provide a kind of tape welding spherical array flat-four-side pin-less packaging part production method, break away from the restriction of lead frame manufacturer, produce and meet the packaging part that short, flat, fast and different chip flexible Application require.
For achieving the above object, the technical solution adopted in the present invention is: a kind of tape welding spherical array flat-four-side pin-less packaging part production method, specifically carry out according to the following steps:
Step 1: the wafer of attenuate band salient point, scribing, forms IC chip;
Surface uniform at bare copper frame applies photoresist, forms photoresist layer, then at the temperature of 60 ℃～70 ℃, toasts 25 ± 5 minutes;
Step 2: photoresist layer is aimed to exposure, and then development, photographic fixing, removes the photoresist of exposure area, makes to form a plurality of the first grooves side by side on photoresist layer, and the bare copper frame of each first groove position exposes, afterwards post bake;
Step 3: the bare copper frame part of exposing under spray corrosion the first groove, make a plurality of the second grooves side by side of the positive formation of bare copper frame, between adjacent two second grooves, there is partition wall, then remove remaining photoresist layer;
Step 4: the surface uniform at bare copper frame surface and all the second grooves applies the first passivation layer, then etches UBM on the first passivation layer of all the second bottom portion of groove
1window;
Step 5: adopt high-frequency sputtering at all UBM
1in window and the first passivation layer surface high-frequency sputtering copper metal layer of the second groove surfaces, the two ends of copper metal layer lay respectively on first passivation layer on bare copper frame surface, then at copper metal layer surface high frequency sputter nickel metal layer, then at nickel metal layer surface high frequency sputter gold metal layer; Copper metal layer, nickel metal layer and gold metal layer form UBM
1layer; By photoetching, etching step, remove unnecessary metal level, the UBM1 layer forming in adjacent two the second grooves is not contacted, obtain semi-finished product lead frame;
Step 6: get the IC chip that step 1 makes, on the semi-finished product lead frame of step 5, make chip bump enter in the second groove and and UBM in core in this IC flip-chip
1layer bottom is connected, and then with lower filler, fills space and chip bump and the UBM between adjacent chip bump
1space between layer;
Step 7: plastic packaging and rear solidifying;
Step 8: grinding, by the semi-finished product lead frame back side after plastic packaging and rear solidifying, is cleaned, dried;
Step 9: bare copper frame backside coating the second passivation layer after grinding; Then expose, development, photographic fixing, then on the second passivation layer, etch the first pattern groove, each partition wall is a corresponding first pattern groove at the lead frame back side;
Step 10: the first pattern groove is carried out to etching again, form the 3rd groove communicating with partition wall;
Step 11: apply the 3rd passivation layer, the 3rd passivation layer not only covers the back side of semi-finished product lead frame, and fill up this all groove in semi-finished product lead frame back side; Then on the 3rd passivation layer, etch the second pattern groove, the position at the second pattern groove place is position, pin bottom surface and the place that needs copper cash framework to expose;
Step 12: the 3rd passivation layer surface is at sputter the first metal layer, and the first metal layer is also full of all second graph grooves simultaneously, then etches the 4th groove on the first metal layer;
Step 13: apply the 4th passivation layer in the 3rd passivation layer surface, and make the 4th passivation layer be full of the 4th all grooves, then etch the 5th groove on the 4th passivation layer;
Step 14: equal sputter multiple layer metal in the 5th all grooves, forms UBM
2layer;
Step 15: reflow soldering tin ball and UBM
2layer, cleans;
Step 16: adopt that existing technique prints, cutting and separating and test, obtain tape welding spherical array flat-four-side pin-less packaging part.
Production method of the present invention can substitute the CPS of substrate production, realizes IC chip flexible Application in the CSP of lead frame encapsulation; Its production cost and construction cycle, far below substrate package, there is larger advantage.Break away from the restriction of lead frame manufacturer, produce the packaging part that short, flat, fast and different chip flexible Application require, reduce the thickness of framework, meet thin encapsulation requirement.
Accompanying drawing explanation
Fig. 1 applies the generalized section of photoresist on bare copper frame in production method of the present invention.
Fig. 2 is the generalized section that in production method of the present invention, exposure imaging is made pattern post bake.
Fig. 3 etches the generalized section of groove on bare copper frame in production method of the present invention.
Fig. 4 is the generalized section that applies the first passivation layer in production method of the present invention and carve UBM1 window on bare copper frame.
Fig. 5 be in production method of the present invention in groove high-frequency sputtering multiple layer metal form the generalized section of UBM1 layer.
Fig. 6 is the large figure of P prescription in Fig. 5.
Fig. 7 is the generalized section of core and lower filling in upside-down mounting in production method of the present invention.
Fig. 8 is plastic packaging and rear curing generalized section in production method of the present invention.
Fig. 9 applies the generalized section after the second passivation layer etching in production method of the present invention.
Figure 10 is that in production method of the present invention, lead frame back-etching goes out the 3rd groove and removes the generalized section of the second passivation layer.
Figure 11 is the generalized section that applies the 3rd passivation layer etching the 4th groove in production method of the present invention.
Figure 12 is in the generalized section of the 3rd passivation layer surface metal cladding etching the 4th groove in production method of the present invention.
Figure 13 is the generalized section that applies the 4th passivation layer etching the 5th groove in production method of the present invention.
Figure 14 is the generalized section that in production method of the present invention, sputter multiple layer metal in bottom forms UBM2 layer;
Figure 15 plants the generalized section after ball, Reflow Soldering in production method of the present invention.
In figure: 1. bare copper frame, 2. photoresist layer, 3. the first groove, 4. the second groove, 5. partition wall, 6. the first passivation layer, 7.UBM
1window, 8.UBM
1layer, 9.IC chip, 10. chip bump, 11. times fillers, 12. scolders, 13. plastic-sealed bodies, 14. second passivation layers, 15. first pattern grooves, 16. the 3rd grooves, 17. the 3rd passivation layers, 18. second pattern grooves, 19. the first metal layers, 20. the 4th grooves, 21. the 4th passivation layers, 22. the 5th grooves, 23.UBM
2layer, 24. tin balls, a.Cu metal level, b.Ni metal level, c.Au metal level.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail.
The flow process of this production method is as follows:
Bare copper frame gluing → exposure imaging post bake → etching the second groove → apply the first passivation layer and carve UBM
1window → high-frequency sputtering multiple layer metal forms UBM
1core and lower filling → plastic packaging and rear solidify → framework back side grinding in layer → upside-down mounting → apply the second passivation layer etching first pattern groove → lead frame bottom surface etching the 3rd groove → apply the 3rd passivation layer etching second pattern groove → high-frequency sputtering the first metal layer etching the 4th groove → apply the 4th passivation layer sputter multiple layer metal in etching five groove → bottom forms UBM
2layer → plant ball.
The production method of the face array flat-four-side pin-less packaging part with soldered ball provided by the invention, specifically carry out according to the following steps:
Step 1: wafer reduction scribing, apply photoresist on bare copper frame
Use the attenuate machine of 8 inch～12 inch, adopt corase grind, the thin anti-warpage technique of fine-grinding and polishing, the wafer with salient point is thinned to 200～250 μ m, corase grind speed 6 μ m/s, fine grinding speed 1.0 μ m/s; Adopt A-WD-300TXB scribing machine to carry out scribing, scribing feed velocity≤10mm/s; Form IC chip 9;
Adopt sol evenning machine or coating machine, in the front of bare copper frame 1, evenly apply the photoresist that a layer thickness is at least 10 μ m (positive negativity all can), form photoresist layer 2, as shown in Figure 1, then at the temperature of 60 ℃～70 ℃, toast 25 ± 5 minutes;
Step 2: exposure imaging post bake
On exposure machine, to applying the bare copper frame 1 of photoresist, aim at exposure, then development, photographic fixing, remove the photoresist of exposure area, make to form on photoresist layer 2 a plurality of the first grooves 3 side by side, the bare copper frame 1 of each first groove 3 positions exposes, bare copper frame 1 region of exposing demonstrates pattern, post bake 30 ± 5 seconds at the temperature of 120 ℃ ± 5 ℃ afterwards, as shown in Figure 2;
Step 3: etching the second groove
Bare copper frame after post bake 1 is placed in to etching, cleans on all-in-one, make photoresist layer 2 upwards, spray corrosive liquid (acid or alkalescence) downwards, in bare copper frame 1 front-side etch of exposing, go out the figure of needs, at a plurality of the second grooves 4 side by side of bare copper frame 1 positive formation, between adjacent two second grooves 4, there is partition wall 5, then remove remaining photoresist layer 2, as shown in Figure 3;
Step 4: apply the first passivation layer and etching UBM
1window
Adopt coating machine, apply the first passivation layer 6 etching bare copper frame 1 surface of figure and the surface uniform of all the second grooves 4, then on the first passivation layer 6 of the bottom of all the second grooves 4, etch UBM
1window 7, as Fig. 4;
Step 5: growth UBM
1layer
Adopt high-frequency sputtering method at all UBM
1in window 7 and the first passivation layer 6 surface high frequency sputter copper metal layer a on the second groove 4 surfaces, the two ends of copper metal layer a lay respectively on first passivation layer 6 on bare copper frame 1 surface, then at copper metal layer a surface high frequency sputter nickel metal layer b, then at nickel metal layer b surface high frequency sputter gold metal layer c; Copper metal layer a, nickel metal layer b and gold metal layer c form UBM
1layer 8, UBM
1layer 8 is high-frequency sputtering Cu-Ni-Au layer; By photoetching, etching step, remove unnecessary metal level, make the UBM of adjacent two the second groove 4 interior formation
1layer 8 does not contact, and obtains semi-finished product lead frame, as shown in Figure 5 and Figure 6;
Step 6: core and lower filling in upside-down mounting
Get the IC chip 9 that step 1 makes, first on chip bump 10, be stained with scolder 12, adopt upside-down mounting chip feeder, by core in these IC chip 9 upside-down mountings on the semi-finished product lead frame of step 5, chip bump 10 is entered in the second groove 4 and with the UBM of the second groove 4 bottoms
1layer 8 is connected, the space and chip bump 10 and the UBM that then with lower filler 11, fill between the interior chip bump 10 of the second groove 4
1the space of layer between 8, lower filler 11 plays insulating effect, makes to insulate between salient point on IC chip 9 and salient point, as Fig. 7;
Core and lower fill process in upside-down mounting: on special-purpose upside-down mounting chip feeder, first chip is overturn, be stained with after scolder, auto-alignment is placed into UBM(metalization under bump corresponding on the bare copper frame 1 of core in upside-down mounting, under salient point, metallize) position, on whole piece framework, after complete chip, income is transmitted box automatically, and in flip-chip, the semi-finished product lead frame after core transmits box and delivers to Reflow Soldering operation by the gross.Passing through DOE (Design of Experiment, EXPERIMENTAL DESIGN) test under definite thermal reflow profile, by UBM corresponding on tin salient point, scolder and lead frame on chip by Reflow Soldering hot melt, UBM on chip and lead frame is firmly welded together, directly substituted traditional upper core and bond technology.
By DOE (Design of Experiment, EXPERIMENTAL DESIGN) test, choose suitable lower inserts (less filler), lower filling mould has Incision Machine's.Under vacuum suction, lower inserts can be filled the space between chip bump and salient point fully completely, do not have cavity, prevent that soldered ball is shifted at high temperature.
Step 7: plastic packaging and rear solidifying
Use full-automatic sealing machine, adopt low stress (a
1≤ 1) the semi-finished product lead frame of the environment-friendly type plastic packaging material that meets the Weee of European Union, ROHS standard and SoNY standard of, low moisture absorption (water absorption rate <0.25%) after to core in step 6 upside-down mounting carries out plastic packaging, at the positive plastic-sealed body 13 that forms of bare copper frame 1, IC chip 9 and bare copper frame 1 front are all packaged in plastic-sealed body 13, as shown in Figure 8, then by general anti-absciss layer technique, carry out rear solidifying;
Step 8: the grinding bare copper frame back side
On equipment for grinding, to the semi-finished product lead frame back side after solidifying after plastic packaging, grinding is carried out at the back side of bare copper frame 1, and grinding thickness 0.03mm～0.035mm, then cleans, dries;
Step 9: apply the second passivation layer and etch the first pattern groove
Adopt and apply exposure all-in-one, bare copper frame 1 backside coating the second passivation layer 14 after grinding; Then on mask aligner, expose, development, photographic fixing, on the second passivation layer 14, etch again the first pattern groove 15, the correspondence position of each partition wall 5 on the second passivation layer 14 all has a first pattern groove 15, i.e. the first pattern groove 15 of partition wall 5 correspondences, be positioned at this partition wall 5 under, as shown in Figure 9;
Step 10: framework etching
At the framework back side the second passivation layer 14, etch on the semi-finished product lead frame of the first pattern groove 15 and carry out again etching, remove the metal between partition wall 5 the first pattern groove 15 corresponding with this partition wall 5, form the 3rd groove 16, as shown in figure 10, the 3rd groove 16 communicates with partition wall 5;
Step 11: apply the 3rd passivation layer etching the second pattern groove
On covering and answering a pager's call, not only cover the back side of semi-finished product lead frame to backside coating the 3rd passivation layer 17, the three passivation layers 17 of the semi-finished product lead frame of completing steps 10, fill up again the 3rd all groove 16 of this semi-finished product lead frame back side; Then the position that etches the second pattern groove 18, the second pattern groove 18 places on the 3rd passivation layer 17 is position, pin bottom surface and the place that needs copper cash framework 1 to expose;
Step 12: splash-proofing sputtering metal layer
Semi-finished product lead frame back spatter the first metal layer 19 at completing steps 11, the first metal layer 19 is positioned at the 3rd passivation layer 17 surfaces, and be full of all second graph grooves 18, then on the first metal layer 19, etch the 4th groove 20, as shown in figure 12, the first metal layer 19 is copper metal layer;
Step 13: apply the 4th passivation layer etching the 4th groove
At the 3rd passivation layer 17 surface-coated the 4th passivation layer 21, and make the 4th passivation layer 21 be full of the 4th all grooves 20, then on the 4th passivation layer 21, etching the 5th groove 22(is UBM
2window), as shown in figure 13;
Step 14: form UBM
2
At all interior equal sputter multiple layer metals of the 5th groove 22, this multiple layer metal is filled the 5th all grooves 22, forms UBM
2layer 23, as shown in figure 14;
Step 15: plant ball
By ball attachment machine, the UBM at the semi-finished product lead frame back side of completing steps 14
2on layer 23, brush scolder, then tin ball 24 is placed on and is brushed on scolder, by Reflow Soldering, make tin ball 24 and UBM
2layer 23 strong bonded, clean;
Step 16: printing and the cutting and separating technique that adopts QFN to encapsulate prints, cutting and separating, but need protection tin ball 24 not damage; Adopt the test technology of BGA encapsulation to test separated product, qualified product are the tape welding spherical array flat-four-side pin-less packaging part shown in Figure 15.
The printing of wafer attenuate, scribing and the product of this encapsulation, cutting and separating, test adopt and encapsulate identical equipment and technique with BGA.
The photoetching in chip manufacturing (plate-making, gluing, development, post bake), etching in this production method, have been adopted.Front surface coated passivation layer, etching UBM
1window, high-frequency sputtering multiple layer metal form UBM
1layer.Use band salient point IC chip, adopt core and lower filling in the upside-down mounting in packaging technology, plastic packaging and rear curing process, complete the positive production of packaging part.The framework back side adopts grinding process, and attenuate frame thickness, meets Ultrathin packaging.Continue to adopt passivation and the etch process of chip production, by applying the second passivation layer 14, etching the first pattern groove 15, continue etching the first pattern groove 15, form the 3rd groove 16 that communicates with partition wall 5 and, and remove the second passivation layer 14.Apply the 3rd passivation layer 17 and etch the second pattern groove 18, high-frequency sputtering metallic copper, forms the first metal layer 19, etches the 4th groove 20 on the first metal layer 19, applies the 4th passivation layer 21, etches the 5th groove 22(UBM
2window), high-frequency sputtering metal, at the interior formation of the 5th groove 22 UBM
2layer 23.Adopt the general printing of encapsulation, plant ball reflow soldering process, make tin ball 24 and UBM
2layer 23 strong bonded, make tape welding spherical array flat-four-side pin-less packaging part.Production method of the present invention can substitute the CPS of substrate production, realizes IC chip flexible Application in the CSP of lead frame encapsulation.
Use 8 inch～12 inch attenuate machines, adopt corase grind, the thin anti-warpage technique of fine-grinding and polishing, with the wafer of bump chip, be thinned to 250 μ m, corase grind speed 6 μ m/s, fine grinding speed 1.0 μ m/s; Adopt A-WD-300TXB scribing machine to carry out scribing, scribing feed velocity control≤10mm/s.On sol evenning machine, on a surface of bare copper frame, evenly apply the photoresist of the positivity of a layer thickness 10 μ m, form lithography layer, then at the temperature of 60 ℃, toast 30 minutes; On exposure machine, to applying the bare copper frame of photoresist layer, aim at exposure, then develop, photographic fixing, on bare copper frame, demonstrate pattern, afterwards post bake 35 seconds at the temperature of 115 ℃; On etching, cleaning all-in-one, by downward spray acid etching solution, the figure that goes out to need in bare copper frame front-side etch, at a plurality of the second grooves side by side of the positive formation of bare copper frame, between adjacent two second grooves, there is partition wall, and remove the photoresist layer of bare copper frame surface-coated; In coating machine, in the bare copper frame surface and all the second groove surfaces that etch the second groove, evenly apply the first passivation layer, on the first passivation layer of all the second groove floor, etch UBM
1window; Adopt high-frequency sputtering at UBM
1in window and the first passivation layer surface high-frequency sputtering copper metal layer of the second groove surfaces, the two ends of copper metal layer lay respectively on first passivation layer on bare copper frame surface, then at copper metal layer surface high frequency sputter nickel metal layer, then at nickel metal layer surface high frequency sputter gold metal layer; Copper metal layer, nickel metal layer and gold metal layer form UBM
1layer, UBM
1layer is high-frequency sputtering Cu-Ni-Au layer; By photoetching, etching, remove unnecessary metal level, make the UBM forming in adjacent two the second grooves
1layer does not contact, and obtains semi-finished product lead frame; Employing upside-down mounting chip feeder, the IC chip with salient point that uses scribing to obtain, is first stained with scolder at chip bump, and then core lower filling in upside-down mounting on this semi-finished product lead frame, makes chip bump and UBM
1layer bottom is connected, and insulation between making between chip bump and chip bump by lower filler; Use full-automatic sealing machine, adopt low stress (a
1≤ 1), the environment-friendly type plastic packaging material that meets the Weee of European Union, ROHS standard and SoNY standard of low moisture absorption (water absorption rate <0.25%), the semi-finished product lead frame after core in upside-down mounting is carried out to plastic packaging, after plastic packaging, by general anti-absciss layer technique, carry out rear solidifying; Rear curing semi-finished product lead frame back side grinding is removed to 0.03mm, clean, dry; Adopt and apply exposure all-in-one, the semi-finished product lead frame back side after grinding, apply second layer passivation layer, expose, development, photographic fixing, on the second passivation layer, etch again the first pattern groove, each partition wall is a corresponding first pattern groove at the lead frame back side, i.e. the first pattern groove of partition wall 5 correspondences, be positioned at this partition wall 5 under; Continue etching the first pattern groove, form the 3rd groove communicating with partition wall; On covering and answering a pager's call, at backside coating the 3rd passivation layer of semi-finished product lead frame, the 3rd passivation layer not only covers the back side of semi-finished product lead frame, fills up again this all groove in semi-finished product lead frame back side; Then on the 3rd passivation layer, etch the second pattern groove, the position at the second pattern groove place is position, pin bottom surface and the place that needs copper cash framework to expose; High-frequency sputtering the first metal layer on the 3rd passivation layer, the first metal layer is full of all second graph grooves simultaneously, then on the first metal layer, etches the 4th groove, and the first metal layer is copper metal layer; At the first metal layer surface-coated the 4th passivation layer, and be full of the 4th all grooves, on the 4th passivation layer, etch the 5th groove; Sputter multiple layer metal in the 5th groove, this multiple layer metal is filled the 5th all grooves, forms UBM
2layer; By ball attachment machine, first at UBM
2on layer, brush scolder, then tin ball is placed on and is brushed on scolder, by Reflow Soldering, make tin ball and UBM
2layer strong bonded, then clean, printing and the cutting and separating technique that adopts QFN to encapsulate prints, cutting and separating, but needs protection tin ball not damage; Adopt the test technology of BGA encapsulation to test separated product, qualified product are tape welding spherical array flat-four-side pin-less packaging part.
embodiment 2
Wafer reduction scribing is with embodiment 1, and just the wafer with bump chip is thinned to 200 μ m; On a surface of bare copper frame, evenly apply the photoresist of the negativity of a layer thickness 20 μ m, form photoresist layer, then at the temperature of 70 ℃, toast 20 minutes; Aim at exposure, then development, photographic fixing, removes the photoresist of exposure area, make to form on photoresist layer a plurality of the first grooves side by side, the bare copper frame of each first groove position exposes, and the bare copper frame region of exposing demonstrates pattern, afterwards post bake 30 seconds at the temperature of 120 ℃; Adopt embodiment 1 method etching the second groove, apply the first passivation layer and etching UBM
1window, growth UBM
1after core and lower filling in layer, upside-down mounting, plastic packaging and rear solidifying, by bare copper frame back side grinding 0.035mm, then make tape welding spherical array flat-four-side pin-less packaging part by the method for embodiment 1.
embodiment 3
Wafer reduction scribing is with embodiment 1, and just the wafer with bump chip is thinned to 225 μ m; On a surface of bare copper frame, evenly apply the photoresist of the negativity of a layer thickness 30 μ m, form photoresist layer, then at the temperature of 65 ℃, toast 25 minutes; Aim at exposure, then development, photographic fixing, removes the photoresist of exposure area, make to form on photoresist layer a plurality of the first grooves side by side, the bare copper frame of each first groove position exposes, and the bare copper frame region of exposing demonstrates pattern, afterwards post bake 25 seconds at the temperature of 125 ℃; Adopt embodiment 1 method etching the second groove, apply the first passivation layer and etching UBM
1window, growth UBM
1after core and lower filling in layer, upside-down mounting, plastic packaging and rear solidifying, by bare copper frame back side grinding 0.033mm, then make tape welding spherical array flat-four-side pin-less packaging part by the method for embodiment 1.
Although illustrated and described the present invention in conjunction with preferred embodiment, it will be understood by those skilled in the art that under the prerequisite of the spirit and scope of the present invention that limit without prejudice to claims, can modify and convert.
Claims (7)
1. a tape welding spherical array flat-four-side pin-less packaging part production method, is characterized in that, specifically carries out according to the following steps:
Step 1: the wafer of attenuate band salient point, scribing, forms IC chip;
Surface uniform at bare copper frame applies photoresist, forms photoresist layer, then at the temperature of 60 ℃～70 ℃, toasts 25 ± 5 minutes;
Step 2: photoresist layer is aimed to exposure, and then development, photographic fixing, removes the photoresist of exposure area, makes to form a plurality of the first grooves side by side on photoresist layer, and the bare copper frame of each first groove position exposes, afterwards post bake;
Step 3: the bare copper frame part of exposing under spray corrosion the first groove, make a plurality of the second grooves side by side of the positive formation of bare copper frame, between adjacent two second grooves, there is partition wall, then remove remaining photoresist layer;
Step 4: the surface uniform at bare copper frame surface and all the second grooves applies the first passivation layer, then etches UBM on the first passivation layer of all the second bottom portion of groove
1window;
Step 5: adopt high-frequency sputtering at all UBM
1in window and the first passivation layer surface high-frequency sputtering copper metal layer of the second groove surfaces, the two ends of copper metal layer lay respectively on first passivation layer on bare copper frame surface, then at copper metal layer surface high frequency sputter nickel metal layer, then at nickel metal layer surface high frequency sputter gold metal layer; Copper metal layer, nickel metal layer and gold metal layer form UBM
1layer; By photoetching, etching step, remove unnecessary metal level, the UBM1 layer forming in adjacent two the second grooves is not contacted, obtain semi-finished product lead frame;
Step 6: get the IC chip that step 1 makes, on the semi-finished product lead frame of step 5, make chip bump enter in the second groove and and UBM in core in this IC flip-chip
1layer bottom is connected, and then with lower filler, fills space and chip bump and the UBM between adjacent chip bump
1space between layer;
Step 7: plastic packaging and rear solidifying;
Step 8: grinding, by the semi-finished product lead frame back side after plastic packaging and rear solidifying, is cleaned, dried;
Step 9: bare copper frame backside coating the second passivation layer after grinding; Then expose, development, photographic fixing, then on the second passivation layer, etch the first pattern groove, each partition wall is a corresponding first pattern groove at the lead frame back side;
Step 10: the first pattern groove is carried out to etching again, form the 3rd groove communicating with partition wall;
Step 11: apply the 3rd passivation layer, the 3rd passivation layer not only covers the back side of semi-finished product lead frame, and fill up this all groove in semi-finished product lead frame back side; Then on the 3rd passivation layer, etch the second pattern groove, the position at the second pattern groove place is position, pin bottom surface and the place that needs copper cash framework to expose;
Step 12: the 3rd passivation layer surface is at sputter the first metal layer, and the first metal layer is also full of all second graph grooves simultaneously, then etches the 4th groove on the first metal layer;
Step 13: apply the 4th passivation layer in the 3rd passivation layer surface, and make the 4th passivation layer be full of the 4th all grooves, then etch the 5th groove on the 4th passivation layer;
Step 14: equal sputter multiple layer metal in the 5th all grooves, forms UBM
2layer;
Step 15: reflow soldering tin ball and UBM
2layer, cleans;
Step 16: adopt that existing technique prints, cutting and separating and test, obtain tape welding spherical array flat-four-side pin-less packaging part.
2. tape welding spherical array flat-four-side pin-less packaging part production method according to claim 1, is characterized in that, in described step 1, adopt corase grind, the thin anti-warpage technique of fine-grinding and polishing, wafer with salient point is thinned to 200～250 μ m, corase grind speed 6 μ m/s, fine grinding speed 1.0 μ m/s; Feed velocity≤10mm/s during scribing.
3. tape welding spherical array flat-four-side pin-less packaging part production method according to claim 1, is characterized in that, in described step 2, at the temperature of 120 ℃ ± 5 ℃, post bake is 30 ± 5 seconds.
4. tape welding spherical array flat-four-side pin-less packaging part production method according to claim 1, it is characterized in that, core and lower fill process in the upside-down mounting adopting in described step 6: on special-purpose upside-down mounting chip feeder, first chip is overturn, be stained with after scolder, auto-alignment is placed into UBM position corresponding on the bare copper frame of core in upside-down mounting, on whole piece framework after complete chip, automatically income is transmitted box, and in flip-chip, the semi-finished product lead frame after core transmits box and delivers to Reflow Soldering operation by the gross;
By DOE, testing under definite thermal reflow profile, by UBM corresponding on tin salient point, scolder and lead frame on chip by Reflow Soldering hot melt, UBM on chip and lead frame is firmly welded together, directly substituted traditional upper core and bond technology;
By DOE, tested and chosen suitable lower inserts, lower filling mould has Incision Machine's;
Under vacuum suction, lower inserts can be filled the space between chip bump and salient point fully completely, do not have cavity, prevent that soldered ball is shifted at high temperature.
5. tape welding spherical array flat-four-side pin-less packaging part production method according to claim 1, it is characterized in that, in described step 7, the semi-finished product lead frame of the environment-friendly type plastic packaging material that adopts stress≤1, water absorption rate <0.25% after to core in step 6 upside-down mounting carries out plastic packaging, then by general anti-absciss layer technique, carries out rear solidifying.
6. tape welding spherical array flat-four-side pin-less packaging part production method according to claim 1, is characterized in that the grinding thickness 0.03mm～0.035mm at the bare copper frame back side in described step 8.
7. tape welding spherical array flat-four-side pin-less packaging part production method according to claim 1, is characterized in that, the first metal layer in described step 12 is copper metal layer.
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| CN106486457A (en) * | 2015-09-02 | 2017-03-08 | 英飞凌科技股份有限公司 | chip carrier, device and method |
| CN110246764A (en) * | 2019-04-25 | 2019-09-17 | 北京燕东微电子有限公司 | A kind of chip package process and chip-packaging structure |
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| CN103579012B (en) | 2016-08-17 |
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