CN103715201A - Array substrate, manufacturing method of array substrate, GOA unit and display apparatus - Google Patents

Array substrate, manufacturing method of array substrate, GOA unit and display apparatus Download PDF

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CN103715201A
CN103715201A CN201310713416.3A CN201310713416A CN103715201A CN 103715201 A CN103715201 A CN 103715201A CN 201310713416 A CN201310713416 A CN 201310713416A CN 103715201 A CN103715201 A CN 103715201A
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tft
channel region
thickness
source
photoresist layer
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CN103715201B (en
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崔承镇
金熙哲
宋泳锡
刘聖烈
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BOE Technology Group Co Ltd
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Abstract

An embodiment of the invention provides an array substrate, a manufacturing method of the array substrate, a GOA unit and a display apparatus, and relates to the display technical field. The array substrate comprises a gate electrode formed on the surface of a substrate, a gate insulation layer, an active layer and a source drain metal layer. The source drain metal layer is used for forming source and drain electrodes and channel regions of TFTs. The array substrate comprises a plurality of first TFTs and a plurality of second TFTs, wherein the length of the channel region of the first TFT is smaller than the length of the channel region of the second TFT. The array substrate in the invention is capable of preventing the poor open circuit due to the disconnection of the TFT channel regions in the GOA unit.

Description

A kind of array base palte and manufacture method thereof, GOA unit and display unit
Technical field
The present invention relates to Display Technique field, relate in particular to a kind of array base palte and manufacture method thereof, GOA unit and display unit.
Background technology
In order to improve the display effect of display unit, increasing people starts attentiveness to invest the narrow frame design of display unit, the method that prior art is normally reduced to technique limit piezometric the limit for the making of narrow border display realizes, a wherein realization that very important technology is exactly the technology mass production of the capable driving of array base palte (Gate Driver on Array is called for short GOA).Utilize GOA technology gate switch circuit to be integrated on the array base palte of display floater to form the turntable driving to display floater, thereby can save grid-driving integrated circuit part, it not only can reduce product cost from material cost and manufacture craft two aspects, and display floater can be accomplished the design for aesthetic of both sides symmetry and narrow frame.
In GOA unit, be conventionally formed with the various TFT(Thin Film Transistor of size and shape, Thin Film Transistor (TFT)), like this in the process of source-drain electrode that forms TFT by composition technique, the intermediate tone mask plate using in source-drain electrode cineration technics (Half Tone Mask, HTM) light transmittance need to change according to TFT size, the variation of HTM light transmittance causes the variable thickness of photoresist that causes the raceway groove corresponding position of TFT different in cineration technics, thereby finally cause the raceway groove in the weak TFT of photoresist relative thin after subsequent etching to occur to disconnect bad.
In GOA unit, generally include two kinds of TFT that are positioned at zones of different, the size of these two kinds of TFT is not identical, its profile can be distinguished as depicted in figs. 1 and 2, wherein the structure of two kinds of TFT is identical with forming process, include the grid 2 that is formed on successively transparency carrier 1 surface, gate insulation layer (not shown), metal level 4 is leaked in active layer 3 and source, in order to form raceway groove, the surface that metal level is leaked in source is formed with photoresist layer 5, after using HTM exposure imaging, the thickness of the photoresist that the photoresist layer 5 of leakage metal level 4 tops, source that TFT raceway groove position is corresponding retains is not identical, can see, in the structure of TFT shown in Fig. 1, photoresist layer 5 thickness of corresponding channel region are h1, in the structure of TFT shown in Fig. 2, photoresist layer 5 thickness of corresponding channel region are h2, h1 < h2.Because the thickness of h1 is less, further by composition technique, forming in the process of raceway groove, may produce unnecessary etching to active layer 3, this will cause channel region in TFT to disconnect, and produce badly, make TFT cannot realize corresponding function.
Summary of the invention
Embodiments of the invention provide a kind of array base palte and manufacture method, GOA unit and display unit, can avoid in GOA unit TFT channel region to disconnect and opening circuit of causing is bad.
The one side of the embodiment of the present invention, a kind of array base palte is provided, comprise the grid, gate insulation layer, active layer and the source leakage metal level that are formed on substrate surface, source-drain electrode and the channel region that metal level is used to form TFT leaked in described source, described array base palte comprises a plurality of TFT and a plurality of the 2nd TFT, and the length of the channel region of a described TFT is less than the length of the channel region of described the 2nd TFT.
Concrete, before forming the source-drain electrode and channel region of TFT, the surface that metal level is leaked in described source is also formed with photoresist layer.
Wherein, the thickness of the channel region of the corresponding TFT of described photoresist layer is less than the thickness of the source drain region of corresponding TFT.
The thickness of channel region and the thickness of the channel region of corresponding described the 2nd TFT of the corresponding described TFT of described photoresist layer equate.
In embodiments of the present invention, described photoresist layer adopts gray tone mask plate exposure imaging to form.
Wherein, described gray tone mask plate comprises gray tone rete, and described gray tone rete comprises a plurality of first areas and a plurality of second area, the channel region of the corresponding described TFT in described first area, the channel region of corresponding described the 2nd TFT of described second area.
The thickness that is positioned at the gray tone rete of described first area is greater than the thickness of the gray tone rete that is positioned at described second area.
Concrete, the thickness that is positioned at the gray tone rete of described first area with the thickness difference that is positioned at the gray tone rete of described second area is
Figure BDA0000442583030000021
The length of the channel region of a described TFT is 4.0~5.0 μ m.
The length of the channel region of described the 2nd TFT is 5.0~6.0 μ m.
The embodiment of the present invention also provides a kind of array base palte, comprises a plurality of TFT as above and the 2nd TFT.
On the other hand, the embodiment of the present invention also provides a kind of display unit, comprises array base palte as above or comprises GOA as above unit.
In addition, the embodiment of the present invention also provides a kind of manufacture method of array base palte, comprising:
On the surface of substrate, form successively grid, gate insulation layer, active layer and source and leak metal level.
On the surface that is formed with the substrate of described source leakage metal level, form source-drain electrode and the channel region of a plurality of TFT and the 2nd TFT by composition PROCESS FOR TREATMENT, the length of the channel region of a described TFT is less than the length of the channel region of described the 2nd TFT.
The array base palte that the embodiment of the present invention provides and manufacture method thereof, GOA unit and display unit, in forming the process of TFT raceway groove, when the thickness of the photoresist layer of a TFT channel region is less than the thickness of photoresist layer of the 2nd TFT channel region, by reducing the length of the channel region of a TFT, to reduce the exposure of the photoresist layer of a TFT channel region accordingly, thereby can effectively realize between the thickness of photoresist layer of a TFT channel region and the thickness of the photoresist layer of the 2nd TFT channel region without obviously section is poor.By a kind of like this method of compensation, can be so that using HTM to form in the process of TFT channel region, the TFT of different sizes or shape is when forming channel region, the thickness of the corresponding photoresist of channel region can be because HTM light transmission rate be compared with becoming thinner greatly, thereby avoided the channel region that in GOA unit, TFT causes because etch thicknesses is excessive when forming channel region to disconnect, thereby avoided opening circuit of TFT channel region bad, significantly improved the quality of product.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the structural representation of a kind of array base palte in prior art;
Fig. 2 is the structural representation of another array base palte in prior art;
The formation structural representation of a TFT in a kind of array base palte that Fig. 3 provides for the embodiment of the present invention;
The formation structural representation of the 2nd TFT in a kind of array base palte that Fig. 4 provides for the embodiment of the present invention;
The structural representation of a kind of gray tone mask plate that Fig. 5 is the array base palte that forms the embodiment of the present invention and provide;
Fig. 6 is the schematic diagram that is related to of the length L of the channel region of TFT in the embodiment of the present invention and the thickness T of gray tone rete 50;
The schematic flow sheet of a kind of manufacturing method of array base plate that Fig. 7 provides for the embodiment of the present invention;
Fig. 8 is for forming the method flow schematic diagram of TFT channel region.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
The array base palte that the embodiment of the present invention provides, as shown in Figure 3 and Figure 4, comprise the grid 31, gate insulation layer (not shown), active layer 32 and the source leakage metal level 33 that are formed on substrate 30 surfaces, source-drain electrode and the channel region that metal level 33 is used to form TFT leaked in this source, wherein, array base palte comprises a plurality of TFT and a plurality of the 2nd TFT, the structure of the one TFT can be as shown in Figure 3, the structure of the 2nd TFT can be as shown in Figure 4, and wherein the length L 1 of the channel region of a TFT is less than the length L 2 of the channel region of the 2nd TFT.
Wherein, the transparency carrier that substrate 30 specifically can adopt materials such as comprising glass or transparent resin to make, grid 31, gate insulation layer 32 and active layer can be formed on respectively the surface of transparency carrier 30 successively by composition technique.Metal level 33 is leaked in source can form respectively by a composition PROCESS FOR TREATMENT source-drain electrode and the channel region of TFT, and wherein metal level 34 is leaked in the disconnection of corresponding active layer position in source, thereby forms the channel region of TFT.
It should be noted that, a TFT and the 2nd TFT all can be arranged in GOA unit, and a TFT is different from size or the shape of the 2nd TFT.In embodiments of the present invention, to take the size of a TFT to be less than the explanation that the 2nd TFT carries out as example, when the size of a TFT is less than the 2nd TFT, a TFT is conventionally easier to the situation that occurs that channel region disconnects when forming channel region because etch thicknesses is excessive.Certainly, the embodiment of the present invention also only illustrates at this, and the restriction of not the present invention being done, in embodiments of the present invention, a TFT can be included in the TFT that occurs such class that channel region disconnects while forming channel region because etch thicknesses is excessive.
The array base palte that the embodiment of the present invention provides, in forming the process of TFT raceway groove, when the thickness of the photoresist layer of a TFT channel region is less than the thickness of photoresist layer of the 2nd TFT channel region, by reducing the length of the channel region of a TFT, to reduce the exposure of the photoresist layer of a TFT channel region accordingly, thereby can effectively realize between the thickness of photoresist layer of a TFT channel region and the thickness of the photoresist layer of the 2nd TFT channel region without obviously section is poor.By a kind of like this method of compensation, can be so that using HTM to form in the process of TFT channel region, the TFT of different sizes or shape is when forming channel region, the thickness of the corresponding photoresist of channel region can be because HTM light transmission rate be compared with becoming thinner greatly, thereby avoided the channel region that in GOA unit, TFT causes because etch thicknesses is excessive when forming channel region to disconnect, thereby avoided opening circuit of TFT channel region bad, significantly improved the quality of product.
Further, as shown in Figure 3 or Figure 4, before forming the source-drain electrode and channel region of TFT, the surface that metal level 33 is leaked in source can also be formed with photoresist layer 34.
Wherein, the thickness of the channel region of photoresist layer 34 corresponding TFT is less than the thickness of the source drain region of corresponding TFT.
Preferably, in array base-plate structure as shown in Figure 3 and Figure 4, the thickness t 1 of channel region and the thickness t 2 of the channel region of corresponding the 2nd TFT of photoresist layer 34 corresponding TFT can equate.So, can further guarantee that a TFT can not cause because etch thicknesses is excessive that when forming channel region channel region disconnects, thereby avoid opening circuit of TFT channel region bad.
Further, photoresist layer 34 can adopt gray tone mask plate exposure imaging to form.
Wherein, the structure of gray tone mask plate can as shown in Figure 5, comprise gray tone rete 50, wherein, gray tone rete 50 comprises again a plurality of first areas 51 and a plurality of second area 52, the channel region of this first area 51 corresponding TFT, the channel region of second area 52 corresponding the 2nd TFT.
The thickness T 1 that is positioned at the gray tone rete 50 of first area 51 is greater than the thickness T 2 of the gray tone rete 50 that is positioned at second area 52.
It should be noted that, in the manufacturing process of TFT, the length of the channel region of TFT is less, when carrying out composition technique with formation channel region, should reduce accordingly the exposure of the photoresist layer of TFT channel region.When adopting gray tone mask plate, along with the increase of gray tone thicknesses of layers, the light transmittance of mask plate also will decline gradually, and the exposure of the corresponding photoresist layer for TFT channel region also can reduce.
Concrete, in the situation that other external conditions are constant, the relation of the thickness T of the length L of the channel region of TFT and gray tone rete 50 can be as shown in Figure 6, and wherein the unit of the length L of the channel region of TFT is μ m, and the unit of the thickness T of gray tone rete 50 is
Figure BDA0000442583030000061
can see, increase along with the length L of TFT channel region, needed light transmittance also increases thereupon, the thickness T of corresponding gray tone rete 50 reduces to realize the increase of light transmittance thereupon, when the length L of TFT channel region is increased to 6 μ m when above, the thickness T of gray tone rete 50 is by no longer along with the increase of the length L of TFT channel region and reduce.
As a kind of preferred embodiment, the thickness T 1 that is positioned at the gray tone rete 50 of first area 51 with thickness T 2 differences that are positioned at the gray tone rete 50 of second area 52 can be
Figure BDA0000442583030000062
accordingly, the length L 1 of the channel region of a TFT can be 4.0~5.0 μ m, and the length L 2 of the channel region of the 2nd TFT can be 5.0~6.0 μ m.For example, L1 specifically can choose 4.5 μ m, and L2 specifically can choose 5.5 μ m.Adopt the channel length design of a kind of like this TFT of size, can effectively reduce the exposure of the photoresist layer of a TFT channel region, thereby can effectively realize between the thickness of photoresist layer of a TFT channel region and the thickness of the photoresist layer of the 2nd TFT channel region without obviously section is poor.
By a kind of like this method of compensation, can be so that using HTM to form in the process of TFT channel region, the TFT of different sizes or shape is when forming channel region, the thickness of the corresponding photoresist of channel region can be because HTM light transmission rate be compared with becoming thinner greatly, thereby avoided the channel region that in GOA unit, TFT causes because etch thicknesses is excessive when forming channel region to disconnect, thereby avoided opening circuit of TFT channel region bad, significantly improved the quality of product.
It should be noted that, above-described TFT be take the explanation that bottom grating structure carries out as example, and the array base palte of a kind of like this structure that the embodiment of the present invention provides can adopt the TFT of top gate structure equally.Be with the difference of the TFT of bottom grating structure, in the TFT of top gate structure, comprise that the source that is formed on successively substrate surface leaks metal level, active layer, gate insulation layer and grid, source is leaked metal level and is used to form the source-drain electrode of TFT and the channel region of TFT.For fear of TFT, when forming channel region, because etch thicknesses is excessive, cause that channel region disconnects, can adopt equally the length L 1 of the channel region of a TFT to be less than a kind of like this design of length L 2 of the channel region of the 2nd TFT.
The GOA unit that the embodiment of the present invention provides, comprises a plurality of TFT as above and the 2nd TFT.
A kind of like this GOA unit of structure, in forming the process of TFT raceway groove, when the thickness of the photoresist layer of a TFT channel region is less than the thickness of photoresist layer of the 2nd TFT channel region, by reducing the length of the channel region of a TFT, to reduce the exposure of the photoresist layer of a TFT channel region accordingly, thereby can effectively realize between the thickness of photoresist layer of a TFT channel region and the thickness of the photoresist layer of the 2nd TFT channel region without obviously section is poor.By a kind of like this method of compensation, can be so that using HTM to form in the process of TFT channel region, the TFT of different sizes or shape is when forming channel region, the thickness of the corresponding photoresist of channel region can be because HTM light transmission rate be compared with becoming thinner greatly, thereby avoided the channel region that in GOA unit, TFT causes because etch thicknesses is excessive when forming channel region to disconnect, thereby avoided opening circuit of TFT channel region bad, significantly improved the quality of product.
In addition, the embodiment of the present invention also provides a kind of display unit, concrete, and this display unit can comprise array base palte as above or comprise GOA as above unit.
It should be noted that display unit provided by the present invention can be: any product or parts with Presentation Function such as liquid crystal panel, Electronic Paper, oled panel, LCD TV, liquid crystal display, DPF, mobile phone, panel computer.
Because the structure of array base palte or GOA unit has been done detailed description in the aforementioned embodiment, repeat no more herein.
The manufacture method of the array base palte that the embodiment of the present invention provides, as shown in Figure 7, comprising:
S701, on the surface of substrate, form successively grid, gate insulation layer, active layer and metal level is leaked in source.
S702, on the surface that forms the substrate of active leakage metal level, form source-drain electrode and the channel region of a plurality of TFT and the 2nd TFT by composition PROCESS FOR TREATMENT, the length of the channel region of a TFT is less than the length of the channel region of the 2nd TFT.
It should be noted that, a TFT and the 2nd TFT all can be arranged in GOA unit, and a TFT is different from size or the shape of the 2nd TFT.In embodiments of the present invention, to take the size of a TFT to be less than the explanation that the 2nd TFT carries out as example, when the size of a TFT is less than the 2nd TFT, a TFT is conventionally easier to the situation that occurs that channel region disconnects when forming channel region because etch thicknesses is excessive.Certainly, the embodiment of the present invention also only illustrates at this, and the restriction of not the present invention being done, in embodiments of the present invention, a TFT can be included in the TFT that occurs such class that channel region disconnects while forming channel region because etch thicknesses is excessive.
The manufacturing method of array base plate that the embodiment of the present invention provides, in forming the process of TFT raceway groove, when the thickness of the photoresist layer of a TFT channel region is less than the thickness of photoresist layer of the 2nd TFT channel region, by reducing the length of the channel region of a TFT, to reduce the exposure of the photoresist layer of a TFT channel region accordingly, thereby can effectively realize between the thickness of photoresist layer of a TFT channel region and the thickness of the photoresist layer of the 2nd TFT channel region without obviously section is poor.By a kind of like this method of compensation, can be so that using HTM to form in the process of TFT channel region, the TFT of different sizes or shape is when forming channel region, the thickness of the corresponding photoresist of channel region can be because HTM light transmission rate be compared with becoming thinner greatly, thereby avoided the channel region that in GOA unit, TFT causes because etch thicknesses is excessive when forming channel region to disconnect, thereby avoided opening circuit of TFT channel region bad, significantly improved the quality of product.
Further, as shown in Figure 8, source-drain electrode and channel region that the described surface forming the substrate of active leakage metal level forms a plurality of TFT and the 2nd TFT by composition PROCESS FOR TREATMENT specifically can comprise:
S801, the surface of leaking metal level in source form photoresist layer.
S802, employing gray tone mask plate carry out exposure imaging to photoresist layer, so that the thickness of the channel region of the corresponding TFT of photoresist layer is less than the thickness of the source drain region of corresponding TFT, and the thickness of channel region of the corresponding TFT of photoresist layer is equal with the thickness of the channel region of corresponding the 2nd TFT.
Wherein, the structure of gray tone mask plate can as shown in Figure 5, comprise gray tone rete 50, wherein, gray tone rete 50 comprises again a plurality of first areas 51 and a plurality of second area 52, the channel region of this first area 51 corresponding TFT, the channel region of second area 52 corresponding the 2nd TFT.The thickness T 1 that is positioned at the gray tone rete 50 of first area 51 is greater than the thickness T 2 of the gray tone rete 50 that is positioned at second area 52.
S803, etch away photoresist layer corresponding to channel region of TFT, peel off remaining photoresist layer, form source-drain electrode and the channel region of a plurality of TFT and the 2nd TFT.
As a kind of preferred embodiment, the thickness T 1 that is positioned at the gray tone rete of first area with the thickness difference that is positioned at the gray tone rete of second area can be
Figure BDA0000442583030000091
accordingly, the length of the channel region of a TFT can be 4.0~5.0 μ m, and the length of the channel region of the 2nd TFT can be 5.0~6.0 μ m.For example, the length of the channel region of a TFT specifically can be chosen 4.5 μ m, and the length of the channel region of the 2nd TFT specifically can be chosen 5.5 μ m.Adopt the channel length design of a kind of like this TFT of size, can effectively reduce the exposure of the photoresist layer of a TFT channel region, thereby can effectively realize between the thickness of photoresist layer of a TFT channel region and the thickness of the photoresist layer of the 2nd TFT channel region without obviously section is poor.
By a kind of like this method of compensation, can be so that using HTM to form in the process of TFT channel region, the TFT of different sizes or shape is when forming channel region, the thickness of the corresponding photoresist of channel region can be because HTM light transmission rate be compared with becoming thinner greatly, thereby avoided the channel region that in GOA unit, TFT causes because etch thicknesses is excessive when forming channel region to disconnect, thereby avoided opening circuit of TFT channel region bad, significantly improved the quality of product.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited to this, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, within all should being encompassed in protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of described claim.

Claims (11)

1. an array base palte, comprise the grid, gate insulation layer, active layer and the source leakage metal level that are formed on substrate surface, source-drain electrode and the channel region that metal level is used to form TFT leaked in described source, it is characterized in that, described array base palte comprises a plurality of TFT and a plurality of the 2nd TFT, and the length of the channel region of a described TFT is less than the length of the channel region of described the 2nd TFT.
2. array base palte according to claim 1, is characterized in that, before forming the source-drain electrode and channel region of TFT, the surface that metal level is leaked in described source is also formed with photoresist layer;
The thickness of the channel region of the corresponding TFT of described photoresist layer is less than the thickness of the source drain region of corresponding TFT;
The thickness of channel region and the thickness of the channel region of corresponding described the 2nd TFT of the corresponding described TFT of described photoresist layer equate.
3. array base palte according to claim 2, described photoresist layer adopts gray tone mask plate exposure imaging to form;
Described gray tone mask plate comprises gray tone rete, and described gray tone rete comprises a plurality of first areas and a plurality of second area, the channel region of the corresponding described TFT in described first area, the channel region of corresponding described the 2nd TFT of described second area;
The thickness that is positioned at the gray tone rete of described first area is greater than the thickness of the gray tone rete that is positioned at described second area.
4. array base palte according to claim 3, is characterized in that, the thickness that is positioned at the gray tone rete of described first area with the thickness difference that is positioned at the gray tone rete of described second area is
5. according to the arbitrary described array base palte of claim 1-4, it is characterized in that,
The length of the channel region of a described TFT is 4.0~5.0 μ m;
The length of the channel region of described the 2nd TFT is 5.0~6.0 μ m.
6. a GOA unit, is characterized in that, comprises an a plurality of TFT and the 2nd TFT as described in as arbitrary in claim 1-5.
7. a display unit, is characterized in that, comprises the array base palte as described in as arbitrary in claim 1-5 or comprises GOA as claimed in claim 6 unit.
8. a manufacture method for array base palte, is characterized in that, comprising:
On the surface of substrate, form successively grid, gate insulation layer, active layer and source and leak metal level;
On the surface that is formed with the substrate of described source leakage metal level, form source-drain electrode and the channel region of a plurality of TFT and the 2nd TFT by composition PROCESS FOR TREATMENT, the length of the channel region of a described TFT is less than the length of the channel region of described the 2nd TFT.
9. the manufacture method of array base palte according to claim 8, is characterized in that, source-drain electrode and channel region that the described surface being formed with the substrate of described source leakage metal level forms a plurality of TFT and the 2nd TFT by composition PROCESS FOR TREATMENT comprise:
The surface of leaking metal level in described source forms photoresist layer;
Adopt gray tone mask plate to carry out exposure imaging to described photoresist layer, so that the thickness of the channel region of the corresponding TFT of described photoresist layer is less than the thickness of the source drain region of corresponding TFT, and the thickness of channel region of the corresponding described TFT of described photoresist layer is equal with the thickness of the channel region of corresponding described the 2nd TFT;
Etch away described photoresist layer corresponding to channel region of TFT, peel off remaining photoresist layer, form source-drain electrode and the channel region of a plurality of TFT and the 2nd TFT.
10. the manufacture method of array base palte according to claim 9, is characterized in that, the thickness of the gray tone rete of described first area with the thickness difference that is positioned at the gray tone rete of described second area is
Figure FDA0000442583020000021
The manufacture method of 11. according to Claim 8-10 arbitrary described array base paltes, is characterized in that,
The length of the channel region of a described TFT is 4.0~5.0 μ m;
The length of the channel region of described the 2nd TFT is 5.0~6.0 μ m.
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US10242886B2 (en) 2016-04-28 2019-03-26 Boe Technology Group Co., Ltd. Method for fabricating array substrate
CN111796706A (en) * 2020-05-22 2020-10-20 南昌欧菲显示科技有限公司 Panel, preparation method thereof, touch display screen and electronic equipment
WO2023108429A1 (en) * 2021-12-14 2023-06-22 京东方科技集团股份有限公司 Manufacturing method for thin film transistor, array substrate, and display panel

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