CN104037128A - Production method of configurable microcontroller chip - Google Patents
Production method of configurable microcontroller chip Download PDFInfo
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- CN104037128A CN104037128A CN201410261433.2A CN201410261433A CN104037128A CN 104037128 A CN104037128 A CN 104037128A CN 201410261433 A CN201410261433 A CN 201410261433A CN 104037128 A CN104037128 A CN 104037128A
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- chip
- functional module
- configurable
- preparation
- silicon substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/808—Bonding techniques
- H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
- H01L2224/80895—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
Abstract
The invention provides a production method of a configurable microcontroller chip. According to the production method of the configurable microcontroller chip, functional modules of different types are arranged inside different chips, and the different chips are connected and activated through a silicon substrate, so that users can select and activate the required functional modules by himself/herself. Compared with the production method of a system-level chip in which all the functional modules are arranged on one chip, the production method of the configurable microcontroller chip has the advantages of being flexible, material-saving, cost-saving, good in data transmission capacity and the like.
Description
Technical field
The present invention relates to field of semiconductor devices, relate in particular to a kind of preparation method of configurable microcontroller chip.
Background technology
For traditional system level chip (SOC) design, have two kinds of modes, a kind of Shi You Chevron Research Company (CRC) goes out the needed product for different clients according to the Demand Design of client on market.In Fig. 1 and Fig. 2, illustrated respectively the internal structure of two kinds of chips, as shown in Figure 1, this chip comprises microcontroller 101, for depositing memory 102, D/A converter 103, the bluetooth 104 of the ephemeral data that routine data and microcontroller process; As shown in Figure 2, this chip comprise microcontroller 201, for depositing memory 202, A/D converter 203, the bluetooth 204 of the ephemeral data that routine data and microcontroller process.These two kinds of chips are supplied respectively different clients, because each client's requirement is not identical, therefore, this just makes Chevron Research Company (CRC) have to design different types of system level chip to meet different users, and every money system level chip of Chevron Research Company (CRC) design differs to establish a capital and sells out, so will produce the problem of product surplus.
Another kind of mode is that Chevron Research Company (CRC) all concentrates on the conventional peripheral hardware of client on one chips, as shown in Figure 3, in this chip, comprise microcontroller 301, for depositing memory 302, A/D converter 303, bluetooth 304, the D/A converter 305 of the ephemeral data that routine data and microcontroller process.Chevron Research Company (CRC) can activate the peripheral functionality that client need to use according to client's requirement, thereby makes a chip can meet different customer demands, and this system level chip is called as programmable system level chip.Although programmable system level chip can meet different customer demands, therefore need not worry to occur as problems such as product surpluses, but, because this programmable system level chip is that the peripheral hardware that client is often used is all concentrated together, so inevitably can cause the increase of chip area, thereby make the cost of every chips also become large thereupon.
Summary of the invention
In view of the above problems, the invention provides a kind of preparation method of configurable microcontroller chip.
The technical scheme that technical solution problem of the present invention adopts is:
A preparation method for configurable microcontroller chip, wherein, comprising:
Step S1: the chip and the silicon substrate that can carry out line configuration that provide a plurality of inside to be provided with functional module;
Step S2: the line in described silicon substrate is configured;
Step S3: select the described chip needing to be connected with described silicon substrate, and realize the function activation of this chip by the line in described silicon substrate.
The preparation method of described configurable microcontroller chip, wherein, at least comprises microcontroller and memory in described functional module.
The preparation method of described configurable microcontroller chip, wherein, be provided with a power supply described in each in chip, and the power supply in each chip can not be connected with configurable described functional module.
The preparation method of described configurable microcontroller chip, wherein, described in each, the surface of chip is provided with solder joint, and described in each, the configurable holding wire of the functional module in chip is connected on the solder joint of chip at its place.
The preparation method of described configurable microcontroller chip, wherein, the difference in functionality module in same described chip to realize technique identical.
The preparation method of described configurable microcontroller chip, wherein, described functional module comprises can be along with integrated circuit technology size is constantly dwindled and a class functional module of scaled down and can not constantly dwindling and two class functional modules of scaled down along with integrated circuit technology size, and a described class functional module and described two class functional modules are arranged at respectively in different described chips.
The preparation method of described configurable microcontroller chip, wherein, a described class functional module is digital logic unit, described two class functional modules are analogue unit or digital units.
The preparation method of described configurable microcontroller chip, wherein, described in each, configurable functional module is provided with one group of output and one group of input, this output and input are connected to respectively on two groups of different solder joints of chip at this functional module place, and by described silicon substrate, carry out output and the input of data-signal.
The preparation method of described configurable microcontroller chip, wherein, described silicon substrate is arranged at the surface of a substrate, in described substrate, offers through hole, and described output and described input are led in an encapsulated layer by described through hole.
Technique scheme tool has the following advantages or beneficial effect:
The present invention is by being separately positioned on dissimilar functional module in different chips, and the connection realizing between different chips by silicon substrate activates, thereby make functional module that user can select to need the voluntarily line activating of going forward side by side, compare the advantage such as that the inventive method has is flexible and changeable, save material and cost, data transmission capabilities is good with the system level chip that all functions module is arranged on chip piece.
Accompanying drawing explanation
With reference to appended accompanying drawing, to describe more fully embodiments of the invention.Yet appended accompanying drawing only, for explanation and elaboration, does not form limitation of the scope of the invention.
Fig. 1～3rd, chip internal structure schematic diagram of the prior art;
Fig. 4～7th, the structural representation of the inventive method embodiment chips;
Fig. 8 is the functional module interface in single chips and the syndeton schematic diagram between chip welding spot in the inventive method embodiment;
Fig. 9 is the structural representation that the inventive method embodiment chips is connected with silicon substrate;
Figure 10～11st, the syndeton schematic diagram between difference in functionality module in different chips in the inventive method embodiment;
Figure 12 is the steps flow chart schematic diagram that application the inventive method embodiment produces;
Figure 13 is the structural representation after the chip in the inventive method embodiment encapsulates.
Embodiment
The invention provides a kind of preparation method of configurable microcontroller chip, a plurality of functional modules that are arranged on same chip by script reclassify and arrange, thereby different functional modules is arranged in different chips, and by silicon substrate, realize the input and output of these chips, to activate different functional modules.
Method of the present invention mainly comprises:
Step S1: the chip and the silicon substrate that can carry out line configuration that provide a plurality of inside to be provided with functional module;
Step S2: the line in silicon substrate is configured;
Step S3: select the chip needing to be connected with silicon substrate, and realize the function activation of this chip by the line in silicon substrate.
Below in conjunction with the drawings and specific embodiments, the inventive method is elaborated.
First, the chip and the silicon substrate that can carry out line configuration that provide a plurality of inside to be provided with functional module.Wherein, as shown in Figure 4, this functional module being provided with in the chip of functional module can comprise microcontroller 401, this microcontroller can be selected monokaryon or multinuclear according to need of production, also comprise for depositing the memory 402 of the ephemeral data of routine data and microcontroller processing, also comprise that other have the functional module of difference in functionality (P1, P2, P3,, PN), wherein, P1 can be SPI interface, and P2 can be GPI0 interface etc.For P1 to the operational blocks which partition system PI between PN (1≤I≤N), it can be comprised of different types, as shown in Figure 5, and PI.1 wherein, PI.2,, PI.n (n >=1) is belong to peripheral module of the same race dissimilar, for example, PI module represents A/D converter, PI.1 represents that A/D converter has integral form A/D converter, and PI.2 represents gradual approaching/number converter, and PI.3 represents the polytypes such as parallel relatively type A/D converter.For the peripheral functionality module PI.m (0 < m < n+1) of any one type, also configurable x (x > 0) is individual in configurable microcontroller chip, for example can use different quantity according to concrete demand, such as the integral form A/D converter PI.1 in A/D converter is divided into PI.1_1, PI.1_2, PI.1_3; Gradual approaching/number converter PI.2 is divided into PI.2_1, PI.2_2.As an optional execution mode of the present invention, also can area in chip can constantly need to be dwindled and the digital logic unit of scaled down is made on a chips along with integrated circuit technology size according to concrete, and area can not constantly be dwindled and analogue unit or the digital units of scaled down are made on an other chips along with integrated circuit technology size.As another optional execution mode of the present invention, the attainable module of same process can also be made in a chips, or some peripheral functionality modules are placed in different chips.As shown in Figure 6, the chip 1 illustrating in figure has comprised and can constantly dwindle and the functional module of scaled down along with integrated circuit technology size, such as having microcontroller (while using the microcontroller of multinuclear, this microcontroller can be placed in different chips), memory 601 (static random access memory) etc.; In chip 2, comprised and can not constantly dwindle and the functional module of scaled down along with integrated circuit technology size, such as having memory 602 (Flash memory), SPI pin interface (P1), GPI0 pin interface (P2) etc.; In chip 3, comprised the analog module that need to realize with high-pressure process, such as having amplifier P3, pressurizer P4 etc.; In chip 4, comprised the functional module that need to realize with low pressure process, such as having A/D converter P5, D/A converter P6 etc.In every chips, the dissimilar peripheral functionality module of the peripheral functionality module of identical function or identical function is also only confined to one, as shown in Figure 7, in chip 2, there are a plurality of GPI0 pin interfaces, are respectively GPI01 (P2_1), GPI02 (P2_2), GPI03 (P2_3) etc.; In chip 4, A/D converter comprises polytype, if any integral form A/D converter P5.1, and gradual approaching/number converter P5.2 and parallel relatively type A/D converter P5.3 etc.
The all functions module of mentioning in above-mentioned all execution modes and the interconnector of peripheral functionality module all preset, in the time need to using different functions, only need the line between configuration module and module and chip and chip, and functional module in each chip and the input/output port of chip are all connected on the solder joint of chip, as shown in Figure 8, functional module interface in single chips and the connection between chip welding spot 801 in Fig. 8, have been illustrated.
Then, the line in silicon substrate is configured, and selects the chip needing to be connected with silicon substrate, and by the line in silicon substrate, realize the function activation of chip.Concrete, as shown in Figure 9, the chip of needs is upside down on silicon substrate, then according to demand, the line of solder joint between configuration silicon substrate chips and functional module, thus realize required chip functions.
In the preparation method of the configurable microcontroller chip proposing in the present invention, by changing the annexation between solder joint and solder joint, can make chip body reveal different functions.Being embodied in some functional module of portion in the inner and whether being activated of chip functions, this shows as the input/output port of functional module and the change of the annexation of power line in silicon substrate, as shown in figure 10, the power supply of the functional module 1001 in chip 1 is from the power module in chip 1, the input of functional module 1 comes from the functional module 1003 in chip 2, and functional module 1002 in the output demand motive chip 2 of functional module 1001.When needs mobilizing function module 1001, only the power interface 1021 of functional module 1001 and power module interface 1011 need to be done to line in silicon substrate, so just realized the activation of functional module 1001.While not needing mobilizing function module 1001, need to be to functional module 1001, the interface of functional module 1002 and functional module 1003 reconfigures, as shown in figure 11, the power line of functional module 1101, the power interface 1121 and the line of the power module interface 1111 in chip 1 in substrate that are functional module 1101 remain open state, and simultaneously functional module 1101 and functional module 1102, and the line of functional module 1103 in substrate also remains open state.Because what the output of functional module 1101 drove is the input of functional module 1102, so when keep functional module 1101 and functional module 1102 in silicon substrate line off-state time, to process the input port 1112 being connected with functional module 1101 in functional module 1102, this input port 1112 is connected on the power supply in chip 2 or ground connection in silicon substrate, or be connected on the tie high unit interface or tie low unit interface in chip 2, to this input port 1112 input high levels or low level, to avoid input port 1112 unsettled.
By above-described embodiment, can realize the effect of flexible transformation chip functions according to actual needs, on silicon substrate, between configuring chip and module, the object of line is greatly to reduce costs.Module and the cabling between module inner in traditional system level chip and programmable system level chip adopt less metal level and top-level metallic mostly.And in all technique, less metal level represents the price of Geng Gao, top-level metallic price is minimum, and the metal level using in chip is more, and cost is also just larger, one of reason that Here it is traditional system level chip and programmable system level chip cost is high.Pass through the above embodiment of the present invention, cabling in configurable microcontroller chip between configurable chip and configurable module is all realized with metal on silicon substrate, because the metal cost on silicon substrate is minimum, thereby the metal routing on employing silicon substrate can reduce the cost of chip greatly.
An application as the inventive method, as shown in figure 12, when Chevron Research Company (CRC) receives after the chip type that client proposes, Chevron Research Company (CRC) only needs the chip that comprises microcontroller and memory of having produced according to client's requirement, and the chip that comprises the most frequently used peripheral functionality module of all clients, by configure the line between some peripheral functionality module and chip according to client's demand on silicon substrate, this production process only needs about week age, after chip completes, after client considers according to the effect of product and cost, optionally require Chevron Research Company (CRC) according to the system level chip of traditional design production function singleness, or directly adopt the configurable controller chip that current design is good, this process also only needs the time of about one week, compare traditional die production process more than half a year, the method that the present invention proposes greatly reduces the production cycle of final products.
Pin on chip in the inventive method can directly be exported by silicon substrate, or as shown in figure 13, by silicon through hole technology, input/output port is guided to encapsulated layer, in encapsulated layer input and output in the substrate on silicon substrate.
Claims (9)
1. a preparation method for configurable microcontroller chip, is characterized in that, comprising:
Step S1: the chip and the silicon substrate that can carry out line configuration that provide a plurality of inside to be provided with functional module;
Step S2: the line in described silicon substrate is configured;
Step S3: select the described chip needing to be connected with described silicon substrate, and realize the function activation of this chip by the line in described silicon substrate.
2. the preparation method of configurable microcontroller chip as claimed in claim 1, is characterized in that, at least comprises microcontroller and memory in described functional module.
3. the preparation method of configurable microcontroller chip as claimed in claim 1, is characterized in that, is provided with a power supply described in each in chip, and the power supply in each chip can not be connected with configurable described functional module.
4. the preparation method of configurable microcontroller chip as claimed in claim 1, is characterized in that, described in each, the surface of chip is provided with solder joint, and described in each, the configurable holding wire of the functional module in chip is connected on the solder joint of chip at its place.
5. the preparation method of configurable microcontroller chip as claimed in claim 1, is characterized in that, the difference in functionality module in same described chip to realize technique identical.
6. the preparation method of configurable microcontroller chip as claimed in claim 1, it is characterized in that, described functional module comprises can be along with integrated circuit technology size is constantly dwindled and a class functional module of scaled down and can not constantly dwindling and two class functional modules of scaled down along with integrated circuit technology size, and a described class functional module and described two class functional modules are arranged at respectively in different described chips.
7. the preparation method of configurable microcontroller chip as claimed in claim 6, is characterized in that, a described class functional module is digital logic unit, and described two class functional modules are analogue unit or digital units.
8. the preparation method of configurable microcontroller chip as claimed in claim 4, it is characterized in that, described in each, configurable functional module is provided with one group of output and one group of input, this output and input are connected to respectively on two groups of different solder joints of chip at this functional module place, and by described silicon substrate, carry out output and the input of data-signal.
9. the preparation method of configurable microcontroller chip as claimed in claim 8, it is characterized in that, described silicon substrate is arranged at the surface of a substrate, in described substrate, offers through hole, and described output and described input are led in an encapsulated layer by described through hole.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022267030A1 (en) * | 2021-06-25 | 2022-12-29 | 华为技术有限公司 | Switch chip and power supply method |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6301121B1 (en) * | 1999-04-05 | 2001-10-09 | Paul T. Lin | Direct-chip-attach (DCA) multiple chip module (MCM) with repair-chip ready site to simplify assembling and testing process |
| US20040164393A1 (en) * | 2001-02-22 | 2004-08-26 | Rambus, Inc. | Stacked semiconductor module |
| US6911730B1 (en) * | 2003-03-03 | 2005-06-28 | Xilinx, Inc. | Multi-chip module including embedded transistors within the substrate |
| US7310758B1 (en) * | 2005-08-22 | 2007-12-18 | Xilinx, Inc. | Circuit for and method of implementing programmable logic devices |
| CN101304022A (en) * | 2007-05-08 | 2008-11-12 | 意法半导体股份有限公司 | Multi-chip electronic system |
| CN101715593A (en) * | 2007-04-06 | 2010-05-26 | 拉姆伯斯公司 | Memory system topologies including a buffer device and an integrated circuit memory device |
| CN101777546A (en) * | 2009-01-13 | 2010-07-14 | 日月光半导体制造股份有限公司 | Circuit selectable substrate and crystal-covering connection structure |
| CN102891114A (en) * | 2012-10-24 | 2013-01-23 | 上海新储集成电路有限公司 | Manufacturing method of chips of up-and-down stacked system-on-chip |
-
2014
- 2014-06-12 CN CN201410261433.2A patent/CN104037128B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6301121B1 (en) * | 1999-04-05 | 2001-10-09 | Paul T. Lin | Direct-chip-attach (DCA) multiple chip module (MCM) with repair-chip ready site to simplify assembling and testing process |
| US20040164393A1 (en) * | 2001-02-22 | 2004-08-26 | Rambus, Inc. | Stacked semiconductor module |
| US6911730B1 (en) * | 2003-03-03 | 2005-06-28 | Xilinx, Inc. | Multi-chip module including embedded transistors within the substrate |
| US7310758B1 (en) * | 2005-08-22 | 2007-12-18 | Xilinx, Inc. | Circuit for and method of implementing programmable logic devices |
| CN101715593A (en) * | 2007-04-06 | 2010-05-26 | 拉姆伯斯公司 | Memory system topologies including a buffer device and an integrated circuit memory device |
| CN101304022A (en) * | 2007-05-08 | 2008-11-12 | 意法半导体股份有限公司 | Multi-chip electronic system |
| CN101777546A (en) * | 2009-01-13 | 2010-07-14 | 日月光半导体制造股份有限公司 | Circuit selectable substrate and crystal-covering connection structure |
| CN102891114A (en) * | 2012-10-24 | 2013-01-23 | 上海新储集成电路有限公司 | Manufacturing method of chips of up-and-down stacked system-on-chip |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022267030A1 (en) * | 2021-06-25 | 2022-12-29 | 华为技术有限公司 | Switch chip and power supply method |
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Effective date of registration: 20230105 Address after: No. 60, Jifeng East Road, Jilin Hi tech Industrial Development Zone, Jilin City, Jilin Province, 132000 Patentee after: Jilin Dahe railway locomotive accessories manufacturing Co.,Ltd. Address before: 201500 No. 8, building 2, No. 6505, Tingwei Road, Jinshan District, Shanghai Patentee before: SHANGHAI XINCHU INTEGRATED CIRCUIT Co.,Ltd. |
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