CN104065843A - Novel anti-interference modulator-demodulator - Google Patents

Novel anti-interference modulator-demodulator Download PDF

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Publication number
CN104065843A
CN104065843A CN201310088661.XA CN201310088661A CN104065843A CN 104065843 A CN104065843 A CN 104065843A CN 201310088661 A CN201310088661 A CN 201310088661A CN 104065843 A CN104065843 A CN 104065843A
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China
Prior art keywords
resistance
electric capacity
locked loop
circuit
phase
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Pending
Application number
CN201310088661.XA
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Chinese (zh)
Inventor
陈伟
孙国栋
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CHENGDU SHIQI ELECTRONIC TECHNOLOGY Co Ltd
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CHENGDU SHIQI ELECTRONIC TECHNOLOGY Co Ltd
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Priority to CN201310088661.XA priority Critical patent/CN104065843A/en
Publication of CN104065843A publication Critical patent/CN104065843A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a novel anti-interference modulator-demodulator comprising a phase-locked loop circuit, a difference amplification circuit, a filter circuit and a level conversion circuit. The phase-locked loop circuit comprises a phase-locked loop integrated circuit, a first potentiometer, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a first resistor, a second resistor and a third resistor. The first end of the first capacitor is an audio input end. The second end of the first capacitor is respectively connected with the second pin of the phase-locked loop integrated circuit and the first end of the first resistor. The second end of the first resistor is respectively connected with the first end of the second resistor. The second end of the second resistor is connected with the third pin of the phase-locked loop integrated circuit. The phase-locked loop integrated circuit and the filter circuit are arranged, the circuit of the modulator-demodulator is optimized via adopting the phase-locked loop integrated circuit, and a high-frequency AC component can be filtered via the filter circuit and bandwidth of a tuner can be determined so that anti-interference performance of the novel anti-interference modulator-demodulator is greatly enhanced.

Description

New Anti-interference modulator-demodulator
Technical field
The present invention relates to a kind of modulator-demodulator, particularly relate to a kind of New Anti-interference modulator-demodulator.
Background technology
First frequency modulated transmitter is modulated to frequency-modulated wave by audio signal and high frequency carrier, the frequency of high frequency carrier is changed with audio signal, then produced high-frequency signal is amplified, excitation, power amplifier and a series of impedance matching, make signal output to antenna, the device sending.Frequency modulated transmitter needs orthogonal mixer and modulator-demodulator to reconcile signal, and traditional modulator-demodulator exists the shortcomings such as the complicated and anti-interference of circuit is poor.
Summary of the invention
The object of the invention is to provide in order to address the above problem the New Anti-interference that a kind of circuit is simple, anti-jamming effectiveness is good modulator-demodulator.
The present invention is achieved by the following technical solutions:
A kind of New Anti-interference modulator-demodulator, comprise phase-locked loop circuit, differential amplifier circuit, filter circuit and level shifting circuit, described phase-locked loop circuit comprises phase-locked loop intergrated circuit, the first potentiometer, the first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th electric capacity, the 5th electric capacity, the 6th electric capacity, the first resistance, the second resistance and the 3rd resistance, the first end of described the first electric capacity is audio input end, the second end of described the first electric capacity is connected with the second pin of described phase-locked loop intergrated circuit and the first end of described the first resistance respectively, the second end of described the first resistance is connected with the first end of described the second resistance respectively, the second end of described the second resistance is connected with the 3rd pin of described phase-locked loop intergrated circuit, the first pin of described phase-locked loop intergrated circuit is connected with the first end of described the second electric capacity, the second end of described the second electric capacity is connected with the first end of described the 3rd electric capacity and the 9th pin of described phase-locked loop intergrated circuit respectively, the 8th pin of described phase-locked loop intergrated circuit is connected with the first end of described the 3rd resistance and the first end of described the 6th electric capacity respectively, the second end of described the 3rd resistance is connected with the first end of described the first potentiometer, the second end of described the first potentiometer is all connected with the first end of described the 4th electric capacity with the sliding end of described the first potentiometer, the second end ground connection of described the 4th electric capacity, the tenth pin of described phase-locked loop intergrated circuit is connected with the first end of described the 5th electric capacity, the second end of described the 5th electric capacity is connected with the second end of described the 6th electric capacity respectively, described filter circuit comprises the 7th electric capacity, the 8th electric capacity, the 9th electric capacity, the tenth electric capacity, the 8th resistance, the 9th resistance, the tenth resistance, the 11 resistance, the 12 resistance, the 13 resistance and the second amplifier, described the 11 first end of resistance and the output of described differential amplifier circuit are connected, the second end of described the 11 resistance is connected with the first end of described the 8th electric capacity and the first end of described the tenth resistance respectively, the second end of described the tenth resistance is connected with the first end of described the 9th resistance and the first end of described the tenth electric capacity respectively, the second end ground connection of described the tenth electric capacity, the second end of described the 9th resistance is connected with the first end of described the 7th electric capacity and the first end of described the 8th resistance respectively, the second end of described the 7th electric capacity is connected with the first end of described the 12 resistance respectively, the second end of described the 12 resistance is connected with the negative input of described the second amplifier and the first end of described the 13 resistance respectively, the second end of described the 8th resistance is connected with the first end of described the 9th electric capacity and the electrode input end of described the second amplifier respectively, the second end ground connection of described the 9th electric capacity.
Further, described differential amplifier circuit comprises the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance and the first amplifier, the first end of described the 4th resistance is connected with the 7th pin of described phase-locked loop intergrated circuit, the second end of described the 4th resistance is connected with the electrode input end of described the first amplifier and the first end of described the 5th resistance respectively, the second end ground connection of described the 5th resistance, the first end of described the 6th resistance is connected with the 6th pin of described phase-locked loop intergrated circuit, the second end of described the 6th resistance is connected with the negative input of described the first amplifier and the first end of described the 7th resistance respectively, the second end of described the 7th resistance is connected with the output of described the first amplifier.
Further, described level shifting circuit comprises the 14 resistance, the 15 resistance, the 16 resistance, the 17 resistance, the 3rd amplifier, the 11 electric capacity, the second potentiometer and ammeter, the first end of described the 14 resistance is connected with the negative input of described the 3rd amplifier, the electrode input end of described the 3rd amplifier is connected with the first end of described ammeter and the first end of described the 11 electric capacity respectively, the second end of described ammeter is connected with the first end of described the 17 resistance with the second end of described the 11 electric capacity, the second end of described the 17 resistance is connected with the first end of described the 16 resistance, the second end of described the 16 resistance is connected with described the 14 first end of resistance and the first end of the 15 resistance respectively, the second end of described the 15 resistance is connected with the sliding end of described the second potentiometer.
The invention has the beneficial effects as follows:
By phase-locked loop intergrated circuit and filter circuit are set, by adopting phase-locked loop intergrated circuit to optimize the circuit of modulator-demodulator, by filter circuit, can filter high-frequency ac component, and determine the bandwidth of tuner greatly to have improved interference free performance of the present invention.
Brief description of the drawings
Fig. 1 is the circuit diagram of a kind of New Anti-interference modulator-demodulator of the present invention.
Embodiment
Below in conjunction with drawings and the specific embodiments, the present invention is described in further detail:
As shown in Figure 1, a kind of New Anti-interference modulator-demodulator of the present invention, comprise phase-locked loop circuit, differential amplifier circuit, filter circuit and level shifting circuit, described phase-locked loop circuit comprises phase-locked loop intergrated circuit IC, the first potentiometer RP1, the first capacitor C 1, the second capacitor C 2, the 3rd capacitor C 3, the 4th capacitor C 4, the 5th capacitor C 5, the 6th capacitor C 6, the first resistance R 1, the second resistance R 2 and the 3rd resistance R 3, the first end of described the first capacitor C 1 is audio input end, the second end of described the first capacitor C 1 is connected with the second pin of described phase-locked loop intergrated circuit IC and the first end of described the first resistance R 1 respectively, the second end of described the first resistance R 1 is connected with the first end of described the second resistance R 2 respectively, the second end of described the second resistance R 2 is connected with the 3rd pin of described phase-locked loop intergrated circuit IC, the first pin of described phase-locked loop intergrated circuit IC is connected with the first end of described the second capacitor C 2, the second end of described the second capacitor C 2 is connected with the first end of described the 3rd capacitor C 3 and the 9th pin of described phase-locked loop intergrated circuit IC respectively, the 8th pin of described phase-locked loop intergrated circuit IC is connected with the first end of described the 3rd resistance R 3 and the first end of described the 6th capacitor C 6 respectively, the second end of described the 3rd resistance R 3 is connected with the first end of described the first potentiometer RP1, the second end of described the first potentiometer RP1 is all connected with the first end of described the 4th capacitor C 4 with the sliding end of described the first potentiometer RP1, the second end ground connection of described the 4th capacitor C 4, the tenth pin of described phase-locked loop intergrated circuit IC is connected with the first end of described the 5th capacitor C 5, the second end of described the 5th capacitor C 5 is connected with the second end of described the 6th capacitor C 6 respectively, described filter circuit comprises the 7th capacitor C 7, the 8th capacitor C 8, the 9th capacitor C 9, the tenth capacitor C 10, the 8th resistance R 8, the 9th resistance R 9, the tenth resistance R 10, the 11 resistance R 11, the 12 resistance R 12, the 13 resistance R 13 and the second amplifier A2, described the 11 first end of resistance R 11 and the output of described differential amplifier circuit are connected, the second end of described the 11 resistance R 11 is connected with the first end of described the 8th capacitor C 8 and the first end of described the tenth resistance R 10 respectively, the second end of described the tenth resistance R 10 is connected with the first end of described the 9th resistance R 9 and the first end of described the tenth capacitor C 10 respectively, the second end ground connection of described the tenth capacitor C 10, the second end of described the 9th resistance R 9 is connected with the first end of described the 7th capacitor C 7 and the first end of described the 8th resistance R 8 respectively, the second end of described the 7th capacitor C 7 is connected with the first end of described the 12 resistance R 12 respectively, the second end of described the 12 resistance R 12 is connected with described the second negative input of amplifier A2 and the first end of described the 13 resistance R 13 respectively, the second end of described the 8th resistance R 8 is connected with the first end of described the 9th capacitor C 9 and the electrode input end of described the second amplifier A2 respectively, the second end ground connection of described the 9th capacitor C 9.
Described differential amplifier circuit comprises the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7 and the first amplifier A1, the first end of described the 4th resistance R 4 is connected with the 7th pin of described phase-locked loop intergrated circuit IC, the second end of described the 4th resistance R 4 is connected with the electrode input end of described the first amplifier A1 and the first end of described the 5th resistance R 5 respectively, the second end ground connection of described the 5th resistance R 5, the first end of described the 6th resistance R 6 is connected with the 6th pin of described phase-locked loop intergrated circuit IC, the second end of described the 6th resistance R 6 is connected with the negative input of described the first amplifier A1 and the first end of described the 7th resistance R 7 respectively, the second end of described the 7th resistance R 7 is connected with the output of described the first amplifier A1.
Described level shifting circuit comprises the 14 resistance R 14, the 15 resistance R 15, the 16 resistance R 16, the 17 resistance R 17, the 3rd amplifier A3, the 11 capacitor C 11, the second potentiometer RP2 and ammeter mA, the first end of described the 14 resistance R 14 is connected with the negative input of described the 3rd amplifier A3, the electrode input end of described the 3rd amplifier A3 is connected with the first end of described ammeter mA and the first end of described the 11 capacitor C 11 respectively, the second end of described ammeter mA is connected with the first end of described the 17 resistance R 17 with the second end of described the 11 capacitor C 11, the second end of described the 17 resistance R 17 is connected with the first end of described the 16 resistance R 16, the second end of described the 16 resistance R 16 is connected with described the 14 first end of resistance R 14 and the first end of the 15 resistance R 15 respectively, the second end of described the 15 resistance R 15 is connected with the sliding end of described the second potentiometer RP2.

Claims (3)

1. a New Anti-interference modulator-demodulator, it is characterized in that: comprise phase-locked loop circuit, differential amplifier circuit, filter circuit and level shifting circuit, described phase-locked loop circuit comprises phase-locked loop intergrated circuit, the first potentiometer, the first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th electric capacity, the 5th electric capacity, the 6th electric capacity, the first resistance, the second resistance and the 3rd resistance, the first end of described the first electric capacity is audio input end, the second end of described the first electric capacity is connected with the second pin of described phase-locked loop intergrated circuit and the first end of described the first resistance respectively, the second end of described the first resistance is connected with the first end of described the second resistance respectively, the second end of described the second resistance is connected with the 3rd pin of described phase-locked loop intergrated circuit, the first pin of described phase-locked loop intergrated circuit is connected with the first end of described the second electric capacity, the second end of described the second electric capacity is connected with the first end of described the 3rd electric capacity and the 9th pin of described phase-locked loop intergrated circuit respectively, the 8th pin of described phase-locked loop intergrated circuit is connected with the first end of described the 3rd resistance and the first end of described the 6th electric capacity respectively, the second end of described the 3rd resistance is connected with the first end of described the first potentiometer, the second end of described the first potentiometer is all connected with the first end of described the 4th electric capacity with the sliding end of described the first potentiometer, the second end ground connection of described the 4th electric capacity, the tenth pin of described phase-locked loop intergrated circuit is connected with the first end of described the 5th electric capacity, the second end of described the 5th electric capacity is connected with the second end of described the 6th electric capacity respectively, described filter circuit comprises the 7th electric capacity, the 8th electric capacity, the 9th electric capacity, the tenth electric capacity, the 8th resistance, the 9th resistance, the tenth resistance, the 11 resistance, the 12 resistance, the 13 resistance and the second amplifier, described the 11 first end of resistance and the output of described differential amplifier circuit are connected, the second end of described the 11 resistance is connected with the first end of described the 8th electric capacity and the first end of described the tenth resistance respectively, the second end of described the tenth resistance is connected with the first end of described the 9th resistance and the first end of described the tenth electric capacity respectively, the second end ground connection of described the tenth electric capacity, the second end of described the 9th resistance is connected with the first end of described the 7th electric capacity and the first end of described the 8th resistance respectively, the second end of described the 7th electric capacity is connected with the first end of described the 12 resistance respectively, the second end of described the 12 resistance is connected with the negative input of described the second amplifier and the first end of described the 13 resistance respectively, the second end of described the 8th resistance is connected with the first end of described the 9th electric capacity and the electrode input end of described the second amplifier respectively, the second end ground connection of described the 9th electric capacity.
2. New Anti-interference modulator-demodulator according to claim 1, it is characterized in that: described differential amplifier circuit comprises the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance and the first amplifier, the first end of described the 4th resistance is connected with the 7th pin of described phase-locked loop intergrated circuit, the second end of described the 4th resistance is connected with the electrode input end of described the first amplifier and the first end of described the 5th resistance respectively, the second end ground connection of described the 5th resistance, the first end of described the 6th resistance is connected with the 6th pin of described phase-locked loop intergrated circuit, the second end of described the 6th resistance is connected with the negative input of described the first amplifier and the first end of described the 7th resistance respectively, the second end of described the 7th resistance is connected with the output of described the first amplifier.
3. New Anti-interference modulator-demodulator according to claim 1, it is characterized in that: described level shifting circuit comprises the 14 resistance, the 15 resistance, the 16 resistance, the 17 resistance, the 3rd amplifier, the 11 electric capacity, the second potentiometer and ammeter, the first end of described the 14 resistance is connected with the negative input of described the 3rd amplifier, the electrode input end of described the 3rd amplifier is connected with the first end of described ammeter and the first end of described the 11 electric capacity respectively, the second end of described ammeter is connected with the first end of described the 17 resistance with the second end of described the 11 electric capacity, the second end of described the 17 resistance is connected with the first end of described the 16 resistance, the second end of described the 16 resistance is connected with described the 14 first end of resistance and the first end of the 15 resistance respectively, the second end of described the 15 resistance is connected with the sliding end of described the second potentiometer.
CN201310088661.XA 2013-03-20 2013-03-20 Novel anti-interference modulator-demodulator Pending CN104065843A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080002788A1 (en) * 2005-08-11 2008-01-03 Texas Instruments Inc. Local oscillator incorporating phase command exception handling utilizing a quadrature switch
CN102684744A (en) * 2012-05-18 2012-09-19 苏州东奇信息科技有限公司 Power supply self-synchronizing phase inversion modulator-demodulator for power line communication
CN102843129A (en) * 2012-08-31 2012-12-26 华为技术有限公司 Phase-locked loop, microwave modem and phase jump suppressing method
CN203181056U (en) * 2013-03-20 2013-09-04 成都世旗电子科技有限公司 Novel anti-interference modem

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080002788A1 (en) * 2005-08-11 2008-01-03 Texas Instruments Inc. Local oscillator incorporating phase command exception handling utilizing a quadrature switch
CN102684744A (en) * 2012-05-18 2012-09-19 苏州东奇信息科技有限公司 Power supply self-synchronizing phase inversion modulator-demodulator for power line communication
CN102843129A (en) * 2012-08-31 2012-12-26 华为技术有限公司 Phase-locked loop, microwave modem and phase jump suppressing method
CN203181056U (en) * 2013-03-20 2013-09-04 成都世旗电子科技有限公司 Novel anti-interference modem

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Application publication date: 20140924