CN104122805A - Digital satellite equipment control signal generation circuit and relevant signal generation method - Google Patents
Digital satellite equipment control signal generation circuit and relevant signal generation method Download PDFInfo
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- CN104122805A CN104122805A CN201310149315.8A CN201310149315A CN104122805A CN 104122805 A CN104122805 A CN 104122805A CN 201310149315 A CN201310149315 A CN 201310149315A CN 104122805 A CN104122805 A CN 104122805A
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Abstract
The invention brings forward a digital satellite equipment control signal generation circuit and a relevant signal generation method. According to one embodiment, the control signal generation circuit contains a comparison circuit, a current regulation circuit, a switch, a potential selection circuit and a filter circuit. The comparison circuit regulates operation of the current regulation circuit according to a reference voltage signal so as to generate first, second and third voltage signals. The potential selection circuit will set conducting state of the switch so as to transmit the first, second and third voltage signals to the filter circuit respectively. During a first period, the potential selection circuit will transmit the second voltage signal and the third voltage signal to the filter circuit alternately so as to generate an AC signal. During a second period, the potential selection circuit will only transmit the first voltage signal to the filter circuit so as to generate a DC signal. By the above digital satellite equipment control signal generation circuit, influence caused by high-frequency noise and low-frequency noise can be reduced, and low-noise DC signals and AC signals are provided.
Description
Technical field
The relevant signal generating circuit of the present invention, espespecially a kind of signal generating circuit of digital satellite equipment control protocol and relevant signal generating method.
Background technology
Along with scientific and technological progress, satellite communication has been applied in the middle of daily life at large, and for example, many users can receive by satellite communication multimedia video to view and admire.User can use outdoor antenna reception satellite-signal conventionally, then uses box on indoor machine (set top box) demodulation of satellite signal to view and admire.In addition, user can also be by devices such as box control disc-shaped antenna (dish antenna) or signal selectors on machine, and need not hurry back and forth back and forth in indoor and outdoor, just can adjust easily the direction of disc-shaped antenna or select signal source.
Digital satellite equipment control protocol (digital satellite equipment control protocol, DiSEqC protocol) is a kind of communications protocol being applied between the devices such as box on machine, antenna or signal selector.In digital satellite equipment control protocol, can transmit power supply and carry out two-way signal transmission by coaxial wire.For example, in the time of satellite-signal that on machine, box receiving antenna transmits, on machine, box can send power supply and control signal to antenna simultaneously, the running that the motor in antenna can be turned to, with adjust antenna direction and can clearer receiving satellite signal.
In digital satellite equipment control protocol, on machine, box need to transmit the direct current signal of 12～20 volts to antenna, and sometimes need to be on direct current signal the AC signal of superposition 22 kilo hertzs (kilohertz, KHz), so that antenna is carried out to required control.But; the 22KHz AC signal that on machine, box provides often has the harmonic wave (harmonic) of high frequency; cause the satellite-signal that on machine, box receives from antenna to be easily interfered, and affected the usefulness receiving, the problems such as the multimedia video receiving thereby generation deterioration.
In addition, in the time that the AC signal superpositions of 22 kilo hertzs are on direct current signal, the AC signal of 22 kilo hertzs can cause the noise of low frequency, and causes the direct current signal position standard that on machine, box transmits inaccurate, and the running of control antenna or other devices exactly.
Summary of the invention
In view of this, how in the application of digital satellite equipment control protocol, alleviate or eliminate the humorous noise that involves in control signal, real have problem to be solved for industry.
This instructions provides a kind of digital satellite equipment control signal to produce the embodiment of circuit, include: a matrix current adjustment circuit, include a first end, one second end and a control end, this first end of this matrix current adjustment circuit is used for coupling one first preset potential, this of this matrix current adjustment circuit the second end is for coupling a first end of one first resistance, one second end of this first resistance is for being coupled to a first end of one second resistance, one second end of this second resistance is for coupling a first end of one the 3rd resistance, one second end of the 3rd resistance is used for coupling one second preset potential, one first switch, for being coupled to this second end of this matrix current adjustment circuit and this first end of this first resistance, to receive a second voltage signal, one second switch, for being coupled to this second end of this first resistance and this first end of this second resistance, to receive one first voltage signal, one the 3rd switch, for being coupled to this second end of this second resistance and this first end of the 3rd resistance, to receive a tertiary voltage signal, one comparator circuit, include a first input end, one second input end and an output terminal, this first input end of this comparator circuit is used for receiving a reference voltage signal, this of this comparator circuit the second input end is for coupling this second end of this first resistance and this first end of this second resistance, to receive this first voltage signal, this output terminal of this comparator circuit is coupled to this control end of this matrix current adjustment circuit, this comparator circuit is according to this reference voltage signal and this first voltage signal, and adjusts the running of this matrix current adjustment circuit, one filtering circuit, is coupled to this first switch, this second switch and the 3rd switch, and one current potential select circuit, be coupled to this first switch, this second switch and the 3rd switch, in one first period according to alternately one of them of this first switch of conducting and the 3rd switch of a clock signal, so that this second voltage signal and this tertiary voltage signal are alternately sent to this filtering circuit, and in only this second switch of conducting of one second period, so that this first voltage signal is sent to this filtering circuit, wherein this second voltage signal of this first period and this tertiary voltage signal are carried out filtering by this filtering circuit, so that an AC signal to be provided, and provides a direct current signal according to this first voltage signal of this second period.
This instructions separately provides a kind of embodiment of digital satellite equipment control signal production method, in order to being set, a signal generating circuit provides digital satellite equipment control signal, this signal generating circuit includes: a matrix current adjustment circuit, include a first end, one second end and a control end, this first end of this matrix current adjustment circuit is used for coupling one first preset potential, this of this matrix current adjustment circuit the second end is for coupling a first end of one first resistance, one second end of this first resistance is for being coupled to a first end of one second resistance, one second end of this second resistance is for coupling a first end of one the 3rd resistance, one second end of the 3rd resistance is used for coupling one second preset potential, one first switch, for being coupled to this second end of this matrix current adjustment circuit and this first end of this first resistance, to receive a second voltage signal, one second switch, for being coupled to this second end of this first resistance and this first end of this second resistance, to receive one first voltage signal, one the 3rd switch, for being coupled to this second end of this second resistance and this first end of the 3rd resistance, to receive a tertiary voltage signal, one comparator circuit, include a first input end, one second input end and an output terminal, this first input end of this comparator circuit is used for receiving a reference voltage signal, this of this comparator circuit the second input end is for coupling this second end of this first resistance and this first end of this second resistance, to receive this first voltage signal, this output terminal of this comparator circuit is coupled to this control end of this matrix current adjustment circuit, this comparator circuit is according to this reference voltage signal and this first voltage signal, and adjusts the running of this matrix current adjustment circuit, one filtering circuit, is coupled to this first switch, this second switch and the 3rd switch, and one current potential select circuit, be coupled to this first switch, this second switch and the 3rd switch, the method includes: in one first period according to alternately one of them of this first switch of conducting and the 3rd switch of a clock signal, so that this second voltage signal and this tertiary voltage signal are alternately sent to this filtering circuit, this second voltage signal of this first period and this tertiary voltage signal are carried out filtering by this filtering circuit, so that an AC signal to be provided, and in only this second switch of conducting of one second period, so that this first voltage signal is sent in this filtering circuit, and this filtering circuit provides a direct current signal according to this first voltage signal of this second period.
One of advantage of above-described embodiment is that high frequency noise and low-frequency noise can not be coupled to direct current signal and the AC signal that signal generating circuit is exported, and can reduce the impact that high frequency noise and low-frequency noise cause.Other advantages of the present invention will explain orally in more detail by the following description and accompanying drawing.
Brief description of the drawings
Accompanying drawing described herein is used to provide further understanding of the present application, forms the application's a part, and the application's schematic description and description is used for explaining the application, does not form the improper restriction to the application.
Fig. 1 is the functional block diagram after the signal generating circuit of one embodiment of the invention is simplified.
Fig. 2 is that the current potential of Fig. 1 is selected the functional block diagram after an embodiment of circuit simplifies.
Fig. 3 to Fig. 6 selects the sequential chart after several embodiment of the switch controlling signal that produces of circuit simplify for current potential.
Fig. 7 is the functional block diagram after an embodiment of the filtering circuit of Fig. 1 simplifies.
Embodiment
Below will coordinate relevant drawings that the present invention's embodiment is described.In these accompanying drawings, identical label represents same or similar element or or method flow.
Fig. 1 is the functional block diagram after the signal generating circuit 100 of one embodiment of the invention is simplified, signal generating circuit 100 (for example can be arranged in the equipment of various digital satellite equipment controls, be arranged at box on machine), and can be for generation of the required direct current signal of digital satellite equipment control protocol and AC signal, for example, the AC signal of the direct current signal of 12～20 volts and 22 kilo hertzs.Signal generating circuit 100 includes voltage source circuit 110, comparator circuit 120, matrix current adjustment circuit 130, resistance 141,142 and 143, current potential is selected circuit 160, switch 171,172 and 173 and filtering circuit 180.For making drawing concisely be easy to explanation, other elements and the annexation of signal generating circuit 100 are not illustrated in Fig. 1.
Voltage source circuit 110 is set to provide the reference voltage signal Vref of multiple unlike signal values, and can adopt the circuit framework that various active members and/or passive device form to implement.For example, adopt the circuit frameworks such as band gap (bandgap) circuit or charge pump (charge pump) circuit to implement.In one embodiment, corresponding to 12～20 required volt DC signals of digital satellite equipment control protocol, voltage source circuit 110 can produce the reference voltage signal Vref of multiple unlike signal values, makes signal generating circuit 100 can produce accordingly signal value between the direct current signal of 12～20 volts.
The voltage signal VM that comparator circuit 120 provides according to the voltage source circuit 110 reference voltage signal Vref that provides and matrix current adjustment circuit 130, and the running of matrix current adjustment circuit 120 is set accordingly.Comparator circuit 120 can adopt the circuit framework with gain or not tool gain to implement.
In the present embodiment, matrix current adjustment circuit 130 uses transistorized mode to implement, for example, and mosfet transistor and BJT transistor etc.In other embodiments, matrix current adjustment circuit 130 can adopt the circuit framework that various active members and/or passive device form to implement.The first end of matrix current adjustment circuit 130 (is for example coupled to the first preset potential V1, the current potential of 5 volts), the second end of matrix current adjustment circuit 130 is coupled to the first end of resistance 141, the second end of the first resistance 141 is coupled to the first end of the second resistance 142, the second end of the second resistance 142 is coupled to the first end of the 3rd resistance 143, the second end of the 3rd resistance 143 is coupled to the second preset potential V2 (for example, the current potential of earth terminal).The control end of matrix current adjustment circuit 130 is coupled to comparator circuit 120, can adjust provided electric current according to the setting of comparator circuit 120.
In the present embodiment, the current potential of the first preset potential V1 is set to the current potential higher than the second preset potential V2, so that explanation.In other embodiments, the current potential of the first preset potential V1 also can be set to the current potential lower than the second preset potential V2, and matrix current adjustment circuit 130 is carried out to corresponding adjustment.
First node 151 is coupled to the second end of matrix current adjustment circuit 130 and the first end of resistance 141, and second voltage signal VH can be provided.Section Point 152 is coupled to the second end of resistance 141 and the first end of resistance 142, and the first voltage signal VM can be provided.The 3rd node 153 is coupled to the second end of resistance 142 and the first end of resistance 143, and tertiary voltage signal VL can be provided.In the present embodiment, resistance 141 and 142 is set to have identical in fact resistance value Rc, and resistance 143 is set to have variable resistance value Rv.On the implementation, resistance 143 can include one or more impedors, and can be according to the signal value of voltage signal VM and/or other control signal, and is set to required resistance value.Therefore, voltage signal VH=VM+Rc (VM/ (Rc+Rv)), and voltage signal VL=VM-Rc (VM/ (Rc+Rv)).Voltage signal VH, VM and VL, after the processing of other circuit of signal generating circuit 100, just can produce required AC signal, and the amplitude of AC signal can present proportionate relationship with Rc (VM/ (Rc+Rv)).
Due in the time that the numerical value of reference voltage signal Vref is different, voltage signal VM also can change thereupon.In one embodiment, in order to make the signal generating circuit 100 can be punctual in different direct current positions, all can export the AC signal of same-amplitude, can be according to voltage signal VM the resistance value Rv of adjusting resistance 143, make Rc (VM/ (Rc+Rv)) maintain a fixed value, and make signal generating circuit 100 can export the AC signal of same-amplitude.In another embodiment, also can be according to the signal value of reference voltage signal Vref the resistance value Rv of adjusting resistance 143, make Rc (VM/ (Rc+Rv)) maintain a fixed value, and make signal generating circuit 100 can export the AC signal of same-amplitude.In another embodiment, also can be respectively according to voltage signal VM, reference voltage signal Vref and/or other control signal and the resistance value of adjusting resistance 141,142 and 143, make Rc (VM/ (Rc+Rv)) maintain a fixed value, and make the signal generating circuit 100 can be punctual in different direct current positions, all can export the AC signal of same-amplitude.
Current potential selects circuit 160 to produce circuit 100 inside or outside signals by basis signal, and the conducting state of switch 171,172 and 173 is set with switch controlling signal DM, DH and DL respectively.In the present embodiment, switch 171,172 and 173 adopts transistorized mode to implement, and in other embodiments, switch 171,172 and 173 also can adopt respectively the circuit framework that various active members and/or passive device form to implement.Current potential selects the circuit 160 can be by actuating switch 171 and 173 alternately, offer filtering circuit 180 with the voltage signal Vsqu that voltage signal VH and VL are formed, and by one of them of actuating switch 171,172 and 173, one of them of voltage signal VH, VM and VL is output as to voltage signal Vsqu, to offer filtering circuit 180.Voltage signal Vsqu can be AC signal or direct current signal.
Filtering circuit 180 can adopt various suitable circuit frameworks, and to produce output signal Vsin according to voltage signal Vsqu, output signal Vsin can be AC signal or direct current signal.For example, filtering circuit 180 can adopt the modes such as low-pass filter circuit to implement.In one embodiment, the signal that it is 44 kilo hertzs that filtering circuit 180 is set to the frequency 20 decibels of (decibel that at least decay, dB) (being the signal of 22 kilo hertzs with respect to frequency), and be the signal (for example, frequency is the signal of 44 kilo hertzs, 66 kilo hertzs and 88 kilo hertzs) at least decay 20 decibels (being the signal of 22 kilo hertzs with respect to frequency) of the integral multiple of 22 kilo hertzs by frequency.Therefore, filtering circuit 180 can carry out the harmonic wave of 22 kilo hertzs of AC signal the decay of enough degree.
In the above-described embodiment, in the time of signal generating circuit 100 wish output direct current signal, current source circuit 110 can be set and export corresponding reference voltage signal Vref, and matrix current adjustment circuit 130 is set and resistance 141～143 produces required voltage signal VH, VM and VL accordingly, and current potential is set selects circuit 160 to produce the switch controlling signal DM of noble potential, so that voltage signal VM is sent to filtering circuit 180, and can provide the direct current signal corresponding to voltage signal VM.In other embodiments, current potential selects circuit 160 also can produce respectively required switch controlling signal DH, DM and DL, so that one of them of voltage signal VH, VM and VL is sent to filtering circuit 180, and can provide required direct current signal.
In the time that signal generating circuit 100 is wanted output AC signal, current source circuit 110 can be set and export corresponding reference voltage signal Vref, and matrix current adjustment circuit 130 is set and resistance 141～143 produces required voltage signal VH, VM and VL accordingly, and current potential is set selects circuit 160 alternately to produce switch controlling signal DH and the DL of noble potential, so that voltage signal VH and VL are alternately sent to filtering circuit 180, the voltage signal VH receiving and VL are carried out filtering operation by filtering circuit 180, and the AC signal of 22 kilo hertzs can be provided.
In one embodiment, in the time of signal generating circuit 100 wish output direct current signal, current potential selects circuit 160 can produce the switch controlling signal DM of noble potential and switch controlling signal DH and the DL of electronegative potential, so that voltage signal VM is sent to filtering circuit 180.In the time that signal generating circuit 100 wishs are exported the AC signal of 22 kilo hertzs, current potential selects circuit 160 can produce alternately the switch controlling signal DH of noble potential and the switch controlling signal DM of DL and electronegative potential, so that voltage signal VH and VL are alternately sent to filtering circuit 180.
Fig. 2 is that the current potential of Fig. 1 is selected the functional block diagram after an embodiment of circuit 160 simplifies.In the embodiment of Fig. 2, current potential selects circuit 160 to include AND circuit (AND gate circuit) 211～219, negative circuit 231～233, OR circuit (OR gate circuit) 251 and 252, with clock signal CLOCK, mode signal MODE, lock signal GATE and outer tonal signal EXTM according to 22 kilo hertzs, and produce required switch controlling signal DH, DH and DL.For making drawing concisely be easy to explanation, current potential selects other elements and the annexation of circuit 160 not to be illustrated in Fig. 2.
In the embodiment of Fig. 2, the input end of AND circuit 211 is set to receive lock signal GATE and outer tonal signal EXTM, and carries out and computing (AND), and negative circuit 231 can be carried out anti-phase computing to mode signal MODE.
AND circuit 212 can be to AND circuit 211 output signal and mode signal MODE carries out and computing.The output signal that AND circuit 213 can be to AND circuit 211 and the output signal of negative circuit 231 is carried out and computing.
AND circuit 214 can be to AND circuit 212 output signal and clock signal CLOCK carries out and computing, AND circuit 215 can be to AND circuit 213 output signal and outer tonal signal EXTM carries out and computing, AND circuit 216 can be to AND circuit 211 output signal and mode signal MODE carries out and computing, the output signal that AND circuit 217 can be to negative circuit 231 and lock signal GATE carries out and computing.
The output signal that OR circuit 251 can be to the AND circuit 214 and output signal of AND circuit 215 is carried out or computing (OR), the output signal that OR circuit 252 can be to AND circuit 216 and the output signal of AND circuit 217 is carried out or computing.
Negative circuit 232 can be carried out anti-phase computing to the output signal of OR circuit 251.Negative circuit 233 can be carried out anti-phase computing to the output signal of OR circuit 252, to produce switch controlling signal DM.
AND circuit 218 output signal of the output signal of OR circuit 252 and negative circuit 232 can be carried out and computing, and produce switch controlling signal DL.
AND circuit 219 can by the output signal of the output signal of OR circuit 251 and negative circuit 233 and carry out and computing, and produce switch controlling signal DH.
The embodiment of Fig. 2 is only one of possible embodiment, and current potential selects circuit 160 can adopt various logic circuitry, signal processing circuit, microcontroller and/or other circuit component to implement, to produce required switch controlling signal DH, DM and DL.
Fig. 3 to Fig. 6 selects the sequential chart after several embodiment of the switch controlling signal that produces of circuit 160 simplify for current potential, below will further illustrate with Fig. 2 to Fig. 6 current potential and select the function mode of circuit 160.
In the embodiments of figure 3, mode signal MODE is set to noble potential, and outer tonal signal EXTM is set to noble potential.In the time that lock signal GATE is set to noble potential, current potential selects circuit 160 can alternately produce switch controlling signal DH and the DL of noble potential, alternately voltage signal VH and VL are output as to voltage signal Vsqu, filtering circuit 180 can produce the output signal Vsin that frequency is the form of communication of 22 kilo hertzs according to voltage signal Vsqu.In the time that lock signal GATE is set to electronegative potential, current potential selects circuit 160 can produce the switch controlling signal DM of noble potential, so that voltage signal VM is output as to voltage signal Vsqu, filtering circuit 180 can produce according to voltage signal Vsqu the output signal Vsin of direct current form.
In the embodiment of Fig. 4, mode signal MODE is set to noble potential, and lock signal GATE is set to noble potential.In the time that outer tonal signal EXTM is set to noble potential, current potential selects circuit 160 can alternately produce switch controlling signal DH and the DL of noble potential, alternately voltage signal VH and VL are output as to voltage signal Vsqu, filtering circuit 180 can produce the output signal Vsin that frequency is the form of communication of 22 kilo hertzs according to voltage signal Vsqu.In the time that outer tonal signal EXTM is set to electronegative potential, current potential selects circuit 160 can produce the switch controlling signal DM of noble potential, so that voltage signal VM is output as to voltage signal Vsqu, filtering circuit 180 can produce according to voltage signal Vsqu the output signal Vsin of direct current form.
In the embodiment of Fig. 5, mode signal MODE is set to electronegative potential.In the time that lock signal GATE is set to noble potential, current potential selects circuit 160 can alternately produce according to outer tonal signal EXTM switch controlling signal DH and the DL of noble potential, alternately voltage signal VH and VL are output as to voltage signal Vsqu, filtering circuit 180 can produce the output signal Vsin that frequency is the form of communication of 22 kilo hertzs according to voltage signal Vsqu.In the time that lock signal GATE is set to electronegative potential, current potential selects circuit 160 can produce the switch controlling signal DM of noble potential, so that voltage signal VM is output as to voltage signal Vsqu, filtering circuit 180 can produce according to voltage signal Vsqu the output signal Vsin of direct current form.
In the embodiment of Fig. 6, mode signal MODE is set to electronegative potential, and lock signal is set to noble potential.In the time that outer tonal signal EXTM is set to noble potential, current potential is selected the switch controlling signal DH of circuit 160 meeting generation noble potentials, so that voltage signal VH is output as to voltage signal Vsqu.In the time that outer tonal signal EXTM is set to electronegative potential, current potential is selected the switch controlling signal DL of circuit 160 meeting generation noble potentials, so that voltage signal VL is output as to voltage signal Vsqu.It is the output signal Vsin of form of communication or the output signal Vsin of direct current form of 22 kilo hertzs that filtering circuit 180 can produce according to voltage signal Vsqu frequency.
Fig. 7 is the functional block diagram after an embodiment of the filtering circuit 180 of Fig. 1 simplifies.Filtering circuit 180 includes resistance 711～714, electric capacity 721～724 and amplifying circuit 731 and 732, resistance 711 and 712, electric capacity 721 and 722 and amplifying circuit 731 be a second-order low-pass filter circuit, and resistance 713 and 714, electric capacity 723 and 724 and amplifying circuit 732 be also a second-order low-pass filter circuit.The yield value of the resistance value of resistance 711～714 and electric capacity 721～724 and amplifying circuit 731 and 732 all can divide other adjustment, make filtering circuit 180 that the suitable characteristic such as frequency response and gain can be provided, the harmonic wave of 22 kilo hertzs of AC signal is carried out to the decay of enough degree.
In the above-described embodiment, each function square all can adopt respectively the mode of one or more circuit components to implement, and multiple function square also may be integrated in one or more circuit components.For example, each function square of above-described embodiment is integrated in to an integrated circuit (IC) chip, and each function square all can be arranged at according to different design considerations inside and/or the outside of integrated circuit (IC) chip.
In the above-described embodiment, in the time that signal generating circuit 100 provides direct current signal, filtering circuit 180 also can be set to voltage signal VM not carried out to filtering operation, and directly voltage signal VM is output as to direct current signal.
In the above-described embodiment, the reference voltage signal Vref that the comparator circuit 120 of signal generating circuit 100 can produce according to voltage source circuit 110, and matrix current adjustment circuit 130 is set and resistance 141,142 and 143 produces identical in fact voltage signal VM accordingly.Therefore, the low-frequency noise that voltage source circuit 110 produces can not be coupled to direct current signal and the AC signal that signal generating circuit 100 is exported, and can reduce the impact that low-frequency noise causes.
In addition, the current potential of signal generating circuit 100 is selected the clock signal of 22 kilo hertzs of circuit 160 meeting foundations and is produced corresponding switch controlling signal, so that voltage signal VH and VL are alternately sent to filtering circuit 180.Therefore, high frequency noise and low-frequency noise that internal frequency signal generating circuit or foreign frequency signal generating circuit produce, can not be coupled to direct current signal and AC signal that signal generating circuit 100 is exported, and can reduce the impact that high frequency noise and low-frequency noise cause.
In instructions and claims, use some vocabulary to censure specific element.Person of ordinary skill in the field should understand, and same element may be called with different nouns.This specification and claims book is not used as distinguishing the mode of element with the difference of title, but the difference in function is used as the benchmark of distinguishing with element." comprising " mentioned in instructions and claims is open term, should be construed to " comprise but be not limited to ".In addition, " coupling " word comprises directly any and indirectly connects means at this.Therefore, be coupled to the second element if describe the first element in literary composition, represent that the first element can directly be connected in the second element by the signal such as electric connection or wireless transmission, optical delivery connected mode, or by other element or connection means indirectly electrically or signal be connected to the second element.
Used herein " and/or " describing mode, comprise cited one of them or the combination in any of multiple projects.In addition, unless in instructions, specialize, the term of any odd number lattice all comprises the connotation of plural lattice simultaneously.
The embodiment that the foregoing is only the application, is not limited to the application, and for a person skilled in the art, the application can have various modifications and variations.All within the application's spirit and principle, any amendment of doing, be equal to replacement, improvement etc., within all should being included in the application's claim scope.
Claims (10)
1. digital satellite equipment control signal produces a circuit, includes:
One matrix current adjustment circuit, include a first end, one second end and a control end, this first end of this matrix current adjustment circuit is used for coupling one first preset potential, this of this matrix current adjustment circuit the second end is for coupling a first end of one first resistance, one second end of this first resistance is for being coupled to a first end of one second resistance, one second end of this second resistance is for coupling a first end of one the 3rd resistance, and one second end of the 3rd resistance is used for coupling one second preset potential;
One first switch, for being coupled to this second end of this matrix current adjustment circuit and this first end of this first resistance, to receive a second voltage signal;
One second switch, for being coupled to this second end of this first resistance and this first end of this second resistance, to receive one first voltage signal;
One the 3rd switch, for being coupled to this second end of this second resistance and this first end of the 3rd resistance, to receive a tertiary voltage signal;
One comparator circuit, include a first input end, one second input end and an output terminal, this first input end of this comparator circuit is used for receiving a reference voltage signal, this of this comparator circuit the second input end is for coupling this second end of this first resistance and this first end of this second resistance, to receive this first voltage signal, this output terminal of this comparator circuit is coupled to this control end of this matrix current adjustment circuit, this comparator circuit is according to this reference voltage signal and this first voltage signal, and adjusts the running of this matrix current adjustment circuit;
One filtering circuit, is coupled to this first switch, this second switch and the 3rd switch; And
One current potential is selected circuit, be coupled to this first switch, this second switch and the 3rd switch, in one first period according to alternately one of them of this first switch of conducting and the 3rd switch of a clock signal, so that this second voltage signal and this tertiary voltage signal are alternately sent to this filtering circuit, and in only this second switch of conducting of one second period, so that this first voltage signal is sent to this filtering circuit;
Wherein this second voltage signal of this first period and this tertiary voltage signal are carried out filtering by this filtering circuit, so that an AC signal to be provided, and provides a direct current signal according to this first voltage signal of this second period.
2. digital satellite equipment control signal as claimed in claim 1 produces circuit, and wherein this first resistance has identical resistance value with this second resistance.
3. digital satellite equipment control signal as claimed in claim 1 or 2 produces circuit, wherein the resistance value of the 3rd resistance can according to this first voltage signal and this reference voltage signal at least one of them and change.
4. digital satellite equipment control signal as claimed in claim 1 or 2 produces circuit, and wherein this current potential selects circuit according to a clock signal, a mode signal, a lock signal and an outer tonal signal, and the conducting state of this first switch and the 3rd switch is set.
5. digital satellite equipment control signal as claimed in claim 4 produces circuit, and wherein this current potential selects circuit can be according to this mode signal, this lock signal and this outer tonal signal, and the conducting state of this second switch is set.
6. a digital satellite equipment control signal production method, in order to being set, a signal generating circuit provides digital satellite equipment control signal, this signal generating circuit includes: a matrix current adjustment circuit, include a first end, one second end and a control end, this first end of this matrix current adjustment circuit is used for coupling one first preset potential, this of this matrix current adjustment circuit the second end is for coupling a first end of one first resistance, one second end of this first resistance is for being coupled to a first end of one second resistance, one second end of this second resistance is for coupling a first end of one the 3rd resistance, one second end of the 3rd resistance is used for coupling one second preset potential, one first switch, for being coupled to this second end of this matrix current adjustment circuit and this first end of this first resistance, to receive a second voltage signal, one second switch, for being coupled to this second end of this first resistance and this first end of this second resistance, to receive one first voltage signal, one the 3rd switch, for being coupled to this second end of this second resistance and this first end of the 3rd resistance, to receive a tertiary voltage signal, one comparator circuit, include a first input end, one second input end and an output terminal, this first input end of this comparator circuit is used for receiving a reference voltage signal, this of this comparator circuit the second input end is for coupling this second end of this first resistance and this first end of this second resistance, to receive this first voltage signal, this output terminal of this comparator circuit is coupled to this control end of this matrix current adjustment circuit, this comparator circuit is according to this reference voltage signal and this first voltage signal, and adjusts the running of this matrix current adjustment circuit, one filtering circuit, is coupled to this first switch, this second switch and the 3rd switch, and one current potential select circuit, be coupled to this first switch, this second switch and the 3rd switch, the method includes:
In one first period according to alternately one of them of this first switch of conducting and the 3rd switch of a clock signal, so that this second voltage signal and this tertiary voltage signal are alternately sent to this filtering circuit, this second voltage signal of this first period and this tertiary voltage signal are carried out filtering by this filtering circuit, so that an AC signal to be provided; And
In only this second switch of conducting of one second period, so that this first voltage signal is sent in this filtering circuit, and this filtering circuit provides a direct current signal according to this first voltage signal of this second period.
7. digital satellite equipment control signal production method as claimed in claim 6, separately comprises:
This first resistance is set to have identical resistance value with this second resistance.
8. the digital satellite equipment control signal production method as described in claim 6 or 7, separately comprises:
The resistance value of the 3rd resistance be set to according to this first voltage signal and this reference voltage signal at least one of them and change.
9. the digital satellite equipment control signal production method as described in claim 6 or 7, separately comprises:
This current potential is set and selects circuit according to a clock signal, a mode signal, a lock signal and an outer tonal signal, and the conducting state of this first switch and the 3rd switch is set.
10. digital satellite equipment control signal production method as claimed in claim 9, separately comprises:
This current potential is set and selects circuit according to this mode signal, this lock signal and this outer tonal signal, and the conducting state of this second switch is set.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310149315.8A CN104122805B (en) | 2013-04-26 | 2013-04-26 | Digital satellite equipment control signal produces circuit and relevant signal generating method |
Applications Claiming Priority (1)
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|---|---|---|---|---|
| CN1558244A (en) * | 2004-01-13 | 2004-12-29 | 王振铎 | Wireless telemetering system for wire loaded current |
| US20070035340A1 (en) * | 2005-08-12 | 2007-02-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device and electronic device equipped with the semiconductor device |
| US20080039035A1 (en) * | 2006-08-10 | 2008-02-14 | Joshua Posamentier | Antenna based listen-before-talk apparatus, system and method |
| CN101621250A (en) * | 2008-07-01 | 2010-01-06 | 立锜科技股份有限公司 | Detecting device for output current of voltage regulator and method |
| CN101895698A (en) * | 2010-06-29 | 2010-11-24 | 苏州市华芯微电子有限公司 | Integrated circuit with functions of bias and polarization selection |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1558244A (en) * | 2004-01-13 | 2004-12-29 | 王振铎 | Wireless telemetering system for wire loaded current |
| US20070035340A1 (en) * | 2005-08-12 | 2007-02-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device and electronic device equipped with the semiconductor device |
| US20080039035A1 (en) * | 2006-08-10 | 2008-02-14 | Joshua Posamentier | Antenna based listen-before-talk apparatus, system and method |
| CN101621250A (en) * | 2008-07-01 | 2010-01-06 | 立锜科技股份有限公司 | Detecting device for output current of voltage regulator and method |
| CN101895698A (en) * | 2010-06-29 | 2010-11-24 | 苏州市华芯微电子有限公司 | Integrated circuit with functions of bias and polarization selection |
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