CN104409533A - Insb infrared focal plane detector array and manufacture method thereof - Google Patents
Insb infrared focal plane detector array and manufacture method thereof Download PDFInfo
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- CN104409533A CN104409533A CN201410667776.9A CN201410667776A CN104409533A CN 104409533 A CN104409533 A CN 104409533A CN 201410667776 A CN201410667776 A CN 201410667776A CN 104409533 A CN104409533 A CN 104409533A
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- 238000000034 method Methods 0.000 title claims abstract description 49
- 238000004519 manufacturing process Methods 0.000 title abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 106
- 230000008569 process Effects 0.000 claims abstract description 29
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 claims description 144
- 239000010410 layer Substances 0.000 claims description 61
- 238000005530 etching Methods 0.000 claims description 29
- 239000011241 protective layer Substances 0.000 claims description 24
- 238000000151 deposition Methods 0.000 claims description 20
- 238000002161 passivation Methods 0.000 claims description 20
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 18
- 230000005855 radiation Effects 0.000 claims description 15
- 230000008021 deposition Effects 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 10
- 239000003989 dielectric material Substances 0.000 claims description 8
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 7
- 238000002513 implantation Methods 0.000 claims description 7
- 238000002347 injection Methods 0.000 claims description 6
- 239000007924 injection Substances 0.000 claims description 6
- 229910010413 TiO 2 Inorganic materials 0.000 claims description 4
- 238000009738 saturating Methods 0.000 claims description 4
- 238000005516 engineering process Methods 0.000 description 13
- 230000005684 electric field Effects 0.000 description 12
- 238000001020 plasma etching Methods 0.000 description 9
- 210000000481 breast Anatomy 0.000 description 7
- 238000005229 chemical vapour deposition Methods 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000002360 preparation method Methods 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 238000004088 simulation Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 238000000137 annealing Methods 0.000 description 3
- 230000003667 anti-reflective effect Effects 0.000 description 3
- 238000005566 electron beam evaporation Methods 0.000 description 3
- 230000008020 evaporation Effects 0.000 description 3
- 238000001704 evaporation Methods 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000012937 correction Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000001534 heteroepitaxy Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- -1 boron ion Chemical class 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
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- 238000005457 optimization Methods 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035209—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions comprising a quantum structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses an Insb infrared focal plane detector array and a manufacture method thereof. The Insb infrared focal plane detector array comprises an n type Insb substrate (1) and a passive layer (7), wherein t*t table boards (2) are etched on the n type Insb substrate (1), t is an integer, and larger than or equal to 1, a positive pole (5) is deposited on the upper portion of each table board (2), a negative pole (6) in a shape formed by homocentric squares different in area is deposited on the upper portion of the edge of the n type Insb substrate (1), protection layers (4) are deposited on the upper portion of the n type Insb substrate (1) and side faces of all the table boards (2), m identical p type isosceles triangle doping areas (3) are arranged in a portion of the n type Insb substrate (1), right below each table board (2), m is an integer, and larger than or equal to 1, and all the p type isosceles triangle doping areas (3) and the n type Insb substrate (1) form pn junctions. The Insb infrared focal plane detector array has the advantages of being simple in process, high in quantum efficiency and low in crosstalk, and can be used in the infrared reconnaissance and infrared healthcare filed.
Description
Technical field
The invention belongs to semiconductor photovoltaic type detector technology field, particularly InSb infrared focal plane detector array, can be used for infrared detection, infrared guidance and Infrared Therapy.
Technical background
Infrared focal plane detector array is the core parts of infrared system, and its function infrared radiation is changed into the signal that we can identify other.Have important in military and civilian fields such as earth observation from space, electrooptical countermeasures, robot vision, medical and industrial thermal imaging, Search/Track and guided missile precise guidances and apply widely, high-performance large-scale infrared focal plane detector array has been widely used in various great national security projects and important new weapon system.Because it has irreplaceable importance and functions, infrared focal plane array device technology of preparing is all classified as the high technology item given priority to by the large state of key industry in the world.
The mode of operation of Infrared Detectors mainly contains guide type and photovoltaic type two kinds, and owing to there is internal electric field in photovoltaic type Infrared Detectors, dark current is less, so be widely used in military affairs, wherein photovoltaic type InSb Infrared Detectors is a kind of photovoltaic detector of current most study, this detector majority becomes basis with pn, can form photovoltaic type focal plane array.In recent years, the development trend that Infrared Focal plane Array Technologies has presented that specification is increasing, pixel centre-to-centre spacing is more and more less, multispectral sensing application is more and more, new material continues to bring out etc.Under the driving energetically of senior infrared application system, infrared detection technique, from unit and the linear array of the first generation, has progressed into the developing stage of the third generation infrared focal plane detector of the features such as large face battle array, miniaturization and multicolor.Along with the develop rapidly of space flight and military field, more and more higher to the performance requirement of medium wave infrared detector, improve detector performance far can not meet current application demand by improving quality of materials, therefore adopting device architecture optimal design to improve detector performance has become domestic and international study hotspot.
Quantum efficiency and cross-talk weigh the important parameter index of InSb photovoltaic type infrared focal plane detector array performance, and they can affect the detectivity of detector array, decide the Effect on Detecting of detector to a great extent.In order to improve quantum efficiency, reduce cross-talk, 1981, the resistive formation that Zhao Wenqin proposes to adopt H+implantation to be formed in InSb detector array first carried out the method for isolating, the cross-talk of the InSb detector array of preparation is reduced to 1.7 ~ 3.76%, but the improvement of quantum efficiency not obvious, be only 45%, see the blanketing effect of InSb proton bombardment damage, Zhao Wenqin, semiconductor journal, Vol.2, No.1, pp.14-21,1981.2006, the people such as leaf Zhenhua reported a kind of infrared focal plane detector with antireflective convergence microlens, effectively improve the photoelectric current of detector, cross-talk can be reduced to 1%, see patent CN100433328C.But this invention is by introducing the performance that novel antireflective convergence microlens improves detector from outside, and on the one hand, the preparation of antireflective convergence microlens is comparatively complicated, on the other hand, the innovation of essence is not had in this patent at semiconductor device structure design aspect.2011, Hu Wei such as to reach at the structure that people reports a kind of micro lens array InSb infrared focal plane array, this structure is by adopting silicon microlens structure to add light absorption, thus improve device performance, cross-talk can be made to be reduced to 4.2% by the optimization of silicon microlens structure, see patent CN 102201487 B.But, this invention needs heteroepitaxy InSb material on a silicon substrate, this will to cause in N-shaped InSb region especially producing a large amount of dislocation or defect near silicon substrate and N-shaped InSb region interface, affect the generation of photo-generated carrier, and a large amount of photo-generated carrier can be captured, in addition this invention also needs to prepare silicon lenticule, and therefore to realize difficulty larger in this invention.
Summary of the invention
The object of the invention is to the deficiency overcoming above-mentioned prior art, propose InSb infrared focal plane detector array that a kind of manufacturing process is simple, cross-talk is little, quantum efficiency is high and preparation method thereof, to improve the performance of infrared focal plane detector array.
To achieve these goals, the invention provides a kind of InSb infrared focal plane detector array, this structure comprises from top to bottom: N-shaped InSb substrate and passivation layer, N-shaped InSb substrate is etched with t × t table top, t is integer and t >=1, each table top top is deposited with anode, and N-shaped InSb edges of substrate top is deposited with " returning " font negative electrode; Described N-shaped InSb substrate top and mesa sides are deposited with protective layer; it is characterized in that: in the N-shaped InSb substrate immediately below each table top, be provided with the individual identical p-type isosceles triangle doped region of m; m is integer and m >=1, and these p-type isosceles triangle doped regions and N-shaped InSb substrate form pn junction structure.
As preferably, the thickness k before described N-shaped InSb substrate etching is 3.5 ~ 20 μm, and the thickness s after etching is 3 ~ 10 μm, and doping content is 1 × 10
11cm
-3~ 1 × 10
16cm
-3.
As preferably, the upper and lower surface of described each table top is square, and foursquare length of side L is 10 ~ 60 μm, and the height H of each table top is all identical, and H equals k and deducts s, and span is 0.5 ~ 10 μm.
As preferably, the distance d between described adjacent two table tops
1most distance d between edge table top and N-shaped InSb edges of substrate
2equal, and span is 0.4 ~ 60 μm.
As preferably, the bottom side length of m described p-type isosceles triangle doped region is r, r=L/m, and high h is less than or equal to the thickness s after N-shaped InSb substrate etching, and h equals
As preferably, the lower surface of described each table top connects with the bottom surface of m p-type isosceles triangle doped region immediately below this table top.
For achieving the above object, the method for making InSb infrared focal plane detector array provided by the invention, comprises following process:
The first step, on N-shaped InSb substrate, first time makes mask, utilizes this mask to etch on N-shaped InSb substrate and makes t × t table top;
Second step, on N-shaped InSb substrate top, each table top top and each mesa sides deposition thickness be the dielectric layer of 3 ~ 10 μm;
3rd step, on dielectric layer, second time makes mask, and utilize this mask to etch in the dielectric layer on each table top top and make the individual identical isosceles v-depression of m, the degree of depth of these isosceles v-depressions is less than or equal to the thickness of dielectric layer;
4th step, the injection of p-type foreign ion is carried out to the N-shaped InSb material of each isosceles v-depression bottom, realize adulterating to the p-type of each table top, and the individual identical p-type isosceles triangle doped region of m is formed in each table top bottom, and the bottom side length of p-type isosceles triangle doped region is r, r=L/m, high h are less than or equal to the thickness s after N-shaped InSb substrate etching, and h equals
5th step, on dielectric layer, third time makes mask, utilizes this mask etching to remove the dielectric layer of N-shaped InSb substrate top, each table top top and each mesa sides;
6th step, on N-shaped InSb substrate top, each table top top and each mesa sides deposit protective layer, namely covers the region of N-shaped InSb substrate top, each table top top and each mesa sides respectively with insulating dielectric materials;
7th step, makes mask the 4th time on the protection layer, utilizes this mask etching to remove the protective layer on N-shaped InSb edges of substrate top and each table top top;
8th step, makes mask the 5th time on each table top and on N-shaped InSb edges of substrate, utilizes this mask to make anode at each table top top depositing metal, makes " returning " font negative electrode simultaneously at N-shaped InSb edges of substrate top depositing metal;
9th step, at the bottom deposit passivation layer of N-shaped InSb substrate, namely covers the region of N-shaped InSb substrate bottom, thus completes the making of whole detector array with saturating infrared radiation insulating dielectric materials.
Array of the present invention compares with traditional InSb infrared focal plane detector array and has the following advantages:
1, the present invention is owing to all defining the individual identical p-type isosceles triangle doped region of m in the N-shaped InSb substrate under each table top, reduce pn to tie interface and photo-generated carrier and produce distance between district, and increase the junction area of pn knot, thus enhance the ability that pn ties interface extraction photo-generated carrier, effectively inhibit photo-generated carrier to the motion of other probe unit, therefore substantially reduce the cross-talk of InSb infrared focal plane detector array, significantly improve quantum efficiency.
2, the present invention is by introducing the performance that InSb infrared focal plane detector array is improved in triangle doped region in N-shaped InSb substrate under table top, avoid the process complications problem that optical microlens preparation, heteroepitaxy etc. are brought in conventional I nSb infrared focal plane detector array fabrication process, reduce the manufacture difficulty of detector array.
Simulation result shows, the performance of InSb infrared focal plane detector array of the present invention is obviously better than the performance of traditional infrared focus planardetector array.
Technology contents of the present invention and effect is further illustrated below in conjunction with drawings and Examples.
Accompanying drawing explanation
Fig. 1 is the plan structure schematic diagram of InSb infrared focal plane detector array of the present invention;
Fig. 2 is the cross-sectional view to the horizontal AB of Fig. 1;
Fig. 3 is the cross-sectional view to the longitudinal CD of Fig. 1;
Fig. 4 is the technique Making programme figure of InSb infrared focal plane detector array of the present invention;
Fig. 5 is the hole concentration simulation comparison figure of the present invention and traditional InSb infrared focal plane detector array;
Fig. 6 is the present invention and the traditional InSb infrared focal plane detector array longitudinal electric field simulation comparison figure along incident radiation direction;
Fig. 7 is the present invention and the traditional InSb infrared focal plane detector array transverse electric field simulation comparison figure along incident radiation direction.
Embodiment
With reference to Fig. 1, Fig. 2 and Fig. 3, InSb infrared focal plane detector array of the present invention is the pn junction structure based on InSb semi-conducting material, and this structure comprises from top to bottom: N-shaped InSb substrate 1 and passivation layer 7.
Described N-shaped InSb substrate 1 is etched with t × t table top 2, t and is integer and t>=1, the thickness k wherein before N-shaped InSb substrate 1 etching is 3.5 ~ 20 μm, and the thickness s after etching is 3 ~ 10 μm, and doping content is 1 × 10
11cm
-3~ 1 × 10
16cm
-3; The upper and lower surface of each table top 2 is square, and square length of side L is 10 ~ 60 μm, and the height H of each table top is all identical, and the span of H is 0.5 ~ 10 μm; Distance between adjacent two table tops 2 is d
1, most distance between edge table top and N-shaped InSb substrate 1 edge is d
2, d
1equal d
2, and span is 0.4 ~ 60 μm.Each table top 2 top is deposited with anode 5; N-shaped InSb substrate 1 edge upper part is deposited with " returning " font negative electrode 6, should each inner edge appearance of " returning " zigzag pattern etc. and each outside appearance etc., wherein the outer length of side is t × L+ (t+1) × d
1, the distance between the outer length of side and the interior length of side is d
2/ 2.Be provided with m identical p-type isosceles triangle doped region 3, m in N-shaped InSb substrate 1 immediately below each table top 2 and be integer and m>=1, these p-type isosceles triangle doped regions 3 all form pn junction structure with N-shaped InSb substrate 1; The lower surface of each table top 2 all connects with the bottom surface of m p-type isosceles triangle doped region 3 immediately below this table top, and the bottom side length of p-type isosceles triangle doped region 3 is r, r=L/m, and high h is less than or equal to the thickness s after N-shaped InSb substrate 1 etching, and h equals
n-shaped InSb substrate 1 top and each table top 2 side are deposited with protective layer 4.
In above-mentioned InSb infrared focal plane detector array: protective layer 4 adopts SiO
2, ZnS, SiN, Al
2o
3, Sc
2o
3, HfO
2, TiO
2or other insulating dielectric materials, its thickness is 0.1 ~ 1 μm; Anode 5 is identical with the thickness of negative electrode 6, and all adopts identical Cr/Au metallic combination, and metal thickness is 0.03 ~ 0.05 μm/0.5 ~ 1 μm, and lower metal thickness is less than upper strata metal thickness; Passivation layer 7 adopts ZnS, SiO
2, SiN, Al
2o
3, HfO
2, TiO
2or other saturating infrared radiation insulating dielectric materials, its thickness is 0.05 ~ 1 μm.
With reference to Fig. 4, the present invention makes InSb infrared focal plane detector array and provides following three kinds of embodiments:
Embodiment one: making protective layer is SiN, passivation layer is SiN, the number m=10 of p-type isosceles triangle doped region immediately below each table top, and array size is the InSb infrared focal plane detector array of 20 × 20.
Step 1, N-shaped InSb substrate 1 etches making 20 × 20 table tops 2, as Fig. 4 a.
1a) thickness k be 20 μm, doping content is 1 × 10
16cm
-3n-shaped InSb substrate 1 on first time make mask, the array that the square that this mask pattern is 60 μm by 20 × 20 length of side L forms, the distance d between adjacent two squares
1, and the distance d between most edge square and N-shaped InSb substrate 1 edge
2be 60 μm;
1b) utilize this mask to adopt reactive ion etching technology to etch 20 × 20 table tops 2 on N-shaped InSb substrate 1, wherein the height H of each table top 2 is 10 μm, and the thickness s after N-shaped InSb substrate 1 etching is 10 μm.The process conditions that etching table top adopts are: Ar/CH
4/ H
2flow-rate ratio is 1:2:6.6, and pressure is 0.35Pa, and power is 500W.
Step 2, on N-shaped InSb substrate 1 top, 20 × 20 table top 2 tops and 20 × 20 table top 2 side dielectric layer deposited 8, as Fig. 4 b.
Using plasma strengthen chemical vapor deposition techniques on N-shaped InSb substrate 1 top, 20 × 20 table top 2 tops and 20 × 20 table top 2 side deposition thicknesses be the SiO of 10 μm
2dielectric layer 8.
The process conditions that dielectric layer deposited adopts are: N
2o flow is 900sccm, SiH
4flow is 225sccm, and temperature is 275 DEG C, and RF power is 27.5W, and pressure is 1250mTorr.
Step 3, in dielectric layer 8, etching makes isosceles v-depression 9, as Fig. 4 c.
On dielectric layer 8, second time makes mask, and adopt reactive ion etching technology in the dielectric layer 8 on 20 × 20 table top 2 tops, all etch the identical isosceles v-depression 9 of making 10, the degree of depth of isosceles v-depression 9 is 10 μm, and base length is 6 μm.
The process conditions that etched recesses adopts are: SF
6flow is 7.5sccm, O
2flow is 2.5sccm, and pressure is 12.5mTorr, and bias voltage is 125V.
Step 4, carries out the injection of p-type foreign ion to the N-shaped InSb material of isosceles v-depression 9 bottom, realizes the p-type doping of table top 2, and forms p-type isosceles triangle doped region 3, as Fig. 4 d.
The injection of p-type foreign ion is carried out to the N-shaped InSb material of each isosceles v-depression 9 bottom, realize adulterating to the p-type of 20 × 20 table tops 2, in the N-shaped InSb substrate 1 of each table top 2 bottom, form the p-type isosceles triangle doped region 3 similar to interior 10 isosceles v-depression 9 shapes of dielectric layer 8 simultaneously, the base r of p-type isosceles triangle doped region 3 is 6 μm, high h is 10 μm, wherein impurity is boron ion, and doping content is 1 × 10
18cm
-3.
The process conditions that ion implantation adopts are: implantation dosage is 7 × 10
13cm
-2, Implantation Energy is 800keV.
Step 5, removes dielectric layer 8, as Fig. 4 e.
On dielectric layer 8, third time makes mask, adopts reactive ion etching technology etching to remove the dielectric layer 8 of N-shaped InSb substrate 1 top, 20 × 20 table top 2 tops and 20 × 20 table top 2 sides.
The process conditions that etch media layer adopts: CF
4flow is 50sccm, O
2flow is 7.5sccm, and pressure is 17.5mTorr, and power is 275W.
Step 6, on N-shaped InSb substrate 1 top, 20 × 20 table top 2 tops and 20 × 20 table top 2 side deposit protective layers 4, as Fig. 4 f.
Using plasma strengthen chemical vapor deposition techniques on N-shaped InSb substrate 1 top, 20 × 20 table top 2 tops and 20 × 20 table top 2 side deposition thicknesses be the SiN protective layer 4 of 1 μm.
The process conditions that deposit protective layer adopts are: gas is NH
3, N
2and SiH
4, gas flow is respectively 2.2sccm, 925sccm and 225sccm, and temperature, RF power and pressure are respectively 275 DEG C, 22.5W and 925mTorr.
Step 7, etching removes the protective layer 4 on N-shaped InSb substrate 1 edge upper part and 20 × 20 table top 2 tops, as Fig. 4 g.
7a) on protective layer 4, make mask the 4th time, this mask is made up of anode mask pattern and negative electrode mask pattern, the array that the square that its Anodic mask pattern is 60 μm by 20 × 20 length of side L forms, adjacent two foursquare spacing d
1, distance d between most edge square and N-shaped InSb substrate 1 edge
2be 60 μm; Negative electrode mask pattern is " returning " zigzag pattern, should each inner edge appearance of " returning " zigzag pattern etc. and each outside appearance etc., wherein the outer length of side is 2460 μm, and the spacing of the outer length of side and the interior length of side is 30 μm;
Above-mentioned mask 7b) is utilized to adopt reactive ion etching technology etching to remove the protective layer 4 on N-shaped InSb substrate 1 edge upper part and 20 × 20 table top 2 tops.The process conditions that etch-protecting layer adopts are: CF
4flow is 25sccm, O
2flow is 3sccm, and pressure is 25mTorr, and bias voltage is 150V.
Step 8, makes anode 5 at table top 2 top depositing metal, makes " returning " font negative electrode 6, as Fig. 4 h at N-shaped InSb substrate 1 edge upper part depositing metal simultaneously.
8a) make mask the 5th time on 20 × 20 table tops 2 and on N-shaped InSb substrate 1 edge, this mask pattern is identical with the mask pattern that in step 7, the 4th time makes;
8b) utilize above-mentioned mask, adopt electron beam evaporation technique at each table top 2 top and N-shaped InSb substrate 1 edge upper part deposit Cr, Au metal successively, make anode 5 and " returning " font negative electrode 6, metal thickness is 0.05 μm/1 μm, then at N
2short annealing is carried out in atmosphere.
The process conditions that depositing metal adopts are: vacuum degree is less than 1.8 × 10
-3pa, power bracket is 200 ~ 1000W, and evaporation rate is less than
the process conditions that short annealing adopts are: temperature is 700 DEG C, and the time is 30s.
Step 9, at the bottom deposit passivation layer 7 of N-shaped InSb substrate 1, as Fig. 4 i.
Using plasma strengthens the SiN passivation layer 7 that chemical vapor deposition techniques at the bottom deposition thickness of N-shaped InSb substrate 1 is 1 μm, thus completes the making of whole detector array.
The process conditions of deposit passivation layer are: gas is NH
3, N
2and SiH
4, gas flow is respectively 2.2sccm, 925sccm and 225sccm, and temperature, RF power and pressure are respectively 275 DEG C, 22.5W and 925mTorr.
Embodiment two: making protective layer is SiO
2, passivation layer is SiO
2, the number m=4 of p-type isosceles triangle doped region immediately below each table top, array size is the InSb infrared focal plane detector array of 256 × 256.
Step one, N-shaped InSb substrate 1 etches making 256 × 256 table tops 2, as Fig. 4 a.
Thickness k be 11 μm, doping content is 1 × 10
14cm
-3n-shaped InSb substrate 1 on first time make mask, utilize this mask to adopt inductive couple plasma reactive ion etching technology, at Ar/CH
4/ H
2flow-rate ratio is 1:3:10, and pressure is 10Pa, and power is under the process conditions of 550W, N-shaped InSb substrate 1 etches the square-shaped mesa 2 that making 256 × 256 table surface height H are 5 μm, length of side L is 40 μm, the wherein spacing d of adjacent two table tops
1, most distance d between edge table top and N-shaped InSb edges of substrate
2be 30 μm; Thickness s after N-shaped InSb substrate 1 etching is 6 μm.
Step 2, on N-shaped InSb substrate 1 top, 256 × 256 table top 2 tops and 256 × 256 table top 2 side dielectric layer deposited 8, as Fig. 4 b.
Using plasma strengthens chemical vapor deposition techniques, is NH at gas
3, N
2and SiH
4gas flow is respectively 2.5sccm, 950sccm and 250sccm, temperature, RF power and pressure are respectively 300 DEG C, under the process conditions of 25W and 950mTorr, and on N-shaped InSb substrate 1 top, 256 × 256 table top 2 tops and 256 × 256 table top 2 side deposition thicknesses be the SiN dielectric layer 8 of 7 μm.
Step 3, in dielectric layer 8, etching makes isosceles v-depression 9, as Fig. 4 c.
On dielectric layer 8, second time makes mask, adopts reactive ion etching technology at CF
4flow is 42.5sccm, O
2flow is 3sccm, and pressure is 10mTorr, and power is under the process conditions of 220W, and in the dielectric layer 8 on 256 × 256 table top 2 tops, etch the identical isosceles v-depression 9 of making 4, the bottom side length of each isosceles v-depression 9 is 10 μm, and depth of groove is 7 μm.
Step 4, carries out the injection of p-type foreign ion to the N-shaped InSb material of isosceles v-depression 9 bottom, realizes the p-type doping of table top 2, and forms p-type isosceles triangle doped region 3, as Fig. 4 d.
To the N-shaped InSb material of each isosceles v-depression 9 bottom, be 4.2 × 10 at implantation dosage
13cm
-2implantation Energy is under the process conditions of 450keV, carry out boron ion implantation, realize adulterating to the p-type of 256 × 256 table tops 2, in the N-shaped InSb substrate 1 of each table top 2 bottom, form the p-type isosceles triangle doped region 3 similar to interior 4 isosceles v-depression 9 shapes of dielectric layer 8 simultaneously, the bottom side length r of p-type isosceles triangle doped region 3 is 10 μm, and high h is 6 μm, and doping content is 1 × 10
17cm
-3.
Step 5, removes dielectric layer 8, as Fig. 4 e.
On dielectric layer 8, third time makes mask, adopts reactive ion etching technology at CF
4flow is 20sccm, O
2flow is 2sccm, and pressure is 20mTorr, and bias voltage is under the process conditions of 100V, and etching is removed on N-shaped InSb substrate 1 top, the dielectric layer 8 of 256 × 256 table top 2 tops and 256 × 256 table top 2 sides.
Step 6, on N-shaped InSb substrate 1 top, 256 × 256 table top 2 tops and 256 × 256 table top 2 side deposit protective layers 4, as Fig. 4 f.
Using plasma strengthens chemical vapor deposition techniques, at N
2o flow is 850sccm, SiH
4flow is 200sccm, and temperature is 250 DEG C, and RF power is 25W, and pressure is under the process conditions of 1100mTorr, and on N-shaped InSb substrate 1 top, 256 × 256 table top 2 tops and 256 × 256 table top 2 side deposition thicknesses be the SiO of 0.5 μm
2protective layer 4.
Step 7, etching removes the protective layer 4 on N-shaped InSb substrate 1 edge upper part and 256 × 256 table top 2 tops, as Fig. 4 g.
Protective layer 4 makes mask the 4th time; wherein this mask pattern comprises anode mask pattern and negative electrode mask pattern two parts; the array that the square that anode mask pattern is 40 μm by 256 × 256 length of side L forms, wherein adjacent two foursquare spacing d
1, distance d between most edge square and N-shaped InSb substrate 1 edge
2be 30 μm; Negative electrode mask pattern is " returning " zigzag pattern, should each inner edge appearance of " returning " zigzag pattern etc. and each outside appearance etc., wherein the outer length of side is 17950 μm, and the spacing of the outer length of side and the interior length of side is 15 μm; This mask is utilized to adopt reactive ion etching technology, at SF
6flow is 10sccm, O
2flow is 5sccm, and pressure is 15mTorr, and bias voltage is under the process conditions of 150V, and etching removes the protective layer 4 on N-shaped InSb substrate 1 edge upper part and 256 × 256 table top 2 tops.
Step 8, makes anode 5 at table top 2 top depositing metal, makes " returning " font negative electrode 6, as Fig. 4 h at N-shaped InSb substrate 1 edge upper part depositing metal simultaneously.
Make mask 5th time on 256 × 256 table tops 2 and on N-shaped InSb substrate 1 edge, this mask pattern is identical with the mask pattern that in step 7, the 4th time makes; This mask is utilized to adopt electron beam evaporation technique to be less than 1.8 × 10 in vacuum degree
-3pa, power bracket is 300 ~ 1100W, and evaporation rate is less than
process conditions under, be Cr, Au metal of 0.04 μm/0.75 μm in each table top 2 top and N-shaped InSb substrate 1 edge upper part successively deposition thickness, and be 750 DEG C in temperature, the time is carry out short annealing under the process conditions of 20s, makes anode 5 and " returning " font negative electrode 6.
Step 9, at the bottom deposit passivation layer 7 of N-shaped InSb substrate 1, as Fig. 4 i.
Using plasma strengthens chemical vapor deposition techniques, at N
2o flow is 850sccm, SiH
4flow is 200sccm, and temperature is 250 DEG C, and RF power is 25W, and pressure is under the process conditions of 1100mTorr, is the SiO of 0.5 μm at the bottom deposition thickness of N-shaped InSb substrate 1
2passivation layer 7, thus the making completing whole detector array.
Embodiment three: making protective layer is SiN, passivation layer is SiO
2, the number m=1 of p-type isosceles triangle doped region immediately below each table top, array size is the InSb infrared focal plane detector array of 15000 × 15000.
Steps A, N-shaped InSb substrate 1 etches making 15000 × 15000 table tops 2, as Fig. 4 a.
Thickness k be 3.5 μm, doping content is 1 × 10
11cm
-3n-shaped InSb substrate 1 on first time make mask, adopt inductive couple plasma reactive ion etching technology on N-shaped InSb substrate 1, to etch the square-shaped mesa 2 that making 15000 × 15000 length of side L are 10 μm, the spacing d of adjacent two table tops 2
1, the distance d between most edge table top 2 and N-shaped InSb substrate 1 edge
2be 0.4 μm, the height H of each table top is 0.5 μm; Thickness s after N-shaped InSb substrate etching is 3 μm.The process conditions that etching table top adopts are: Ar/CH
4/ H
2flow-rate ratio is 1:4:13, and pressure is 20Pa, and power is 600W.
Step B, on N-shaped InSb substrate 1 top, 15000 × 15000 table top 2 tops and 15000 × 15000 table top 2 side dielectric layer deposited 8, as Fig. 4 b.
Using plasma strengthen chemical vapor deposition techniques on N-shaped InSb substrate 1 top, 15000 × 15000 table top 2 tops and 15000 × 15000 table top 2 side deposition thicknesses be the SiO of 3 μm
2dielectric layer 8.The process conditions that dielectric layer deposited adopts are: N
2o flow is 800sccm, SiH
4flow is 175sccm, and temperature is 225 DEG C, and RF power is 22.5W, and pressure is 1000mTorr.
Step C, in dielectric layer 8, etching makes isosceles v-depression 9, as Fig. 4 c.
On dielectric layer 8, second time makes mask, and adopt reactive ion etching technology in the dielectric layer 8 on 15000 × 15000 table top 2 tops, all etch making 1 isosceles v-depression 9, the base length of isosceles v-depression 9 is 10 μm, and depth of groove is 3 μm.The process conditions that etched recesses adopts are: SF
6flow is 5sccm, O
2flow is 2sccm, and pressure is 10mTorr, and bias voltage is 100V.
Step D, carries out the injection of p-type foreign ion to the N-shaped InSb material of isosceles v-depression 9 bottom, realizes the p-type doping of table top 2, and forms p-type isosceles triangle doped region 3, as Fig. 4 d.
The injection of p-type foreign ion is carried out to the N-shaped InSb material of 15000 × 15000 interior 1 isosceles v-depression 9 bottoms of table top 2 upper dielectric layer 8, realize adulterating to the p-type of each table top 2, in the N-shaped InSb substrate 1 of each table top 2 bottom, form the p-type isosceles triangle doped region 3 similar to interior 1 isosceles v-depression 9 shape of dielectric layer 8 simultaneously, the base r of p-type isosceles triangle doped region 3 is 10 μm, high h is 3 μm, wherein impurity is magnesium ion, and doping content is 1 × 10
16cm
-3.The process conditions that ion implantation adopts are: implantation dosage is 6.3 × 10
9cm
-2, Implantation Energy is 30keV.
Step e, removes dielectric layer 8, as Fig. 4 e.
On dielectric layer 8, third time makes mask, adopts that reactive ion etching technology etching is removed on N-shaped InSb substrate 1 top, the dielectric layer 8 of 15000 × 15000 table top 2 tops and 15000 × 15000 table top 2 sides.The process conditions that etch media layer adopts: CF
4flow is 40sccm, O
2flow is 2.5sccm, and pressure is 12.5mTorr, and power is 225W.
Step F, on N-shaped InSb substrate 1 top, 15000 × 15000 table top 2 tops and 15000 × 15000 table top 2 side deposit protective layers 4, as Fig. 4 f.
Using plasma strengthen chemical vapor deposition techniques on N-shaped InSb substrate 1 top, 15000 × 15000 table top 2 tops and 15000 × 15000 table top 2 side deposition thicknesses be the SiN protective layer 4 of 0.1 μm.The process conditions that deposit protective layer adopts are: gas is NH
3, N
2and SiH
4, gas flow is respectively 2sccm, 900sccm and 200sccm, and temperature, RF power and pressure are respectively 250 DEG C, 25W and 900mTorr.
Step G, etching removes the protective layer 4 on N-shaped InSb substrate 1 edge upper part and 15000 × 15000 table top 2 tops, as Fig. 4 g.
Protective layer 4 makes mask the 4th time; wherein this mask pattern comprises anode mask pattern and cathode pattern mask two parts; the array that the square that anode mask pattern is 10 μm by 15000 × 15000 length of side L forms, wherein adjacent two foursquare spacing d
1, distance d between most edge square and N-shaped InSb substrate 1 edge
2be 0.4 μm; Negative electrode mask pattern is " returning " zigzag pattern, should each inner edge appearance of " returning " zigzag pattern etc. and each outside appearance etc., wherein the outer length of side is 156000.4 μm, and the spacing of the outer length of side and the interior length of side is 0.2 μm; Utilize this mask to adopt reactive ion etching technology, etching removes the protective layer 4 on N-shaped InSb substrate 1 edge upper part and 15000 × 15000 table top 2 tops.The process conditions that etch-protecting layer adopts are: CF
4flow is 45sccm, O
2flow is 5sccm, and pressure is 15mTorr, and power is 250W.
Step H, makes anode 5 at table top 2 top depositing metal, makes " returning " font negative electrode 6, as Fig. 4 h at N-shaped InSb substrate 1 edge upper part depositing metal simultaneously.
Make mask 5th time on 15000 × 15000 table tops 2 and on N-shaped InSb substrate 1 edge, this mask pattern is identical with the mask pattern that in step G, the 4th time makes; Utilize this mask to adopt electron beam evaporation technique at each table top 2 top and N-shaped InSb substrate 1 edge upper part deposit Cr, Au metal successively, make anode 5 and " returning " font negative electrode 6, metal thickness is 0.03 μm/0.5 μm.The process conditions that depositing metal adopts are: vacuum degree is less than 1.8 × 10
-3pa, power bracket is 160 ~ 960W, and evaporation rate is less than
the process conditions that short annealing adopts are: temperature is 800 DEG C, and the time is 15s.
Step I, at the bottom deposit passivation layer 7 of N-shaped InSb substrate 1, as Fig. 4 i.
Adopt electron beam evaporation technique in the bottom of N-shaped InSb substrate 1, deposition thickness is the SiO of 0.05 μm
2passivation layer 7, thus the making completing whole detector array.The process conditions that deposit passivation layer adopts are: vacuum degree is less than 1.2 × 10
-3pa, power is less than 50W, and evaporation rate is less than
Effect of the present invention further illustrates by following emulation.
In emulation, traditional array and array of the present invention all adopt the array of 7 × 7, and the thickness s after N-shaped InSb substrate etching is 10 μm, and table top size L is 40 μm, and table surface height H is 5 μm, the spacing d of adjacent two table tops
1and most distance d between edge table top and N-shaped InSb edges of substrate
2be 20 μm, N-shaped InSb doping content is 1 × 10
15cm
-3, p-type InSb doping content is 1 × 10
18cm
-3; The number m=2 of each table top lower p-type isosceles triangle doped region in array of the present invention, the bottom side length r of p-type isosceles triangle doped region is 20 μm, and high h is 10 μm; Radiation source in emulation from passivation layer side, namely to carry on the back incidence, vertical irradiation bosom pixel.
Emulation 1: emulate in the hole concentration of pixel center, bosom along incident radiation direction in traditional array and array of the present invention, result is as Fig. 5.
As seen from Figure 5: along incident radiation direction in the overwhelming majority scope of pixel center, bosom, the hole concentration of detector array of the present invention is all significantly higher than the hole concentration of traditional array, illustrates that detector array of the present invention collects the ability of charge carrier apparently higher than conventional detectors array.
Emulation 2: emulate the longitudinal electric field of pixel center, bosom in conventional detectors array and detector array of the present invention along incident radiation direction, result is as Fig. 6.
As seen from Figure 6: the electric field of array of the present invention is in the main generation region of photo-generated carrier, namely in the N-shaped InSb substrate near passivation layer, obviously be greater than the electric field of traditional array, illustrate that array of the present invention pixel center, bosom in the main generation region of photo-generated carrier significantly strengthens along the decimate action of longitudinal electric field to photo-generated carrier in incident radiation direction, this greatly reduces photo-generated carrier and produce the composite action that in region, photo-generate electron-hole is right, and decrease photo-generated carrier and produce trap in region and capture the quantity of photo-generated carrier, most photo-generated carrier Dou Bei centers pixel is collected, and greatly reduced by the photo-generated carrier quantity that other pixels are collected, therefore the quantum efficiency of array of the present invention and cross-talk are all obviously better than traditional array.
Emulation 3: emulate conventional detectors array and pixel center, the detector array bosom of the present invention transverse electric field along incident radiation direction, result is as Fig. 7.
As seen from Figure 7: the electric field of array of the present invention, especially photo-generated carrier mainly produces the electric field in region, be significantly less than the electric field of traditional array, illustrate that pixel center, array bosom of the present invention significantly reduces along the decimate action of transverse electric field to photo-generated carrier in incident radiation direction, composition graphs 6 simulation result is known, overwhelming majority photo-generated carrier Dou Bei center pixel extracts along longitudinal highfield in incident radiation direction, and greatly reduced by the photo-generated carrier quantity that other pixels are collected, therefore the quantum efficiency of array of the present invention and cross-talk are all obviously better than traditional array.
For those skilled in the art; after having understood content of the present invention and principle; can when not deviating from the principle and scope of the present invention; carry out various correction in form and details and change according to method of the present invention, but these are based on correction of the present invention with change still within claims of the present invention.
Claims (10)
1. an InSb infrared focal plane detector array, comprise N-shaped InSb substrate (1) and passivation layer (7), N-shaped InSb substrate (1) is etched with t × t table top (2), t is integer and t >=1, each table top (2) top is deposited with anode (5), and N-shaped InSb edges of substrate top is deposited with " returning " font negative electrode (6); Described N-shaped InSb substrate (1) top and each table top (2) side are deposited with protective layer (4); it is characterized in that: in the N-shaped InSb substrate (1) immediately below each table top (2), be provided with the individual identical p-type isosceles triangle doped region (3) of m; m is integer and m >=1, and these p-type isosceles triangle doped regions (3) and N-shaped InSb substrate (1) form pn junction structure.
2. InSb infrared focal plane detector array according to claim 1, it is characterized in that the thickness k before N-shaped InSb substrate (1) etching is 3.5 ~ 20 μm, the thickness s after etching is 3 ~ 10 μm, and doping content is 1 × 10
11cm
-3~ 1 × 10
16cm
-3.
3. InSb infrared focal plane detector array according to claim 1, it is characterized in that the upper and lower surface of each table top (2) is square, foursquare length of side L is 10 ~ 60 μm, the height H of each table top is all identical, H equals k and deducts s, and span is 0.5 ~ 10 μm.
4. InSb infrared focal plane detector array according to claim 1, is characterized in that the distance d between adjacent two table tops (2)
1most distance d between edge table top and N-shaped InSb substrate (1) edge
2equal, and span is 0.4 ~ 60 μm.
5. InSb infrared focal plane detector array according to claim 1, it is characterized in that the bottom side length of m p-type isosceles triangle doped region (3) is r, r=L/m, high h are less than or equal to the thickness s after N-shaped InSb substrate (1) etching, and h equals
6. InSb infrared focal plane detector array according to claim 1, is characterized in that the lower surface of each table top (2) connects with the bottom surface of m p-type triangle doped region (3) immediately below this table top.
7. make a method for InSb infrared focal plane detector array, comprise following process:
The first step, made mask in N-shaped InSb substrate (1) upper first time, utilized this mask to make t × t table top (2) in the upper etching of N-shaped InSb substrate (1);
Second step, on N-shaped InSb substrate (1) top, each table top (2) top and each table top (2) side deposition thickness be the dielectric layer (8) of 3 ~ 10 μm;
3rd step, mask is made in the upper second time of dielectric layer (8), utilize this mask to etch in the dielectric layer (8) on each table top (2) top and make the individual identical isosceles v-depression (9) of m, the degree of depth of these isosceles v-depressions (9) is less than or equal to the thickness of dielectric layer (8);
4th step, the injection of p-type foreign ion is carried out to the N-shaped InSb material of each isosceles v-depression (9) bottom, realize adulterating to the p-type of each table top (2), and the individual identical p-type isosceles triangle doped region (3) of m is formed in each table top (2) bottom, and the bottom side length of p-type isosceles triangle doped region (3) is r, r=L/m, high h is less than or equal to the thickness s after N-shaped InSb substrate (1) etching, and h equals
5th step, make mask in dielectric layer (8) upper third time, and utilize this mask etching to remove the dielectric layer (8) of N-shaped InSb substrate (1) top, each table top (2) top and each table top (2) side;
6th step, on N-shaped InSb substrate (1) top, each table top (2) top and each table top (2) side deposit protective layer (4), namely cover the region of N-shaped InSb substrate (1) top, each table top (2) top and each table top (2) side respectively with insulating dielectric materials;
7th step, makes mask upper 4th time at protective layer (4), utilizes this mask etching to remove the protective layer (4) on N-shaped InSb substrate (1) edge upper part and each table top (2) top;
8th step, above and on N-shaped InSb substrate (1) edge mask is made the 5th time at each table top (2), utilize this mask to make anode (5) at each table top (2) top depositing metal, make " returning " font negative electrode (6) at N-shaped InSb substrate (1) edge upper part depositing metal simultaneously;
9th step, at the bottom deposit passivation layer (7) of N-shaped InSb substrate (1), namely covers the region of N-shaped InSb substrate (1) bottom, thus completes the making of whole detector array with saturating infrared radiation insulating dielectric materials.
8. method according to claim 7, it is characterized in that the N-shaped InSb material of described 4th step to isosceles v-depression (9) bottom carries out the injection of p-type foreign ion, doping content is 1 × 10
16cm
-3~ 1 × 10
18cm
-3; Process conditions are: implantation dosage is 6.3 × 10
9cm
-2~ 7 × 10
13cm
-2, Implantation Energy is 30keV ~ 800keV.
9. method according to claim 7, it is characterized in that the anode (5) that described 8th step makes and negative electrode (6), thickness is identical, all adopt identical Cr/Au double layer of metal combination, its thickness is 0.03 ~ 0.05 μm/0.5 ~ 1 μm, and lower metal thickness is less than upper strata metal thickness.
10. method according to claim 7, is characterized in that:
Described protective layer (4) adopts SiO
2, ZnS, SiN, Al
2o
3, Sc
2o
3, HfO
2, TiO
2or other insulating dielectric materials, its thickness is 0.1 ~ 1 μm;
Described passivation layer (7) adopts ZnS, SiO
2, SiN, Al
2o
3, HfO
2, TiO
2or other saturating infrared radiation insulating dielectric materials, its thickness is 0.05 ~ 1 μm.
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| US5479032A (en) * | 1994-07-21 | 1995-12-26 | Trustees Of Princeton University | Multiwavelength infrared focal plane array detector |
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| CN102201487A (en) * | 2011-03-16 | 2011-09-28 | 中国科学院上海技术物理研究所 | Method for optimizing light gathering ability of micro-lens array of back-illuminated infrared detector |
| CN102509728A (en) * | 2011-11-01 | 2012-06-20 | 北京大学 | Design and preparation method of non-refrigeration infrared detector |
-
2014
- 2014-11-20 CN CN201410667776.9A patent/CN104409533B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5580795A (en) * | 1993-08-10 | 1996-12-03 | Loral Vought Systems Corporation | Fabrication method for integrated structure such as photoconductive impedance-matched infrared detector with heterojunction blocking contacts |
| US5479032A (en) * | 1994-07-21 | 1995-12-26 | Trustees Of Princeton University | Multiwavelength infrared focal plane array detector |
| CN1949508A (en) * | 2006-11-08 | 2007-04-18 | 中国科学院上海技术物理研究所 | Infrared focal plane detector with antireflective convergence microlens and microlens preparing method |
| CN102201487A (en) * | 2011-03-16 | 2011-09-28 | 中国科学院上海技术物理研究所 | Method for optimizing light gathering ability of micro-lens array of back-illuminated infrared detector |
| CN102509728A (en) * | 2011-11-01 | 2012-06-20 | 北京大学 | Design and preparation method of non-refrigeration infrared detector |
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