CN104576513A - Double-layer barrier layer for preventing copper from diffusing and corresponding fabricating method thereof - Google Patents
Double-layer barrier layer for preventing copper from diffusing and corresponding fabricating method thereof Download PDFInfo
- Publication number
- CN104576513A CN104576513A CN201310520214.7A CN201310520214A CN104576513A CN 104576513 A CN104576513 A CN 104576513A CN 201310520214 A CN201310520214 A CN 201310520214A CN 104576513 A CN104576513 A CN 104576513A
- Authority
- CN
- China
- Prior art keywords
- layer
- phase
- copper metal
- barrier
- metal layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
The invention provides a double-layer barrier layer for preventing copper from diffusing and a corresponding fabricating method thereof. The fabricating method comprises the following steps: placing a semiconductor substrate with a copper metal layer in an EnCoRe process cavity of a first PVD system which has a DC of 20-40 KW and is bombarded by using an Ar plasma to generate Ta activated atoms; forming a Ta2N film layer with a hexagonal close-packed phase structure on the copper metal layer under the conditions that an alternating current bias and a pressure of the back surface of the semiconductor substrate are respectively 100-900 W and 4,000-8,000 mT and the mol percentage of N2 in a mixed gas is 2-4; changing the mol percentage of N2 in the mixed gas into 5-6, so that an alpha-phase TaN film layer with a body-centered cubic structure is formed on the Ta2N film layer with the hexagonal close-packed phase structure; processing the semiconductor substrate with a Ta2N/alpha-phase TaN film layer transferred into a second PVD system by using an H2 plasma; bombarding a target material of the second PVD system by using the Ar plasma, and forming an Al layer on the uppermost alpha-phase TaN film layer formed on the copper metal layer to prepare a barrier layer with a good barrier effect for Cu interconnection of a deep submicron integrated circuit.
Description
Technical field
The invention belongs to technical field of integrated circuits, particularly relate to a kind of prevent copper from spreading barrier bi-layer and corresponding manufacture method.
Background technology
Along with the development of integrated circuit technology, Cu progressively substitute for Al becomes the interconnection material of a new generation.But copper more easily diffuses in the material of surrounding, and the electronic device characteristics of adjacent layer can be changed, cause performance degradation and the inefficacy of assembly.Therefore, need the diffusion forming a diffusion impervious layer to prevent or hinder copper atom between adjacent layer and copper metal layer, this diffusion impervious layer requires the diffusion that effectively can stop copper under certain hot conditions, and all has good adhesiveness and less contact resistance with copper and adjacent layer.
Current industrial quarters often adopts traditional physical vapor deposition (PVD) system deposition TaN film as barrier layer, this is because TaN film has preferably barrier effect, can improve the barrier effect of barrier layer to copper atom by the thickness increasing TaN film.Such as, copper metal layer, barrier layer and Al liner (PAD) (being connected with outside for playing lead-in wire) is formed from the bottom to top successively in MEMS (micro electro mechanical system) (MEMS), refer to Fig. 1, shown in Fig. 1 is the cavity body structure schematic diagram that traditional PVD system forms barrier layer on the semiconductor base 10 with copper metal layer, and the thickness of barrier layer (not shown) is now
left and right, but, MEMS is after long thermal anneal process, researcher finds that copper atom can penetrate barrier layer and separate out in Al cushion region under the effect of thermal anneal process, this is because described traditional PVD system applies backwash power (DC) only, cause the deposition rate on the barrier layer formed on copper metal layer very fast, the barrier layer of formation is not fine and close.
Along with integrated circuit feature size continue reduce, integrated level improves constantly, barrier layer has more and more become a part for device itself.When the characteristic size of integrated circuit is less than 45nm, the resistivity on barrier layer itself has also become a more and more important parameter, this just requires that the performance requirements such as the thickness to barrier film, blocking effect improve further, current main PVD deposition technique can not ensure that the TaN barrier layer of preparing still has good diffusion barrier performance, therefore how to prepare a barrier layer with good barrier effect used for deep submicron integrated circuit Cu interconnection, this is task place of the present invention just.
Summary of the invention
The object of the present invention is to provide a kind of prevent copper from spreading barrier bi-layer and corresponding manufacture method, a barrier layer with good barrier effect used for deep submicron integrated circuit Cu interconnection can be prepared.
In order to solve the problem, the invention provides a kind of manufacture method of the barrier bi-layer preventing copper from spreading, comprising the steps:
Step 1: semiconductor substrate is provided, the front of described semiconductor base has copper metal layer;
Step 2: the EnCoRe process cavity described semiconductor base being placed in a PVD system, the backwash power of described EnCoRe process cavity is 20-40KW, and sputtering atmosphere is the target of the EnCoRe process cavity of the plasma bombardment of Ar, produces Ta active atomic;
Step 3: the AC bias and the air pressure that are applied to described semiconductor-based bottom back side are respectively 100-900W, 4000mT-8000mT, and work atmosphere is N
2the mist formed with the plasma of described Ar, N in its mist
2molar percentage be 2%-4%, sedimentation time is 10 ~ 50s, forms the Ta of hexagonal close heap phase structure on the surface of described copper metal layer
2n thin film layer;
Step 4: the technological parameter not changing step 3, by N in mist
2molar percentage become 5%-6%, at the Ta of the close heap phase structure of described hexagonal
2the surface of N thin film layer is formed the α phase TaN thin layer of body-centered cubic structure;
Step 5: will Ta be formed with
2the semiconductor base of N/ α phase TaN thin layer moves in the 2nd PVD system, uses H
2plasma to the Ta that described copper metal layer is formed
2n/ α phase TaN thin layer processes;
Step 6: the target of the 2nd PVD system described in the plasma bombardment of use Ar, the α phase TaN thin layer of the top that described copper metal layer is formed forms Al layer.
Further, also comprise after step 4, before step 5: repeat step 3 and step 4, described copper metal layer forms Ta successively
2n thin film layer and α phase TaN thin layer alternate combinations structure.
Further, Ta described in each
2the thickness of N thin film layer is
the thickness of the α phase TaN thin layer of body-centered cubic structure described in each is
Further, the EnCoRe process cavity of a described PVD system is the chamber of sputtering technology again of the enhancing covering power of AMAT ENDURA PVD system.
Further, described 2nd PVD system is traditional PVD system.
Further, in steps of 5, H is used
2the technological parameter of plasma treatment be: work atmosphere is He, its H
2be 50100sccm with the total flow of the mist of He, the processing time is 20-40s.
Further, in step 6, the backwash power of described 2nd PVD system is the flow of the plasma of 9000-13000W, Ar is 20-50sccm, and the thickness of the Al layer of formation is
The present invention, for reaching another object, also provides a kind of barrier bi-layer preventing copper from spreading, comprising:
Semiconductor substrate, the front of described semiconductor base has copper metal layer;
The Ta of the close heap phase structure of hexagonal
2n thin film layer, is positioned on the surface of described copper metal layer;
The α phase TaN thin layer of body-centered cubic structure, is positioned at the Ta of the close heap phase structure of described hexagonal
2on N thin film layer;
One Al layer, is positioned on the described α phase TaN thin layer of the top that described copper metal layer is formed.
Further, the described barrier bi-layer preventing copper from spreading also comprises: the Ta of the close heap phase structure of described hexagonal
2the α phase TaN thin layer of N thin film layer and body-centered cubic structure is alternate combinations structure successively.
Further, described in each, the thickness of Ta2N thin layer is
the thickness of the α phase TaN thin layer of body-centered cubic structure described in each is
Compared with prior art, the manufacture method of the barrier bi-layer preventing copper from spreading disclosed by the invention, comprises the steps: step 1: provide semiconductor substrate, and the front of described semiconductor base has copper metal layer; Step 2: the EnCoRe process cavity described semiconductor base being placed in a PVD system, the backwash power of described EnCoRe process cavity is 20-40KW, and sputtering atmosphere is the target of the EnCoRe process cavity of the plasma bombardment of Ar, produces Ta active atomic; Step 3: the AC bias and the air pressure that are applied to described semiconductor-based bottom back side are respectively 100-900W, 4000mT-8000mT, and work atmosphere is N
2the mist formed with the plasma of described Ar, N in its mist
2molar percentage be 2%-4%, sedimentation time is 10 ~ 50s, forms the Ta of hexagonal close heap phase structure on the surface of described copper metal layer
2n thin film layer; Step 4: the technological parameter not changing step 3, by N in mist
2molar percentage become 5%-6%, at the Ta of the close heap phase structure of described hexagonal
2the surface of N thin film layer is formed the α phase TaN thin layer of body-centered cubic structure; Step 5: will Ta be formed with
2the semiconductor base of N/ α phase TaN thin layer moves in the 2nd PVD system, uses H
2plasma to the Ta that described copper metal layer is formed
2n/ α phase TaN thin layer processes; Step 6: the target of the 2nd PVD system described in the plasma bombardment of use Ar, described copper metal layer on the α phase TaN thin layer of the top formed form Al layer, also AC bias can be applied, by controlling the N in mist in EnCoRe process cavity due to a PVD system
2molar percentage, on copper metal layer, the Ta of the close heap phase structure of the better hexagonal of compactness can be formed successively
2the double barrier of the α phase TaN thin layer of N thin film layer and body-centered cubic structure, solves that the film deposition rate that traditional PVD system causes owing to can only apply backwash power is fast, the unsound shortcoming of film.
In addition, manufacture method disclosed by the invention also carries out oxidation removal to the double barrier structure that copper metal layer obtains, afterwards, depositing Al layer on double barrier, solves between Al liner in traditional MEMS and barrier layer and causes caducous problem due to the existence of oxide.
In addition, also comprise in manufacture method disclosed by the invention, after step 4, before step 5, repeat step 3 and step 4, described copper metal layer is formed the Ta of the close heap phase structure of hexagonal successively
2the α phase TaN thin layer alternate combinations structure of N thin film layer and body-centered cubic structure, therefore, the periodicity double barrier covered on copper metal layer better copper diffusion barrier can enter the phenomenon of Al layer.
Accompanying drawing explanation
Fig. 1 is the cavity body structure schematic diagram that traditional PVD system forms barrier layer on the semiconductor base with copper metal layer;
Fig. 2 is the schematic flow sheet of the manufacture method of the barrier bi-layer preventing copper from spreading in the embodiment of the present invention;
Fig. 3 a to Fig. 3 c is the side structure schematic diagram of the manufacture method of the barrier bi-layer preventing copper from spreading in the embodiment of the present invention;
Fig. 4 is the structural representation that the semiconductor base with copper metal layer in the embodiment of the present invention puts into the EnCoRe process cavity of a PVD system.
Embodiment
For enabling above-mentioned purpose of the present invention, feature and advantage become apparent more, are described in detail the specific embodiment of the present invention below in conjunction with accompanying drawing.
Set forth a lot of detail in the following description so that fully understand the present invention.But the present invention can be much different from alternate manner described here to implement, those skilled in the art can when without prejudice to doing similar popularization when intension of the present invention, therefore the present invention is by the restriction of following public concrete enforcement.
Fig. 3 c shows in the preferred embodiment of the present invention cross section structure schematic diagram of the barrier bi-layer preventing copper from spreading.As shown in Figure 3 c, described in prevent copper from spreading barrier bi-layer comprise: semiconductor substrate 100, the front of described semiconductor base 100 has copper metal layer 101; The Ta of the close heap phase structure of hexagonal
2n thin film layer 102, the Ta of the close heap phase structure of described hexagonal
2n thin film layer 102 is positioned on the surface of described copper metal layer 101; The α phase TaN thin layer 104 of body-centered cubic structure, the α phase TaN thin layer 104 of described body-centered cubic structure is positioned at the Ta of the close heap phase structure of described hexagonal
2on N thin film layer 102; One Al layer 106, described Al layer 106 is positioned on the α phase TaN thin layer 104 of described body-centered cubic structure.
Further, the Ta of the close heap phase structure of the hexagonal included by barrier bi-layer preventing copper from spreading described in
2the α phase TaN thin layer 104 of N thin film layer 102 and body-centered cubic structure is alternate combinations structure successively.
For the manufacturing process shown in Fig. 2, composition graphs 3a to Fig. 3 c and Fig. 4, is described in detail to the manufacture method of a kind of barrier bi-layer preventing copper from spreading provided by the invention.
In step sl, see Fig. 3 a, provide semiconductor substrate 100, the front of described semiconductor base 100 has copper metal layer 101.
In step s 2, see Fig. 4, described semiconductor base 100 is placed in the chamber of sputtering technology again (the Enhanced step Coverage Re-sputter of the enhancing covering power of a PVD system, EnCoRe), the backwash power DC being applied to described EnCoRe process cavity is that 20-40KW(is preferably 20KW), sputtering atmosphere is the target of the plasma bombardment EnCoRe process cavity of Ar, produces Ta(tantalum) active atomic.Wherein, the EnCoRe process cavity of a described PVD system is the EnCoRe process cavity of AMAT ENDURA PVD system.
In step s3, see Fig. 4 and Fig. 3 a, keep the size of the backwash power DC of described EnCoRe process cavity, the AC bias AC Bias being applied to described semiconductor-based bottom back side is that 100-900W(is preferably 230W), the air pressure being applied to described semiconductor-based bottom back side is that 4000-8000mT(is preferably 4000mT), work atmosphere is N
2with the mist that the plasma of described Ar is formed, N in its mist
2molar percentage be 2%-4%, sedimentation time is that 10-50s(is preferably 33s), thus the N of low discharge in described Ta active atomic and mist
2plasma combine and form thickness on described copper metal layer 101 surface and be
(be preferably 250
) the Ta of the close heap phase structure (hcp) of hexagonal
2n thin film layer 102.The Ta of the close heap phase structure of the described hexagonal now obtained
2n thin film layer 102 has low-resistance feature.
In step s 4 which, see Fig. 4 and Fig. 3 a, do not change the technological parameter of step 3, by N in mist
2the molar percentage of gas becomes 5%-6% from low discharge, thus the N of high flow capacity in described Ta active atomic and mist
2plasma to combine and at the Ta of the close heap phase structure of described hexagonal
2the surface of N thin film layer 102 being formed thickness is
(be preferably 250
) the α phase TaN thin layer 104 of body-centered cubic structure (bcc).
Due to backwash power DC not only can be applied in the EnCoRe process cavity of a PVD system, AC bias AC Bias also can be applied, and by controlling the N in mist
2the size of molar percentage, on copper metal layer, the Ta of the close heap phase structure of the better hexagonal of compactness can be formed successively
2the double barrier of the α phase TaN thin layer of N thin film layer and body-centered cubic structure, the thickness of this double barrier is not only thin, and its resistance is also low, solve that the film deposition rate that traditional PVD system causes owing to can only apply backwash power is fast, the unsound shortcoming of film, and improve the reliability of traditional diffusion impervious layer.
In order to hinder the diffusion of copper metal layer further, improving the reliability of device, after step 4, repeating step 3 and step 4, then on described copper metal layer 101, forming the Ta of the close heap phase structure of hexagonal successively
2the α phase TaN thin layer alternate combinations structure of N thin film layer and body-centered cubic structure.The periodicity of described alternate combinations structure is by the Ta of the close heap phase structure of described hexagonal
2the thickness of the double barrier of the α phase TaN thin layer formation of N thin film layer and body-centered cubic structure determines, usual periodicity is 2-6, in most preferred embodiment of the present invention, with the Ta of the close heap phase structure of hexagonal
2the thickness of N thin film layer is
the thickness of the α phase TaN thin layer of body-centered cubic structure is
periodicity is 2 to be described.
In step s 5, see Fig. 3 b, first, the Ta of the close heap phase structure of hexagonal will be formed with
2the semiconductor base of the α phase TaN thin layer of N/ body-centered cubic structure moves in the 2nd PVD system, and wherein, described 2nd PVD system is the traditional PVD system without the need to applying AC bias AC Bias.
Owing to being positioned at the surface of the α phase TaN thin layer of the uppermost body-centered cubic structure of described copper metal layer 101 and the Ta with the close heap phase structure of the hexagonal under it
2there is oxidative phenomena in the interface of N thin film layer, so use H
2plasma to the Ta of the close heap phase structure of hexagonal that described copper metal layer 101 is formed
2the α phase TaN thin layer of N/ body-centered cubic structure processes, and removes oxide.
Wherein, H is used
2the technological parameter of plasma treatment be: work atmosphere is He, its H
2be 50-100sccm with the total flow of the mist of He, the processing time is 20-40s, and in most preferred embodiment of the present invention, backwash power is 9200W, its H
2be 80sccm with the total flow of the mist of He, the processing time is 30s.
In step s 6, see Fig. 3 c, with the target of the 2nd PVD system described in the plasma bombardment of Ar, the α phase TaN thin layer of the body-centered cubic structure of the top that described copper metal layer 101 is formed forms thickness is
(be preferably
) Al layer 106.
Wherein, the parameter process of described 2nd PVD system is: backwash power DC is that 9000-13000W(is preferably 9200W), the flow of the plasma of described Ar is that 20-50sccm(is preferably 35sccm).
After step S6, said structure is carried out thermal anneal process, described copper metal layer 101 is by the Ta of the close heap phase structure of described hexagonal thereon
2the effect of the double barrier of the α phase TaN thin layer of N/ body-centered cubic structure, is difficult to diffuse to Al layer 106.In addition, owing to oxide being removed in step S5, so, at the Ta of the close heap phase structure of described hexagonal
2on the double barrier of the α phase TaN thin layer of N/ body-centered cubic structure, depositing Al layer reliability is higher, solves between Al liner in traditional MEMS and barrier layer and causes caducous problem due to the existence of oxide.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any those skilled in the art all without prejudice under spirit of the present invention and category, can carry out modifying to above-described embodiment and change.Therefore, the scope of the present invention, should listed by claims.
Claims (10)
1. a manufacture method for the barrier bi-layer preventing copper from spreading, is characterized in that, comprise the steps:
Step 1: semiconductor substrate is provided, the front of described semiconductor base has copper metal layer;
Step 2: the EnCoRe process cavity described semiconductor base being placed in a PVD system, the backwash power of described EnCoRe process cavity is 20-40KW, and sputtering atmosphere is the target of the EnCoRe process cavity of the plasma bombardment of Ar, produces Ta active atomic;
Step 3: the AC bias and the air pressure that are applied to described semiconductor-based bottom back side are respectively 100-900W, 4000mT-8000mT, and work atmosphere is N
2the mist formed with the plasma of described Ar, N in its mist
2molar percentage be 2%-4%, sedimentation time is 10 ~ 55s, forms the Ta of hexagonal close heap phase structure on the surface of described copper metal layer
2n thin film layer;
Step 4: the technological parameter not changing step 3, by N in mist
2molar percentage become 5%-6%, at the Ta of the close heap phase structure of described hexagonal
2the surface of N thin film layer is formed the α phase TaN thin layer of body-centered cubic structure;
Step 5: will Ta be formed with
2the semiconductor base of N/ α phase TaN thin layer moves in the 2nd PVD system, uses H
2plasma to the Ta that described copper metal layer is formed
2n/ α phase TaN thin layer processes;
Step 6: the target of the 2nd PVD system described in the plasma bombardment of use Ar, the α phase TaN thin layer of the top that described copper metal layer is formed forms Al layer.
2. manufacture method as claimed in claim 1, is characterized in that, also comprise after step 4, before step 5: repeat step 3 and step 4, described copper metal layer forms Ta successively
2n thin film layer and α phase TaN thin layer alternate combinations structure.
3. manufacture method as claimed in claim 2, is characterized in that, Ta described in each
2the thickness of N thin film layer is
the thickness of the α phase TaN thin layer of body-centered cubic structure described in each is
4. manufacture method as claimed in claim 1, it is characterized in that, the EnCoRe process cavity of a described PVD system is the chamber of sputtering technology again of the enhancing covering power of AMAT ENDURA PVD system.
5. manufacture method as claimed in claim 1, it is characterized in that, described 2nd PVD system is traditional PVD system.
6. manufacture method as claimed in claim 1, is characterized in that, in steps of 5, use H
2the technological parameter of plasma treatment be: work atmosphere is He, its H
2be 50-100sccm with the total flow of the mist of He, the processing time is 20-40s.
7. manufacture method as claimed in claim 1, is characterized in that, in step 6, the backwash power of described 2nd PVD system is the flow of the plasma of 9000-13000W, Ar is 20-50sccm, and the thickness of the Al layer of formation is
8. utilize the barrier bi-layer preventing copper from spreading prepared by manufacture method of the barrier bi-layer preventing copper from spreading in claim 1,4 to 7 described in any one, it is characterized in that, comprising:
Semiconductor substrate, the front of described semiconductor base has copper metal layer;
The Ta of the close heap phase structure of hexagonal
2n thin film layer, is positioned on the surface of described copper metal layer;
The α phase TaN thin layer of body-centered cubic structure, is positioned at the Ta of the close heap phase structure of described hexagonal
2on N thin film layer;
One Al layer, is positioned on the described α phase TaN thin layer of the top that described copper metal layer is formed.
9. the barrier bi-layer preventing copper from spreading as claimed in claim 8, is characterized in that, also comprise: the Ta of the close heap phase structure of described hexagonal
2the α phase TaN thin layer of N thin film layer and body-centered cubic structure is alternate combinations structure successively.
10. the barrier bi-layer preventing copper from spreading as claimed in claim 9, is characterized in that, Ta described in each
2the thickness of N thin film layer is
the thickness of the α phase TaN thin layer of body-centered cubic structure described in each is
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310520214.7A CN104576513B (en) | 2013-10-29 | 2013-10-29 | Prevent barrier bi-layer and corresponding manufacture method that copper spreads |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310520214.7A CN104576513B (en) | 2013-10-29 | 2013-10-29 | Prevent barrier bi-layer and corresponding manufacture method that copper spreads |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104576513A true CN104576513A (en) | 2015-04-29 |
| CN104576513B CN104576513B (en) | 2017-08-08 |
Family
ID=53092244
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310520214.7A Active CN104576513B (en) | 2013-10-29 | 2013-10-29 | Prevent barrier bi-layer and corresponding manufacture method that copper spreads |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104576513B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108666261A (en) * | 2017-03-29 | 2018-10-16 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and forming method thereof |
| CN110112096A (en) * | 2019-05-17 | 2019-08-09 | 长江存储科技有限责任公司 | Metal interconnection structure and forming method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6140231A (en) * | 1999-02-12 | 2000-10-31 | Taiwan Semiconductor Manufacturing Company | Robust diffusion barrier for Cu metallization |
| US6291885B1 (en) * | 1995-06-30 | 2001-09-18 | International Business Machines Corporation | Thin metal barrier for electrical interconnections |
| US20030155655A1 (en) * | 2002-02-20 | 2003-08-21 | International Business Machines Corporation | Integrated, active, moisture and oxygen getter layers |
| US20060202345A1 (en) * | 2005-03-14 | 2006-09-14 | Hans-Joachim Barth | Barrier layers for conductive features |
-
2013
- 2013-10-29 CN CN201310520214.7A patent/CN104576513B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6291885B1 (en) * | 1995-06-30 | 2001-09-18 | International Business Machines Corporation | Thin metal barrier for electrical interconnections |
| US6140231A (en) * | 1999-02-12 | 2000-10-31 | Taiwan Semiconductor Manufacturing Company | Robust diffusion barrier for Cu metallization |
| US20030155655A1 (en) * | 2002-02-20 | 2003-08-21 | International Business Machines Corporation | Integrated, active, moisture and oxygen getter layers |
| US20060202345A1 (en) * | 2005-03-14 | 2006-09-14 | Hans-Joachim Barth | Barrier layers for conductive features |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108666261A (en) * | 2017-03-29 | 2018-10-16 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and forming method thereof |
| CN110112096A (en) * | 2019-05-17 | 2019-08-09 | 长江存储科技有限责任公司 | Metal interconnection structure and forming method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104576513B (en) | 2017-08-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6511424B2 (en) | LAMINATE AND METHOD FOR MANUFACTURING THE SAME | |
| TW201203459A (en) | Method for forming interconnection line and semiconductor structure | |
| TWI260740B (en) | Semiconductor device with low-resistance inlaid copper/barrier interconnects and method for manufacturing the same | |
| JP2011216867A (en) | Thin-film formation method | |
| TW200301952A (en) | A copper interconnection and the method for fabricating the same | |
| CN103003939A (en) | Method and structure to improve the conductivity of narrow copper filled vias | |
| JP2020534702A (en) | Methods and equipment for filling board features with cobalt | |
| TW202401505A (en) | Expansion control for bonding | |
| CN104576513A (en) | Double-layer barrier layer for preventing copper from diffusing and corresponding fabricating method thereof | |
| TW380308B (en) | Semiconductor device and a process for forming the device | |
| CN104253087A (en) | Filling method of aluminum metal process contact hole | |
| JP5384269B2 (en) | Method for forming Cu wiring | |
| JP2006183145A (en) | Method of forming film, film forming apparatus and storage medium | |
| CN110911352A (en) | Diffusion barrier layer for Cu interconnection and preparation method and application thereof | |
| CN103474390B (en) | A kind of manufacture method of aluminum metal lines | |
| JP2016111047A (en) | METHOD FOR FORMING Cu WIRING AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | |
| TW201133617A (en) | Method of processing film surface and film surface processing apparatus | |
| JP2004525257A (en) | Method for obtaining low temperature alpha tantalum thin film using wafer bias | |
| JP2016527688A (en) | Fabrication of gate electrodes by dewetting silver | |
| CN100521188C (en) | Copper metallized barrier layer structure of integrated circuit or semiconductor device and its preparing method | |
| CN101819944A (en) | Method for forming copper contact interconnection structure | |
| TW201606932A (en) | Wire structure and manufacturing method thereof | |
| CN106783800B (en) | Barrier layer of chip and preparation method thereof | |
| JP3939426B2 (en) | Pressure embedding method for copper wiring film | |
| KR101204275B1 (en) | Forming method for thermal stress relaxation type through-hole electrode and thermal stress relaxation type through-hole electrode formed thereby |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |