CN104954062A - FPGA (field programmable gate array)-based minisatellite-borne AIS (automatic identification system) signal acquisition system - Google Patents

FPGA (field programmable gate array)-based minisatellite-borne AIS (automatic identification system) signal acquisition system Download PDF

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Publication number
CN104954062A
CN104954062A CN201510283617.3A CN201510283617A CN104954062A CN 104954062 A CN104954062 A CN 104954062A CN 201510283617 A CN201510283617 A CN 201510283617A CN 104954062 A CN104954062 A CN 104954062A
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frequency
ais
signal
fpga
digital
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李立欣
袁建平
侯建文
岳晓奎
罗建军
冯浩
万桂斌
袁健华
申礼斌
周德云
张会生
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Northwestern Polytechnical University
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Northwestern Polytechnical University
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/14Relay systems
    • H04B7/15Active relay systems
    • H04B7/185Space-based or airborne stations; Stations for satellite systems
    • H04B7/1851Systems using a satellite or space-based relay

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Astronomy & Astrophysics (AREA)
  • Aviation & Aerospace Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Superheterodyne Receivers (AREA)

Abstract

The invention provides an FPGA (field programmable gate array)-based minisatellite-borne AIS (automatic identification system) signal acquisition system. Ship AIS signals received by a VHF (very high frequency) antenna are subjected to narrow-band filtering and amplification through a front-end radio-frequency processing module and then sent to an A/D (analog/digital) conversion circuit for analog-digital conversion to obtain medium-frequency digital signals, the medium-frequency digital signals are sent to an FPGA master control processing module for down conversion, filter extraction, zero-frequency adjustment, frequency mixing, decimation filtering and threshold setup, and extracted AIS digital signals are outputted after data coding. The FPGA-based minisatellite-borne AIS signal acquisition system has the advantages of high stability, high radiation resistance, stability in operation and simplicity in circuit design.

Description

A kind of moonlet based on FPGA carries ais signal acquisition system
Technical field
The invention belongs to AEROSPACE APPLICATION field, relate to a kind of moonlet and carry function module design.
Background technology
Along with the fast development of Aeronautics and Astronautics technology especially moonlet, based on moonlet carry AIS realize significant.Spaceborne AIS system can close to the boats and ships relevant information being equipped with AIS equipment that to obtain on a large scale in real time in even global range, the position at the current place of such as boats and ships, boat degree, running status, boats and ships size, drinking water, the even information such as nationality, official number.There is round-the-clock, round-the-clock, on a large scale, at a distance, multi-parameter and LEO Small Satellite launch by advantages such as nationality's restrictions, so AIS has original advantage at ocean supervision area.
External moonlet carried AIS system and mostly all adopted FPGA to realize present stage, and studies in China is started late, and development space is larger.
From practical application current abroad, comprise the U.S., European Space Agency, Germany, Canada, Italy, France, Norway, Japan etc. and all carry AIS system at the moonlet of develop actively oneself, and part moonlet carries AIS has launched and come into operation.United States Coasts Guards in 2004 and U.S.'s ORBCOMM corporate negotiations are launched a concept being mounted with AIS receiver and are demonstrated satellite.At the end of 2006, the U.S. transmits the satellite carrying Naval Research Labratory Target indication experiment AIS load.ORBCOMM company in 2008 transmits the Quick Launch series of satellites that the coast guard verifying satellites that is mounted with AIS receiver and 5 are mounted with AIS receiver.Within 2009, ORBCOMM company becomes the provider of global first hand satellite AIS commerce services.Meanwhile, in April, 2008, Canadian COMDEV company also transmits their first spaceborne AIS pilot system.The OHB company of Germany and branch company of Luxembourg LuxSpace thereof are also one of famous in the world spaceborne AIS research institutes, except the spaceborne AIS development participating in ORBCOMM company of the U.S., they successively transmit Rubin 7AIS, Rubin 8AIS, the serial spaceborne AIS test load of Rubin 9.Can say, in the development of carrying AIS system based on moonlet, be in a fast state abroad.
From domestic, existing part expert and mechanism, on the basis of boat-carrying, airborne and bank base AIS, carry the general principle of AIS and key technology to moonlet and have carried out preliminary exploration and research, also obtain some achievements.But generally speaking, the moonlet of China carries the level that AIS technology is also in an initial development compared with abroad, lack the research and analysis assessment that system is deep.
Common at present boat-carrying, bank base and airborne AIS are a kind of land-Hai base station systems being operated in VHF wave band; be subject to the restriction of other conditions such as antenna height; its maximum operating range is generally no more than at a distance of 50 nautical miles of scopes, and then causes AIS not embody it completely in the important function on a large scale even in global ocean and status.Along with the fast development of aeronautical and space technology especially moonlet, carry the design and implimentation of AIS based on moonlet, the application demand identifying, detect and continue tracking to the dealing boats and ships at sea to every country in the world and society is significant.
Summary of the invention
In order to overcome the deficiencies in the prior art, the invention provides a kind of moonlet based on fpga chip and carrying ais signal acquisition system, realizing reception and the forwarding of boats and ships ais signal on moonlet, circuit design is simple, working stability, and capability of resistance to radiation is strong, and reliability is high.
The technical solution adopted for the present invention to solve the technical problems is: comprise front radio-frequency processing module and FPGA master control processing module.
The watercraft AIS signal that VHF antenna receives is through the narrow-band filtering of front radio-frequency processing module and after amplifying, deliver to A/D change-over circuit and carry out analog-to-digital conversion, the digital intermediate frequency signal obtained is delivered to FPGA master control processing module and is carried out down-conversion, filtering extraction, zero-frequency adjustment, mixing, filtering extraction and thresholding setting, finally the AIS digital signal extracted is exported after data encoding.
In described front radio-frequency processing module, the watercraft AIS signal of coming in from VHF antenna carries out the amplification of 20dB through low noise amplifier AM12021, the signal exported disturbs outward through the radio frequency band filter filtering ais signal band of bandwidth 20kHz, radio frequency band filter selects SAWTEKSAW 856042, and the signal is after filtering quantified as 14bit digital signal through analog to digital converter and enters FPGA master control processing module.
Described FPGA master control processing module carries out down-conversion, filtering extraction, zero-frequency adjustment, mixing, filtering extraction to the AIS digital intermediate frequency signal that the transmission of front radio-frequency processing module is come in, after completing mixing and filtering extraction, two frequency sub-band 161.975MHz ± 10kHz, 162.025MHz ± 10kHz of every road input signal are down-converted to that frequency range is 0 ~ 20kHz, sample frequency is 40kHz, quantization digit is the low-frequency digital signal of 10bits; To the false-alarm check processing that two-way low-frequency digital signal is correlated with, once detect that signal exists, packing at once exports this road signal, sends FPGA inside to and admittedly deposits process; Then send eventually through moonlet digital transmission module the AIS digital signal extracted to ground installation through data encoding.
AD9640 selected by described analog to digital converter, FPGA master control processing module be IGLOO series based on Flash structure AGL600.
The invention has the beneficial effects as follows: the narrow-band filtering of the ais signal that antenna receives by front radio-frequency processing module through microwave receiving front end and after amplifying, deliver to A/D change-over circuit and carry out analog-to-digital conversion, then send into rear end FPGA module and carry out relevant treatment.FPGA is as main control chip, and major function has been transmit the AIS digital intermediate frequency signal of coming in front end to carry out down-conversion, filtering extraction, zero-frequency adjustment, mixing, filtering extraction.After completing mixing and filtering process, it is 10bits that two frequency sub-band 161.975MHz ± 10kHz, 162.025MHz ± 10kHz of every road input signal are down-converted to quantization digit, and frequency range is 0 ~ 20kHz, sample frequency is the low-frequency digital signal of 40kHz.Then to the false-alarm check processing that the two-way low-frequency digital signal exported is correlated with, once detect that signal exists, packing at once exports this road signal, sends FPGA inside to and admittedly deposits process.Then the AIS digital signal extracted is exported after data encoding, send ground installation to eventually through moonlet digital transmission module.Circuit design of the present invention is simple, working stability, and capability of resistance to radiation is strong, and reliability is high.
Accompanying drawing explanation
Fig. 1 is structural principle block diagram of the present invention;
Fig. 2 is the front radio-frequency processing module schematic diagram in the present invention;
Fig. 3 is the analog to digital converter module principle figure in the present invention;
Fig. 4 is the FPGA internal signal process software flow chart in the present invention.
Embodiment
Below in conjunction with drawings and Examples, the present invention is further described, the present invention includes but be not limited only to following embodiment.
The present invention devises a kind of moonlet based on FPGA and carries ais signal acquisition module, it is by the powerful logical resource of FPGA circuit and data-handling capacity, realize reception and the forwarding of boats and ships ais signal on moonlet, then realize the supervision to Ship Target in global marine site.Circuit design is simple, and working stability, reliability is high.
Technical scheme of the present invention is: a kind of moonlet based on FPGA carries ais signal acquisition system, includes front radio-frequency processing module and FPGA master control processing module.Wherein, FPGA part to carry the main control module of AIS system as moonlet, is mainly used to control to receive the analog intermediate frequency signal from front end, realizes the frequency separation process of the ais signal after digitlization, code and decode and data store and calling function it.
Further technical scheme of the present invention is: the watercraft AIS signal that VHF antenna receives by native system, through the narrow-band filtering of front radio-frequency processing module and after amplifying, is delivered to A/D change-over circuit and carried out analog-to-digital conversion.Then digital intermediate frequency signal is delivered to FPGA master control processing module and carry out down-conversion, filtering extraction, zero-frequency adjustment, mixing, filtering extraction, thresholding setting, finally the AIS digital signal extracted is exported after data encoding.Again the ais signal of output is sent in ground signal processing equipment by the Data transfer system on moonlet and carries out relevant treatment, and be finally sent to boats and ships, meet the need of work of spaceborne-bank base-onboard AIS.
Further technical scheme of the present invention is: in above-mentioned front radio-frequency processing module, the watercraft AIS signal of coming in from antenna carries out the amplification of 20dB through low noise amplifier AM12021, the signal exported disturbs outward through the radio frequency band filter filtering ais signal band of bandwidth 20kHz, radio frequency band filter (Surface Acoustic Wave Filter SAW) selects SAWTEKSAW856042, and the signal is after filtering quantified as 14bit digital signal through analog to digital converter and enters FPGA Base-Band Processing.
Further technical scheme of the present invention is: above-mentioned analog to digital converter has selected a slice AD9640 to be used for guaranteeing that the number of significant digit after eventually passing signal transacting can meet requirement of system design.AD9640 is the ADC of a couple of 14bit, 150MSPS.Adopt 1.8V single power supply, a built-in high-performance sample/hold amplifier (SHA) and sheet internal reference voltage source, most high sampling rate can reach 150MHz, analog bandwidth reaches as high as 450MHz, the direct bandpass sampling of radio frequency can be done, when adopting differential driving, AD9640 can realize optimum performance.
Further technical scheme of the present invention is: the fpga chip of above-mentioned employing be IGLOO series based on Flash structure AGL600, configuring chip that need not be special, its configuration information is stored in inner Flash.In addition, the product power consumption of ACTEL company is significantly less than SRAM product, and its quiescent dissipation is equivalent to 1/10th of product of going together, and dynamic power consumption is equivalent to 1/1 to three/4th of product of going together.AGL600 is 144 IO, and have 600,000 system doors, highest frequency can reach 250MHz.Major function has been transmit the AIS digital intermediate frequency signal of coming in front end to carry out down-conversion, filtering extraction, zero-frequency adjustment, mixing, filtering extraction.Complete mixing and filtering process in FPGA after, two frequency sub-band 161.975MHz ± 10kHz, 162.025MHz ± 10kHz of every road input signal are down-converted to that frequency range is 0 ~ 20kHz, sample frequency is 40kHz, quantization digit is the low-frequency digital signal of 10bits.Then to the false-alarm check processing that the two-way low-frequency digital signal exported is correlated with, once detect that signal exists, packing at once exports this road signal, sends FPGA inside to and admittedly deposits process.Then send eventually through moonlet digital transmission module the AIS digital signal extracted to ground installation through data encoding.
With reference to Fig. 1, embodiments of the invention, by the powerful logical resource of FPGA circuit and data-handling capacity, realize reception and the forwarding of boats and ships ais signal on moonlet, realize the supervision to Ship Target in global marine site.As shown in Figure 1, FPGA, as the main control module of moonlet loading system, is connected with other module, management by synchronization self and front radio-frequency processing module.
Front radio-frequency processing module schematic diagram of the present invention as shown in Figure 2.The RFIN port that the watercraft AIS signal of coming in from antenna enters AM12021 low noise amplifier through J1 pin amplifies, the signal exported from RFOUT disturbs through the radio frequency band filter SAWTEKSAW 856042 filtering ais signal band of bandwidth 20kHz, and outputs to late-class circuit eventually through electric capacity C7 filtering.In actual test, AM12021 reaches the gain of about 30dB, counts SAW Insertion Loss, final stage matching attenuation, circuit and joint Insertion Loss etc. in physical channel, and amount to the loss of about 10dB, actual LNA combines the gain obtaining 20dB with SAW.
Analog to digital converter module principle figure of the present invention as shown in Figure 3.Wherein adopt 1.8V single power supply, a built-in high-performance sample/hold amplifier (SHA) and sheet internal reference voltage source, most high sampling rate can reach 150MHz, 14 resolutions, analog bandwidth reaches as high as the AD9640 of 450MHz, can export two-way digital medium-frequency signal.Wherein AIS_VA+, AIS_VA-and AIS_VB+, AIS_VB-are respectively two-way analog signals difference input port, and D0A ~ D13A and D0B ~ D13B is respectively two-way analog-to-digital conversion digital output port.AIS_CML pin is used for providing bias voltage to analog input, and MIX_VREF is used to provide reference voltage, CLK+ and CLK-provides differential clocks to input respectively.
With reference to Fig. 4, control module of the present invention, the radiation proof chip AGL600 of ACTEL company is used as the main control chip of equipment.Complete mixing and filtering process in FPGA after, two frequency sub-band 161.975MHz ± 10kHz and 162.025MHz ± 10kHz of every road input signal are down-converted to that frequency range is 0 ~ 20kHz, sample frequency is 40kHz, quantization digit is the low-frequency digital signal of 10bits.In order to extract 2 road low-frequency digital signals, need to do 2 local oscillators to the extraction of digital signal in FPGA inside, 2 mixing, No. 2 low pass filters, No. 1 band pass filter and 1 high pass filter, the concrete exponent number of filter is determined according to specific targets, and by process step by step, data transfer rate being reduced to frequency range is 0 ~ 20kHz, sample frequency 40kHz.Then to the false-alarm check processing that the two-way low-frequency digital signal exported is correlated with, once detect that signal exists, packing at once exports this road signal, sends FPGA inside to and admittedly deposits process.Then the AIS digital signal extracted finally is exported through data encoding function, send ground installation to by moonlet digital transmission module.

Claims (4)

1. the moonlet based on FPGA carries ais signal acquisition system, comprise front radio-frequency processing module and FPGA master control processing module, it is characterized in that: the watercraft AIS signal that VHF antenna receives is through the narrow-band filtering of front radio-frequency processing module and after amplifying, deliver to A/D change-over circuit and carry out analog-to-digital conversion, the digital intermediate frequency signal obtained is delivered to FPGA master control processing module and is carried out down-conversion, filtering extraction, zero-frequency adjustment, mixing, filtering extraction and thresholding setting, finally the AIS digital signal extracted is exported after data encoding.
2. the moonlet based on FPGA according to claim 1 carries ais signal acquisition system, it is characterized in that: in described front radio-frequency processing module, the watercraft AIS signal of coming in from VHF antenna carries out the amplification of 20dB through low noise amplifier AM12021, the signal exported disturbs outward through the radio frequency band filter filtering ais signal band of bandwidth 20kHz, radio frequency band filter selects SAWTEKSAW 856042, and the signal is after filtering quantified as 14bit digital signal through analog to digital converter and enters FPGA master control processing module.
3. the moonlet based on FPGA according to claim 1 carries ais signal acquisition system, it is characterized in that: described FPGA master control processing module carries out down-conversion, filtering extraction, zero-frequency adjustment, mixing, filtering extraction to the AIS digital intermediate frequency signal that the transmission of front radio-frequency processing module is come in, after completing mixing and filtering extraction, two frequency sub-band 161.975MHz ± 10kHz, 162.025MHz ± 10kHz of every road input signal are down-converted to that frequency range is 0 ~ 20kHz, sample frequency is 40kHz, quantization digit is the low-frequency digital signal of 10bits; To the false-alarm check processing that two-way low-frequency digital signal is correlated with, once detect that signal exists, packing at once exports this road signal, sends FPGA inside to and admittedly deposits process; Then send eventually through moonlet digital transmission module the AIS digital signal extracted to ground installation through data encoding.
4. the moonlet based on FPGA according to claim 1 carries ais signal acquisition system, it is characterized in that: AD9640 selected by described analog to digital converter, FPGA master control processing module be IGLOO series based on Flash structure AGL600.
CN201510283617.3A 2015-05-29 2015-05-29 FPGA (field programmable gate array)-based minisatellite-borne AIS (automatic identification system) signal acquisition system Pending CN104954062A (en)

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CN106506018A (en) * 2016-10-20 2017-03-15 武汉大学 A kind of digital AIS receiver systems that is directly sampled based on radio frequency
CN109328440A (en) * 2016-04-05 2019-02-12 威尔逊电子有限责任公司 Narrow band signal for network protection detects
CN110138416A (en) * 2019-04-11 2019-08-16 上海卫星工程研究所 The spaceborne wired multi-channel detection probabilistic testing method of AIS ship oceangoing ship

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109328440A (en) * 2016-04-05 2019-02-12 威尔逊电子有限责任公司 Narrow band signal for network protection detects
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CN110138416A (en) * 2019-04-11 2019-08-16 上海卫星工程研究所 The spaceborne wired multi-channel detection probabilistic testing method of AIS ship oceangoing ship

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