CN105119485A - Charge pump circuit - Google Patents

Charge pump circuit Download PDF

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Publication number
CN105119485A
CN105119485A CN201510559759.8A CN201510559759A CN105119485A CN 105119485 A CN105119485 A CN 105119485A CN 201510559759 A CN201510559759 A CN 201510559759A CN 105119485 A CN105119485 A CN 105119485A
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Prior art keywords
charge pump
voltage
circuit
frequency
waveform generator
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CN201510559759.8A
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Chinese (zh)
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CN105119485B (en
Inventor
陈晓璐
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Zhaoyi Innovation Technology Group Co ltd
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GigaDevice Semiconductor Beijing Inc
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Abstract

The invention discloses a charge pump circuit. The charge pump circuit comprises the following components that: a voltage detection module used for detecting the output voltage of a charge pump and outputting enabling signals to the charge pump; a counter used for timing the enabling period of the enabling signals and adjusting the frequency of a waveform generator when the enabling period is lower or higher than a set value, wherein the waveform generator generates the pulse signals at the frequency; the waveform generator which generates the pulse signals for a voltage detection circuit so as to refresh the detection frequency of the voltage detection circuit; and the charge pump which is used for outputting target voltage under the control of the enabling signals. According to the charge pump circuit of the embodiment of the invention, a frequency refreshing function is additionally realized; the enabling period of the enabling signals is timed through the counter, and the frequency of the waveform generator, at which the waveform generator generates the pulse signals, is adjusted when the enabling period is lower or higher than the set value; and therefore, the waste of power dissipation can be reduced to the largest extent with the stability of the output voltage ensured.

Description

A kind of charge pump circuit
Technical field
The embodiment of the present invention relates to circuit engineering field, particularly relates to a kind of charge pump circuit.
Background technology
Charge pump circuit, as the basic module of flash storage, determines the program/erase speed of Flash to a great extent.Along with the development of integrated circuit, based on the consideration of low-power consumption, low cost, charge pump circuit application is in integrated circuits more and more extensive.
The basic functional principle of charge pump be by electric capacity to the build-up effect of electric charge the output voltage of lifting charge pump.Due to the existence of leakage current, charge pump needs testing circuit to detect output voltage, when output voltage is started working lower than charge pump during target voltage, output voltage is lifted to target voltage.Often pair of output voltage detects a capital and extracts electric current from output voltage terminal, if carry out detecting the waste that will cause very large power consumption to output voltage continually, if but every just detecting once to output voltage for a long time, it is very large that output voltage will depart from target voltage, makes output voltage very unstable.
In sum, in order under the prerequisite ensureing output voltage stabilization, farthest reduce the waste of power consumption, need to control the detection frequency of testing circuit.
Summary of the invention
The invention provides a kind of charge pump circuit, to realize, under the prerequisite ensureing output voltage stabilization, farthest reducing the waste of power consumption.
The embodiment of the present invention provides a kind of charge pump circuit, comprising: voltage detection module, and for detecting the output voltage of charge pump under the control of pulse signal, and output enable signal is to charge pump, starts charge pump and starts working; Counter, for carrying out timing to the enable phase of described enable signal, when the enable phase lower than or produce the frequency of pulse signal higher than adjusting waveform generator during set point; Waveform generator, for producing the detection frequency of pulse signal to voltage detecting circuit refresh voltage testing circuit under the control of described counter; Charge pump, for exporting target voltage under the control of described enable signal.
Described charge pump is positive voltage charge pump.
Described voltage detecting circuit is made up of the first resistance, the second resistance, a comparator and an enable switch; Wherein said first resistance is connected with described enable switch with one end after the second resistant series, and the other end is connected with described electric charge delivery side of pump; The in-phase input end input reference voltage of described comparator, inverting input is connected between described first resistance and the second resistance, output output enable signal.
The charge pump circuit that the embodiment of the present invention provides, add refreshing frequency controlling functions, timing is carried out by the enable phase of counter to enable signal, when the enable phase lower than or produce the frequency of pulse signal higher than adjusting waveform generator during set point, and then refreshing self-adjusting is carried out to the detection frequency of voltage detection module, under the prerequisite ensureing output voltage stabilization, farthest reduce the waste of power consumption.
Accompanying drawing explanation
Fig. 1 is a kind of charge pump circuit block diagram that the embodiment of the present invention one provides;
Fig. 2 is the wave form varies figure of pulse signal RF_EN and PUMP_EN of the output voltage VouT that provides of the embodiment of the present invention one and correspondence;
Fig. 3 is the circuit diagram of the voltage detecting circuit that the embodiment of the present invention two provides.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.Be understandable that, specific embodiment described herein is only for explaining the present invention, but not limitation of the invention.It also should be noted that, for convenience of description, illustrate only part related to the present invention in accompanying drawing but not entire infrastructure.
Embodiment one
A kind of charge pump circuit block diagram that Fig. 1 provides for the embodiment of the present invention one, the present embodiment is applicable in the integrated circuit of low-power consumption.A kind of charge pump circuit block diagram that the present embodiment provides, as shown in Figure 1, comprise voltage detection module, for detecting the output voltage of charge pump under the control of pulse signal, and output enable signal is to charge pump, starts charge pump and starts working; Counter, for carrying out timing to the enable phase of described enable signal, when the enable phase lower than or produce the frequency of pulse signal higher than adjusting waveform generator during set point; Waveform generator, for producing the detection frequency of pulse signal to voltage detecting circuit refresh voltage testing circuit under the control of described counter; Charge pump, for exporting target voltage under the control of described enable signal.
Wherein, described charge pump is preferably positive voltage charge pump.
Due to the existence of leakage current (Ileak), the output voltage of charge pump as shown in Figure 1 VouT constantly can decline from target voltage, so charge pump needs voltage detecting circuit to detect output voltage, output voltage VouT carries out work lower than charge pump during target voltage Vtarg, and VouT is lifted to target voltage again.During each detection, voltage detecting circuit needs to extract electric current from VouT, causes the waste of power consumption, in order to reduce circuit power consumption, can flush mechanism be adopted, with certain frequency cut-in voltage testing circuit, often open once, VouT is detected once, VouT is lifted back target voltage again.Open frequency is lower, and the power wastage that voltage detecting circuit causes is less, but voltage drop value is larger simultaneously, causes output voltage unstable.Suppose that voltage detecting circuit is opened once every time t0, then voltage drop value V0=Ileak*t0/Cld, wherein Ileak is transistor drain current, cannot avoid also cannot measuring, if t0 is set to fixed value, then V0 value cannot be estimated, and when leakage current Ileak is excessive, may to depart from target voltage excessively far away for the output voltage VouT of charge pump.So need the open frequency constantly adjusting voltage detecting circuit according to the output voltage of charge pump, under not only ensureing the prerequisite of output voltage stabilization, do not cause the significant wastage of power consumption.
For achieving the above object, suppose that charge pump provides the ability of electric current to be Ipump, then output voltage VouT is lifted back the time t1=V0*Cld/Ipump that target voltage needs, namely the enable phase of the enable signal of starting resistor testing circuit is t1, suppose that t1 corresponding V0 in interval [Tmin, Tmax] scope is design load.With counter, t1 is detected, if t1>Tmax, then accelerate the frequency that waveform generator produces pulse (RF_EN), and then accelerate the detection frequency of voltage detecting circuit, constantly start charge pump in order to reduce the drop-out value V0 of output voltage, if t1<Tmin, then reduce the frequency that waveform generator produces pulse (RF_EN), and then reduce the detection frequency of voltage detecting circuit, in order to reduce power consumption.
It should be noted that, in Fig. 1, Cld represents the ability that charge pump provides electric charge.
In order to clearly understand the course of work of above-mentioned charge pump circuit, Fig. 2 gives the wave form varies figure of pulse signal RF_EN and PUMP_EN of output voltage VouT and correspondence, in figure, V0 and V2 represents that output voltage VouT departs from the value of target voltage, and V0 is greater than V2; T1 and t3 represents the pulsewidth of enable signal PUMP_EN, and t1 is greater than t3; T0 and t2 represents the sense cycle of voltage detecting circuit.
The technical scheme of the present embodiment, timing is carried out by the enable phase of counter to enable signal, when the enable phase lower than or produce the frequency of pulse signal higher than adjusting waveform generator during set point, and then refreshing self-adjusting is carried out to the detection frequency of voltage detection module, under the prerequisite ensureing output voltage stabilization, farthest reduce the waste of power consumption
Embodiment two
On the basis of above-described embodiment, as a preferred embodiment, Fig. 3 gives the physical circuit figure of described voltage detecting circuit, as shown in Figure 3: described voltage detecting circuit is made up of the first resistance R0, the second resistance R1, an a comparator D1 and enable switch KM_EN; After wherein said first resistance R0 connects with the second resistance R2, one end is connected with described enable switch KM_EN, and the other end is connected with the output end vo uT of described charge pump; The in-phase input end input reference voltage Vref of described comparator D1, inverting input is connected to Vin between described first resistance and the second resistance, output output enable signal PUMP_EN.
Wherein, reference voltage Vref is set point, described enable switch KM_EN is normal open switch, ground connection after only having when voltage detecting circuit starts to detect output voltage described enable switch KM_EN closed, when Vin is less than Vref, output enable signal PUMP_EN starts charge pump and starts working output voltage is raised to target voltage.
The technical scheme of the present embodiment, by voltage detecting circuit, detection output enable signal PUMP_EN startup charge pump is carried out to the output voltage of charge pump and output voltage is raised to target voltage, under the prerequisite ensureing output voltage stabilization, farthest reduce the waste of power consumption.
Note, above are only preferred embodiment of the present invention and institute's application technology principle.Skilled person in the art will appreciate that and the invention is not restricted to specific embodiment described here, various obvious change can be carried out for a person skilled in the art, readjust and substitute and can not protection scope of the present invention be departed from.Therefore, although be described in further detail invention has been by above embodiment, the present invention is not limited only to above embodiment, when not departing from the present invention's design, can also comprise other Equivalent embodiments more, and scope of the present invention is determined by appended right.

Claims (3)

1. a charge pump circuit, is characterized in that, this circuit comprises:
Voltage detection module, for detecting the output voltage of charge pump under the control of pulse signal, and output enable signal is to charge pump, starts charge pump and starts working;
Counter, for carrying out timing to the enable phase of described enable signal, when the enable phase lower than or produce the frequency of pulse signal higher than adjusting waveform generator during set point;
Waveform generator, for producing the detection frequency of pulse signal to voltage detecting circuit refresh voltage testing circuit under the control of described counter;
Charge pump, for exporting target voltage under the control of described enable signal.
2. circuit according to claim 1, is characterized in that, described charge pump is positive voltage charge pump.
3. circuit according to claim 1, is characterized in that, described voltage detecting circuit is made up of the first resistance, the second resistance, a comparator and an enable switch; Wherein said first resistance is connected with described enable switch with one end after the second resistant series, and the other end is connected with described electric charge delivery side of pump; The in-phase input end input reference voltage of described comparator, inverting input is connected between described first resistance and the second resistance, output output enable signal.
CN201510559759.8A 2015-09-06 2015-09-06 A kind of charge pump circuit Active CN105119485B (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106645893A (en) * 2016-09-30 2017-05-10 上海贝岭股份有限公司 Charge pump and voltage detection circuit thereof
CN106655727A (en) * 2017-02-07 2017-05-10 苏州锴威特半导体有限公司 Device for reducing power consumption of solar bypass switching circuit, and method implemented by device
CN107562106A (en) * 2017-09-05 2018-01-09 华大半导体有限公司 A kind of super low-power consumption High-reliability power source management design and implementation method
CN107589773A (en) * 2017-09-05 2018-01-16 华大半导体有限公司 Super low-power consumption High-reliability power source management design and implementation method
TWI763024B (en) * 2020-09-04 2022-05-01 瑞昱半導體股份有限公司 Voltage modulation circuit and method thereof

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US6259612B1 (en) * 1999-09-20 2001-07-10 Kabushiki Kaisha Toshiba Semiconductor device
CN102684478A (en) * 2012-05-04 2012-09-19 上海艾为电子技术有限公司 Charge pump circuit
CN102868395A (en) * 2012-10-11 2013-01-09 广州润芯信息技术有限公司 Phase-locked loop frequency synthesizer and open loop frequency coarse tuning method
CN102868399A (en) * 2012-10-11 2013-01-09 广州润芯信息技术有限公司 Phase-locked loop frequency synthesizer and phase-locked loop loss lock detecting and adjusting method
CN103389771A (en) * 2013-07-26 2013-11-13 上海宏力半导体制造有限公司 Low power consumption voltage regulator circuit
CN204886694U (en) * 2015-09-06 2015-12-16 北京兆易创新科技股份有限公司 High precision low power dissipation charge pump circuit

Patent Citations (6)

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Publication number Priority date Publication date Assignee Title
US6259612B1 (en) * 1999-09-20 2001-07-10 Kabushiki Kaisha Toshiba Semiconductor device
CN102684478A (en) * 2012-05-04 2012-09-19 上海艾为电子技术有限公司 Charge pump circuit
CN102868395A (en) * 2012-10-11 2013-01-09 广州润芯信息技术有限公司 Phase-locked loop frequency synthesizer and open loop frequency coarse tuning method
CN102868399A (en) * 2012-10-11 2013-01-09 广州润芯信息技术有限公司 Phase-locked loop frequency synthesizer and phase-locked loop loss lock detecting and adjusting method
CN103389771A (en) * 2013-07-26 2013-11-13 上海宏力半导体制造有限公司 Low power consumption voltage regulator circuit
CN204886694U (en) * 2015-09-06 2015-12-16 北京兆易创新科技股份有限公司 High precision low power dissipation charge pump circuit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106645893A (en) * 2016-09-30 2017-05-10 上海贝岭股份有限公司 Charge pump and voltage detection circuit thereof
CN106655727A (en) * 2017-02-07 2017-05-10 苏州锴威特半导体有限公司 Device for reducing power consumption of solar bypass switching circuit, and method implemented by device
CN106655727B (en) * 2017-02-07 2023-11-10 苏州锴威特半导体股份有限公司 Device and method for reducing power consumption of solar bypass switch circuit
CN107562106A (en) * 2017-09-05 2018-01-09 华大半导体有限公司 A kind of super low-power consumption High-reliability power source management design and implementation method
CN107589773A (en) * 2017-09-05 2018-01-16 华大半导体有限公司 Super low-power consumption High-reliability power source management design and implementation method
CN107589773B (en) * 2017-09-05 2019-01-22 华大半导体有限公司 Super low-power consumption High-reliability power source management design and implementation method
CN107562106B (en) * 2017-09-05 2019-01-22 华大半导体有限公司 A kind of super low-power consumption High-reliability power source management design and implementation method
TWI763024B (en) * 2020-09-04 2022-05-01 瑞昱半導體股份有限公司 Voltage modulation circuit and method thereof

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Address after: Room 101, Floor 1-5, Building 8, Yard 9, Fenghao East Road, Haidian District, Beijing 100094

Patentee after: Zhaoyi Innovation Technology Group Co.,Ltd.

Address before: 100083 12 Floors, Block A, Tiangong Building, Science and Technology University, 30 College Road, Haidian District, Beijing

Patentee before: GIGADEVICE SEMICONDUCTOR(BEIJING) Inc.

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