CN105428221A - Method for improving photoresist dropping - Google Patents

Method for improving photoresist dropping Download PDF

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Publication number
CN105428221A
CN105428221A CN201510977448.3A CN201510977448A CN105428221A CN 105428221 A CN105428221 A CN 105428221A CN 201510977448 A CN201510977448 A CN 201510977448A CN 105428221 A CN105428221 A CN 105428221A
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photoresist
nano
cesium chloride
column array
nano column
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CN201510977448.3A
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CN105428221B (en
Inventor
刘静
伊福廷
张天冲
王波
张新帅
孙钢杰
王雨婷
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Institute of High Energy Physics of CAS
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Institute of High Energy Physics of CAS
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34

Abstract

The invention discloses a method for improving photoresist dropping. According to the method, nanometer arrays with appropriate sizes and heights are prepared on the surface of a substrate by a self-assembly technique of a caesium chloride nanometer island, spinning photoresist on the nanometer arrays and then allowing the nanometer arrays to stand for 20 minutes so that the photoresist is fully embedded among the nanometer arrays. By the method, the adhesive force of the photoresist and the substrate can be effectively increased, and the method is suitably used for preparing a photoresist pattern with relatively thick thickness and relatively small size, and particularly for an isolated photoresist pattern.

Description

A kind of method improved photoresist and come off
Technical field
The present invention relates to semiconductor micro-nano process technology, be applicable to a kind of method improved photoresist and come off, be particularly useful for making the isolated photoresist structure that area is little, thickness is large.
Background technology
Coming off of photoresist is the problem that micro-nano technology field often runs into, and also do not have effective ways can fundamentally solve this difficult problem at present, it is main because the adhesion of photoresist and substrate surface is limited, when prepared graphics area diminishes, highly become large, namely depth-width ratio exceedes to a certain degree, and isolated photoresist is difficult to be attached to substrate surface, will find the phenomenon come off.The adhesion increasing substrate and photoresist is the main path improving photoresist obscission.Conventional method has, and improves the clean-up performance of substrate surface, makes adhesive with photoresist, substrate prepares adhesion layer, and appropriateness increases the degree of roughness etc. of substrate.
Summary of the invention
(1) technical problem that will solve
In view of this, main purpose of the present invention is to provide a kind of method improved photoresist and come off, and to increase the adhesion of substrate and photoresist, to come off problem to improve photoresist.
(2) technical scheme
For achieving the above object, the invention provides a kind of method improved photoresist and come off, first the method adopts cesium chloride nano island self-assembling technique to prepare the nano column array of certain size and height at substrate surface, then there is on surface the substrate spin coating photoresist of nano column array, and horizontal rest a period of time, photoresist is fully embedded between nano-array.
In such scheme, the nano column array of described certain size and height, its diameter is 50-1500 nanometer, is highly 0.2-3 micron.
In such scheme, the size of described nano column array selects according to the concrete pattern of prepared photoetching offset plate figure, and for the grating of the slim-lined construction of width below 1 micron, the size of nano-array will control between 50-200 nanometer; For the isolated photoetching offset plate figure that area is less, ensure that this photoetching offset plate figure is no less than 50 nano column arrays under covering.
In such scheme, the height of described nano column array selects according to the concrete thickness of prepared photoetching offset plate figure, if photoresist thickness to be prepared is greater than 20 microns, the height of nano column array should be greater than 2 microns; If photoresist thickness to be prepared is 10 microns, the height of nano column array is 1 micron.
In such scheme, described horizontal rest a period of time is horizontal rest 20 minutes.
In such scheme, described substrate adopts silicon chip, and the described nano column array preparing certain size and height at substrate surface employing cesium chloride nano island self-assembling technique, comprising: put into vacuum coating cavity after the Wafer Cleaning of polishing is clean, evaporation cesium chloride film, thickness 100-7000 dust; After cesium chloride film has plated, in vacuum coating cavity, pass into the gas that humidity is 10%-70%, development cesium chloride film, cesium chloride is reunited under the effect of humidity gas, forms the cesium chloride nano island structure of similar water droplet one by one at silicon chip surface; With cesium chloride nano island structure for mask, utilize plasma etching technology etching silicon wafer, thus cesium chloride nano island structure is transferred on silicon chip surface; Silicon chip surface with cesium chloride nano island structure puts into water 2 minutes, is dissolved by cesium chloride, thus to produce diameter be 50-1500 nanometer, is highly the nano column array of 0.2-3 micron.
In such scheme, described with cesium chloride nano island structure for mask, utilizing in the step of plasma etching technology etching silicon wafer, is utilize SF 6and C 4f 8for etching gas, He is refrigerating gas; Operating pressure 4Pa, exciting power 400 watts, substrate bias power is 30 watts, etch period 1-10 minute.
In such scheme, described there is on surface the substrate spin coating photoresist of nano column array before, also comprise: the silicon chip surface that effects on surface has nano column array cleans, to increase the adhesion of photoresist and silicon chip, concrete cleaning course is that silicon chip surface with nano column array puts into reactive ion etching machine, pass into oxygen, the oxonium ion after being ionized can take away the organic substance of silicon chip surface attachment.
(3) beneficial effect
This method improved photoresist and come off provided by the invention, it is the nano column array preparing suitable dimension and height at substrate surface cesium chloride nano island self-assembling technique, horizontal rest 20 minutes after spin coating photoresist, allows photoresist fully embed between nano column array.This method effectively can increase the adhesion of photoresist and substrate, is applicable to prepare the photoetching offset plate figure that thickness is higher, size is less, particularly isolated photoetching offset plate figure.Such as, the triangle being 10 microns for the length of side isolates photoetching offset plate figure, on polished silicon slice surface, when thickness is more than 5 microns, just there will be obvious photoresist obscission, the nano column array prepared according to cesium chloride nano island self-assembling technique is as substrate, and photoresist thickness can reach 15 microns even higher.
Accompanying drawing explanation
Fig. 1 is the method flow diagram improving photoresist and come off provided by the invention.
Fig. 2 is the schematic diagram at the silicon chip surface evaporation cesium chloride film cleaned up according to the embodiment of the present invention.
Fig. 3 is the schematic diagram forming cesium chloride nano island structure according to the cesium chloride of the embodiment of the present invention at silicon chip surface.
Fig. 4 is schematic diagram cesium chloride nano island structure transferred on silicon chip surface according to the embodiment of the present invention.
Fig. 5 is the schematic diagram according to obtaining nano column array after being dissolved by cesium chloride of the embodiment of the present invention.
Fig. 6 is the schematic diagram at silicon chip surface spin coating photoresist according to the embodiment of the present invention.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly understand, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
As shown in Figure 1, Fig. 1 is the method flow diagram improving photoresist and come off provided by the invention.The method comprises the following steps:
Step 1: adopt cesium chloride nano island self-assembling technique to prepare the nano column array of certain size and height at substrate surface;
Step 2: the substrate spin coating photoresist on surface with nano column array, and horizontal rest a period of time, make photoresist fully embed between nano-array.
In step 1, the nano column array of certain size and height, its diameter is 50-1500 nanometer, is highly 0.2-3 micron.The size of nano column array selects according to the concrete pattern of prepared photoetching offset plate figure, and for the grating of the slim-lined construction of width below 1 micron, the size of nano-array will control between 50-200 nanometer; For the isolated photoetching offset plate figure that area is less, ensure that this photoetching offset plate figure is no less than 50 nano column arrays under covering.The height of nano column array selects according to the concrete thickness of prepared photoetching offset plate figure, if photoresist thickness to be prepared is greater than 20 microns, the height of nano column array should be greater than 2 microns; If photoresist thickness to be prepared is 10 microns, the height of nano column array is 1 micron.
In step 2, horizontal rest a period of time is generally horizontal rest 20 minutes, allows photoresist fully embed between nano column array.
Improving in the method that photoresist comes off provided by the invention, the size of nano column array and Altitude control being needed to be grasped: 1, by selecting the size of suitable nano-array, under ensureing photoetching offset plate figure, have abundant nano column array.For this elongated structure of the grating of width below 1 micron, the size of nano-array is as far as possible little, control between 50-200 nanometer, if nano-array yardstick is too large, the nanostructure number embedded by photoresist can be very few, affects adhesion.For the isolation pattern that area is less, ensure that figure is no less than 50 nano column arrays under covering.2, the height that nano-array is suitable is ensured.If photoresist thickness to be prepared is greater than 20 microns, the height of nano column array also should increase (being greater than 2 microns) as far as possible, because photoresist thickness is higher, more easily comes unstuck, if the nano column array selected is excessively shallow, be then not enough to overcome the problem that photoresist comes off.If photoresist thickness to be prepared is 10 microns, the height of nano column array is 1 micron of problem that can overcome photoresist and come off.
Improve in the method that photoresist comes off provided by the invention, being suitable as substrat structure main cause with nano column array prepared by cesium chloride self-assembling technique has: the size of 1, prepared nano column array, highly suitable.The size diameter of the nano column array prepared with cesium chloride self-assembling technique is 50-1500 nanometer, and this size is applicable to the thin narrow figures such as grating, the isolated and preparation of the photoetching offset plate figure that area is less.The height of the nano column array prepared with cesium chloride self-assembling technique is 0.2-3 micron, and this highly can regulate according to the thickness of required photoresist, effectively can improve the problem that comes off of less than 20 microns tiny photoetching offset plate figures.2, because cesium chloride nano island structure is obtained by self assembly, the cesium chloride island diameter grown is not identical, diameter dimension roughly meets Gaussian Profile, prepared nano column array position is random distribution, and this position, diameter random distribution are more unified than size, the neat nano column array that distributes more is conducive to the problem that comes off improving photoresist.3, be approximately 25%-30% by nano column array duty ratio prepared by cesium chloride self-assembling technique, this duty ratio is more conducive to the embedding of photoresist, prevents photoresist from coming off.4, the nano column array prepared of cesium chloride self-assembling technique, only cesium chloride is introduced at silicon chip surface in whole preparation process, and just can remove completely with deionized water, relative to the preparation method of other nano column arrays, of reduced contamination to sample surfaces of this method, is conducive to the adhesion of photoresist and substrate.
In an embodiment of the present invention, substrate generally adopts silicon chip, then cesium chloride nano island self-assembling technique is adopted to prepare the nano column array of certain size and height at substrate surface, comprise: after the Wafer Cleaning of polishing is clean, put into vacuum coating cavity, evaporation cesium chloride film, thickness 100-7000 dust; After cesium chloride film has plated, in vacuum coating cavity, pass into the gas that humidity is 10%-70%, development cesium chloride film, cesium chloride is reunited under the effect of humidity gas, forms the cesium chloride nano island structure of similar water droplet one by one at silicon chip surface; With cesium chloride nano island structure for mask, utilize plasma etching technology etching silicon wafer, thus cesium chloride nano island structure is transferred on silicon chip surface; Silicon chip surface with cesium chloride nano island structure puts into water 2 minutes, is dissolved by cesium chloride, thus to produce diameter be 50-1500 nanometer, is highly the nano column array of 0.2-3 micron.
Wherein, with cesium chloride nano island structure for mask, utilizing in the step of plasma etching technology etching silicon wafer, is utilize SF 6and C 4f 8for etching gas, He is refrigerating gas; Operating pressure 4Pa, exciting power 400 watts, substrate bias power is 30 watts, etch period 1-10 minute.
Before there is on surface the substrate spin coating photoresist of nano column array, also comprise: the silicon chip surface that effects on surface has nano column array cleans, to increase the adhesion of photoresist and silicon chip, concrete cleaning course is that silicon chip surface with nano column array puts into reactive ion etching machine, pass into oxygen, the oxonium ion after being ionized can take away the organic substance of silicon chip surface attachment.
The invention provides this method improved photoresist and come off, key is that the nano column array of a kind of applicable prepared photoetching offset plate figure of preparation is as substrate, horizontal rest is needed 20 minutes after this substrate surface spin coating photoresist, photoresist is allowed fully to embed between nano-array, to increase the adhesive force of photoresist and substrate, improve coming off of photoresist.This improve concrete grammar that photoresist comes off be the Wafer Cleaning of polishing is clean after put into vacuum coating cavity, evaporation cesium chloride film, thickness 100-7000 dust, as shown in Figure 2.After cesium chloride film has plated, in cavity, pass into the gas of certain humidity, relative humidity is 10%-70%, development cesium chloride film, cesium chloride is reunited under the effect of humidity gas, forms the nanometer cesium chloride peninsular structure of similar water droplet one by one as shown in Figure 3 at silicon chip surface.Because cesium chloride nano island structure is obtained by self assembly, the cesium chloride island diameter grown is not identical, and have wider diameter size distribution, diameter dimension roughly meets Gaussian Profile.With the cesium chloride island structure of reuniting for mask, utilize plasma etching technology etch silicon, thus transfer on silicon face by cesium chloride structure, etching transfer organization result as shown in Figure 4.Plasma etch process is fallen by silicon etching by F ion and pasc reaction; can not react with cesium chloride simultaneously; silicon under cesium chloride structure is protected, and the part silicon not having cesium chloride structure to cover will be etched away certain thickness, realize the Graphic transitions of cesium chloride structure.Plasma etching utilizes SF 6and C 4f 8for etching gas, He is refrigerating gas.Operating pressure 4Pa, exciting power 400 watts, substrate bias power is 30 watts, etch period 1-10 minute, and etching result as shown in Figure 4.After silicon face has etched, sample puts into water 2 minutes, cesium chloride can be dissolved, thus to produce diameter be 50-1500 nanometer, and be highly the nano-pillar structure of 0.2-3 micron, its structure as shown in Figure 5.Before spin coating photoresist, need to clean sample surfaces, to increase the adhesion of photoresist and substrate, sample is put into reactive ion etching machine, pass into oxygen, the oxonium ion after being ionized can take away the organic substance of silicon chip surface.At the photoresist of silicon chip surface spin coating desired thickness, horizontal rest 20 minutes, makes photoresist liquid fully embed in the gap of nano column array, to increase the adhesion of photoresist and substrate, improves the problem that comes off of photoresist, as shown in Figure 6.Now, the photoetching links such as drying glue, exposure, development can be completed by photoetching process.
The specific implementation technique of above-described embodiment is as follows:
Step 1: form cesium chloride film with thermal evaporation method on polished silicon slice, film thickness 200 nanometer.
Step 2: the silicon chip with cesium chloride film is put into the ventilation cavity that humidity is 40%, humidity is by the wet gas flow control passing into cavity, develop 30 minutes under this damp condition, make cesium chloride film be agglomerated into nano island structure, form cesium chloride nano island structure at silicon chip surface.Cesium chloride nano island average diameter 400 nanometer.
Step 3: had on surface the silicon chip of cesium chloride island structure to put into the etching cavity of plasma etching machine, etch process parameters is pressure 4 handkerchief, etching gas SF 6: C 4f 8: He=60: 160: 10sccm, exciting power 400 watts, substrate bias power is 30 watts, etch period 5 minutes.
Step 4: put into water by after silicon chip extracting, 2 minutes time, makes the cesium chloride island structure on silicon chip dissolve, thus obtains average diameter about 400 nanometer on surface, the silicon chip of height 1.5 micron/nano post arrays.
Step 5: have on surface the silicon chip of nano column array to put into reactive ion etching machine cavity and etch, O 220sccm, exciting power 60 watts, pressure 5 handkerchief, etch period 5 minutes.
Step 6: at silicon chip surface spin coating PMMA6510, spin coating 3000 turns 60 seconds, thickness is 15 microns, horizontal rest 20 minutes, and hot plate is heated 90 degrees Celsius and kept 40 minutes.
Step 7: will scribble the silicon chip of 6510 photoresists, with the grenz ray mask of isolation pattern with minimum dimension being 10 microns, exposes 50 minutes under grenz ray.
Step 8: the silicon chip of the light that exposed to the sun is put into 6510 photoresist developing liquid, after 10 minutes, soaks 10 minutes with clear water, and can obtain minimum dimension at substrate surface is 10 microns, and thickness is the photoetching offset plate figure of the absolute construction of 15 microns.
Above-described specific embodiment; object of the present invention, technical scheme and beneficial effect are further described; be understood that; the foregoing is only specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any amendment made, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (8)

1. the method improved photoresist and come off, it is characterized in that, first the method adopts cesium chloride nano island self-assembling technique to prepare the nano column array of certain size and height at substrate surface, then there is on surface the substrate spin coating photoresist of nano column array, and horizontal rest a period of time, photoresist is fully embedded between nano-array.
2. the method improved photoresist and come off according to claim 1, is characterized in that, the nano column array of described certain size and height, its diameter is 50-1500 nanometer, is highly 0.2-3 micron.
3. the method improved photoresist and come off according to claim 2, it is characterized in that, the size of described nano column array selects according to the concrete pattern of prepared photoetching offset plate figure, for the grating of the slim-lined construction of width below 1 micron, the size of nano-array will control between 50-200 nanometer; For the isolated photoetching offset plate figure that area is less, ensure that this photoetching offset plate figure is no less than 50 nano column arrays under covering.
4. the method improved photoresist and come off according to claim 2, it is characterized in that, the height of described nano column array selects according to the concrete thickness of prepared photoetching offset plate figure, if photoresist thickness to be prepared is greater than 20 microns, the height of nano column array should be greater than 2 microns; If photoresist thickness to be prepared is 10 microns, the height of nano column array is 1 micron.
5. the method improved photoresist and come off according to claim 1, is characterized in that, described horizontal rest a period of time, is horizontal rest 20 minutes.
6. the method improved photoresist and come off according to claim 1, is characterized in that, described substrate adopts silicon chip, and the described nano column array preparing certain size and height at substrate surface employing cesium chloride nano island self-assembling technique, comprising:
Vacuum coating cavity is put into, evaporation cesium chloride film, thickness 100-7000 dust after the Wafer Cleaning of polishing is clean;
After cesium chloride film has plated, in vacuum coating cavity, pass into the gas that humidity is 10%-70%, development cesium chloride film, cesium chloride is reunited under the effect of humidity gas, forms the cesium chloride nano island structure of similar water droplet one by one at silicon chip surface;
With cesium chloride nano island structure for mask, utilize plasma etching technology etching silicon wafer, thus cesium chloride nano island structure is transferred on silicon chip surface;
Silicon chip surface with cesium chloride nano island structure puts into water 2 minutes, is dissolved by cesium chloride, thus to produce diameter be 50-1500 nanometer, is highly the nano column array of 0.2-3 micron.
7. the method improved photoresist and come off according to claim 6, is characterized in that, described with cesium chloride nano island structure for mask, utilizing in the step of plasma etching technology etching silicon wafer, is utilize SF 6and C 4f 8for etching gas, He is refrigerating gas; Operating pressure 4Pa, exciting power 400 watts, substrate bias power is 30 watts, etch period 1-10 minute.
8. the method improved photoresist and come off according to claim 6, is characterized in that, described there is on surface the substrate spin coating photoresist of nano column array before, also comprise:
The silicon chip surface that effects on surface has nano column array cleans, to increase the adhesion of photoresist and silicon chip, concrete cleaning course is that silicon chip surface with nano column array puts into reactive ion etching machine, pass into oxygen, the oxonium ion after being ionized can take away the organic substance of silicon chip surface attachment.
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Citations (4)

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Publication number Priority date Publication date Assignee Title
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CN103400750A (en) * 2013-08-19 2013-11-20 中国科学院高能物理研究所 Method for coating photoresist on surface of silicon substrate

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7033936B1 (en) * 1999-08-17 2006-04-25 Imperial Innovations Limited Process for making island arrays
US20100294659A1 (en) * 2008-01-22 2010-11-25 Electrical & Electronic Engineering Bldg. Level 12 Label-free molecule detection and measurement
CN103390657A (en) * 2013-07-22 2013-11-13 中国科学院高能物理研究所 Selective grid of silicon nanometer column array photocell and preparation method of selective grid
CN103400750A (en) * 2013-08-19 2013-11-20 中国科学院高能物理研究所 Method for coating photoresist on surface of silicon substrate

Non-Patent Citations (3)

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Title
JING LIU ET AL: "Fabrication and reflection properties of silicon nanopillars by cesium chloride self-assembly and dry etching", 《APPLIED SURFACE SCIENCE》 *
MINOR GREEN AND FENG MING LIU: "SERS substrates fabricated by island lithography:the silver/pyridine system", 《J.PHYS.CHEM.B》 *
SHIN TSUCHIYA ET AL: "Structural fabrication using cesium chloride island arrays as a resist in a fluorocarbon reactive ion etching plasma", 《ELECTROCHEMICAL AND SOLID-STATE LETTERS》 *

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