CN105700604A

CN105700604A - A low voltage source coupled exclusive OR logic circuit structure

Info

Publication number: CN105700604A
Application number: CN201410701629.9A
Authority: CN
Inventors: 刘辉
Original assignee: CHENGDU CORPRO TECHNOLOGY Co Ltd
Current assignee: CHENGDU CORPRO TECHNOLOGY Co Ltd
Priority date: 2014-11-28
Filing date: 2014-11-28
Publication date: 2016-06-22
Anticipated expiration: 2034-11-28
Also published as: CN105700604B

Abstract

The invention provides a low voltage source coupled exclusive OR logic circuit structure comprising two differential pairs of NMOS input, which are a differential pair A and a differential pair B, a differential pair C of PMOS input, and a bias current source N1, a bias current source N2 and a bias current source P3 which provide bias current for the differential pair A, the differential pair B, and differential pair C respectively. A path of differential complementary input signals AP, AN is connected with complementary input ends of the differential pair A and the differential pair B; inverted complementary input ends of the differential pair A and the differential pair B are connected and same-phase complementary output ends of the differential pair A and the differential pair B are connected; another path of differential complementary input signals BP, BN is connected with a complementary input end of the differential pair C; a complementary output end of the differential pair C is connected with the bias current input ends of the differential pair A and the differential pair B. By using a folding method, the number of vertically superimposed layers of a traditional circuit is reduced and the problem that the requirement for low voltage cannot be met along with the reduction of technological line width and reduction of required power voltage.

Description

A kind of low pressure source coupling XOR circuit structure

Technical field

The present invention relates to XOR circuit, particularly a kind of low pressure source coupling XOR circuit structure。

Background technology

The circuit structure of conventional source coupling XOR includes: the differential pair of two pairs of NMOS inputs, the differential pair of PMOS input of a pair lamination, load and bias current sources。The laminated circuit structure that it adopts, it is desirable to supply voltage is guarantee normal circuit operation when certain value。But along with the raising of modern technology, technique live width is more and more less, result in required supply voltage more and more less, traditional XOR circuit structure cannot meet more low voltage operating requirement。

Summary of the invention

It is an object of the invention to overcome the deficiencies in the prior art, a kind of low pressure source coupling XOR circuit structure is provided, adopt folding method, reduce the conventional source coupling XOR circuit superposition number of plies in vertical direction, thus reducing required supply voltage, making in situation at low pressure, it better can work than conventional source coupling XOR circuit。

It is an object of the invention to be achieved through the following technical solutions: it includes the differential pair C of the differential pair A and differential pair B of two NMOS inputs, a PMOS input, and provides the bias current sources N1 of bias current, bias current sources N2 and bias current sources P3 respectively to differential pair A, differential pair B and differential pair C；One road differential complement input signal AP, AN is connected with the complementary input end of differential pair A and differential pair B respectively, the reverse complement input interconnection of differential pair A and differential pair B, the homophase complementary output end interconnection of differential pair A and differential pair B；Differential complement input signal BP, BN are connected with the complementary input end of differential pair C on another road, and the complementary output end of differential pair C is connected with the bias current inputs of differential pair A and differential pair B respectively。

Described bias current sources N1 and bias current sources N2 is mainly made up of NMOS tube。

Described bias current sources P3 is mainly made up of PMOS。

When AP and BP is identical, OUTP is output as ' 0 '；When AP and BP is different, OUTP is output as ' 1 '；When AN and BN is identical, OUTN is output as ' 0 '；When AN and BN is different, OUTN is output as ' 1 '。

The invention has the beneficial effects as follows: reduce the conventional source coupling XOR circuit superposition number of plies in vertical direction, thus reducing required supply voltage；Solve the problem that the more and more less supply voltage caused of technique live width is increasingly lower, can also normal operation in situation at low pressure。

Accompanying drawing explanation

Fig. 1 is present configuration schematic diagram；

Fig. 2 is circuit structure diagram of the present invention；

Fig. 3 is conventional source coupling XOR circuit structure chart。

Detailed description of the invention

Below in conjunction with accompanying drawing, technical scheme is described in further detail, but protection scope of the present invention is not limited to the following stated。

Such as Fig. 1, shown in Fig. 2, a kind of low pressure source coupling XOR circuit structure, it includes: the differential pair A of two pairs of NMOS tube inputs, B, the differential pair C of a pair PMOS input, load and respectively to differential pair A, differential pair B and differential pair C provides the bias current sources N1 of bias current, bias current sources N2 and bias current sources P3, the differential pair A of described NMOS tube input includes the 4th NMOS tube N4, 5th NMOS tube N5, differential pair B includes the 6th NMOS tube N6 and the seven NMOS tube N7, the differential pair of PMOS input includes the first PMOS P1 and the second PMOS P2, described load includes two resistance R1 and resistance R2；The source ground of described bias current sources N1 and N2；Described 4th NMOS tube N4, the 5th NMOS tube N5 and the second PMOS P2 source electrode connect, and connect with the drain electrode of bias current sources N1, described 6th NMOS tube N6, the 7th NMOS tube N7 and the first PMOS P1 source electrode connect, and connect with the drain electrode of bias current sources N2；Described 4th NMOS tube N4, the 6th NMOS tube N6 drain electrode connect as differential signal outputs OUTP, and connect with one end of load resistance R1, described 5th NMOS tube N5, the 7th NMOS tube N7 drain electrode connect as differential signal outputs OUTN, and be connected with one end of load resistance R2, the grid of described 5th NMOS tube N5 and the grid of the 6th NMOS tube N6 connect, described first PMOS P1 and the drain electrode of the second PMOS P2 connect with the source electrode of bias current sources P3, and the drain electrode of bias current sources P3 connects with the other end of load R1, R2 respectively。

4th NMOS tube N4, the 7th NMOS tube N7 grid input signal AN and the five NMOS tube N5, the 6th NMOS tube N6 grid input signal AP be differential complement input signal；The input signal BP of the first PMOS P1 grid and the input signal BN of the second PMOS P2 grid is differential complement input signal；Output signal OUTP and output signal OUTN is differential complement output signal。

As in figure 2 it is shown, when BP is ' 1 ', then BN is ' 0 ' naturally, then now, the first PMOS P1 that BP connects just turns off, and the second PMOS P2 that BN connects turns on。So, the drain voltage of the conducting meeting lifting first NMOS tube N1 of P2, allow the 4th NMOS tube N4, the 5th NMOS tube N5 not turn on, also state is off with regard to N4, N5。P1 turns off the drain voltage without influence on the sub-N2 of NMOS tube。Now, if AP is ' 0 ', then N6 turns off, and R1 does not have electric current flow through, and natural OUTP point is just ' 1 '；And AP is ' 0 ', then meaning AN is ' 1 ', and this time, R2 had electric current to pass through, and then the voltage of OUTN is not VDD, so being ' 0 '。Thus obtaining result, when BP is ' 1 ', when AP is ' 0 ', cause OUTP ' 1 ', it is achieved that the function of XOR。

When BP is ' 1 ', then BN is ' 0 ' naturally；Now as AP for ' 1 ' then the 6th NMOS tube N6 turn on, this time, R1 had electric current to pass through, and then the voltage of OUTP is not VDD, for ' 0 '。

Other situations can be drawn by similar reasoning, therefore obtains this conclusion: when AP and BP is identical, OUTP is output as ' 0 '；When AP and BP is different, OUTP is output as ' 1 '；When AN and BN is identical, OUTN is output as ' 0 '；When AN and BN is different, OUTN is output as ' 1 '。

As it is shown on figure 3, the circuit structure of conventional source coupling XOR includes: the differential pair of two pairs of NMOS inputs, the differential pair that the PMOS of a pair lamination inputs, load and bias current sources。Compare conventional source coupling XOR circuit structure, the present invention adopts folding method, reduces the conventional source coupling XOR circuit superposition number of plies in vertical direction, thus reducing required supply voltage, making in situation at low pressure, it better can work than conventional source coupling XOR circuit。

Claims

1. a low pressure source coupling XOR circuit structure, it is characterized in that: it includes the differential pair C of the differential pair A and differential pair B of two pairs of NMOS inputs, a pair PMOS input, and provides the bias current sources N1 of bias current, bias current sources N2 and bias current sources P3 respectively to differential pair A, differential pair B and differential pair C；The reverse complement input interconnection of differential pair A and differential pair B, the homophase complementary output end interconnection of differential pair A and differential pair B；One road differential complement input signal AP, AN is connected with the complementary input end of differential pair A and differential pair B respectively, differential complement input signal BP, BN are connected with the complementary input end of differential pair C on another road, and the complementary output end of differential pair C is connected with the bias current inputs of differential pair A and differential pair B respectively。

2. a low pressure source coupling XOR circuit structure, it is characterised in that: described bias current sources N1 and bias current sources N2 is mainly made up of NMOS tube。

3. a low pressure source coupling XOR circuit structure, it is characterised in that: described bias current sources P3 is mainly made up of PMOS。