CN105869827A - Device unit body containing metal, polyimide and blocking layer structure and fabrication method of device unit body - Google Patents
Device unit body containing metal, polyimide and blocking layer structure and fabrication method of device unit body Download PDFInfo
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- CN105869827A CN105869827A CN201610236012.3A CN201610236012A CN105869827A CN 105869827 A CN105869827 A CN 105869827A CN 201610236012 A CN201610236012 A CN 201610236012A CN 105869827 A CN105869827 A CN 105869827A
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- layer
- metal
- polyimides
- silicon nitride
- cell body
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- 229910052751 metal Inorganic materials 0.000 title claims abstract description 84
- 239000002184 metal Substances 0.000 title claims abstract description 84
- 239000004642 Polyimide Substances 0.000 title claims abstract description 56
- 229920001721 polyimide Polymers 0.000 title claims abstract description 56
- 238000000034 method Methods 0.000 title claims abstract description 7
- 230000000903 blocking effect Effects 0.000 title abstract 3
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 70
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 42
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 41
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 39
- 229910052802 copper Inorganic materials 0.000 claims abstract description 39
- 239000010949 copper Substances 0.000 claims abstract description 39
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 35
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 35
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 210000005056 cell body Anatomy 0.000 claims description 32
- 230000004888 barrier function Effects 0.000 claims description 21
- 238000002360 preparation method Methods 0.000 claims description 18
- 238000005530 etching Methods 0.000 claims description 9
- 230000008569 process Effects 0.000 claims description 5
- 238000007711 solidification Methods 0.000 claims description 5
- 230000008023 solidification Effects 0.000 claims description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 238000011161 development Methods 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- AHKZTVQIVOEVFO-UHFFFAOYSA-N oxide(2-) Chemical compound [O-2] AHKZTVQIVOEVFO-UHFFFAOYSA-N 0.000 claims 7
- -1 blocked by reticle Chemical compound 0.000 claims 1
- 230000006698 induction Effects 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 230000006872 improvement Effects 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005674 electromagnetic induction Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/2804—Printed windings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
- H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
- H01F41/041—Printed circuit coils
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/10—Inductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
- H01F2017/0073—Printed inductances with a special conductive pattern, e.g. flat spiral
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
- H01F2017/0086—Printed inductances on semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/2804—Printed windings
- H01F2027/2809—Printed windings on stacked layers
Abstract
The invention provides a device unit body containing metal, polyimide and a blocking layer structure and a fabrication method of the device unit body. The device unit body comprises a substrate, an insulation oxide layer, a first metal layer, a first silicon dioxide layer, a first silicon nitride layer, polyimide, a second metal layer, a second silicon dioxide layer and a second silicon nitride layer and is characterized in that the first metal layer and the polyimide are sequentially separated by the first silicon dioxide layer and the first silicon nitride layer, and the second metal layer and the polyimide are sequentially separated by the second silicon dioxide layer and the second silicon nitride layer. The device unit body is applied to an on-chip spiral transformer, copper is taken as an induction coil, and the polyimide is taken as an intercoil medium; and with the adoption of the blocking layer structure between the metal copper and the polyimide, the copper can be effectively prevented from being diffused to the polyimide, the pressure resistance of the device is improved, and the performance of the device is improved.
Description
Technical field
The present invention relates to a kind of device cell body and preparation method, the device cell body of a kind of metallic copper, polyimides and barrier layer structure and preparation method, be mainly used on on-chip spiral transformer.
Background technology
Along with market is increasing to the demand of radio communication, RF identification, mobile TV and other electronic equipment for consumption and system, the miniaturization of electronic equipment, high-performance, low cost, low-power consumption are required more and more higher, therefore SOC(system on a chip) (SOC, System On a Chip) excites the great interest of people.But, from the point of view of being operated in radio frequency and the microwave circuit system of upper frequency, being designed to for one of bottleneck of high-performance passive device.
On-chip spiral transformer is made up of two or more on-chip spiral inductors, and its basic function is to be coupled in secondary coil by electromagnetic induction by the alternating current in primary coil and will not introduce the biggest power attenuation.While energy transmits, the impedance of primary coil and secondary coil also can change, i.e. the voltage and current ratio of coil different port changes.
Due to the resistance to electromigration of the height of copper and low-resistivity, transformer coil uses thin copper film to substitute aluminium wiring becomes inexorable trend, and polyimides has the characteristics such as coating flat, isolation effect are good because of it so that it is can reduce electric capacity between wire coil as medium；Owing to transformer work produces high heat, copper is caused to be easy to spread when contacting polyimides, the diffusion of copper will reduce the isolation effect of polyimides, lower coil is made to produce electric current when high-voltage signal, finally it is easily caused device to burn, device electric breakdown strength so can be caused to decline, affect device performance.
Summary of the invention
It is an object of the invention to overcome the shortcoming of prior art, a kind of device cell body including metal, polyimides and barrier layer structure and preparation method are provided, this kind of novel structure, preparation method are simple, can effectively prevent copper from spreading in polyimides, improve device electric breakdown strength, it is ensured that device performance.
nullFor realizing above technical purpose，The technical solution used in the present invention is: one includes metal、The device cell body of polyimides and barrier layer structure，Described device cell body includes substrate、Insulating oxide、The first metal layer、First silicon dioxide layer、First silicon nitride layer、Polyimides、Second metal level、Second silicon dioxide layer and the second silicon nitride layer，It is characterized in that: described insulating oxide is positioned on substrate and adjacent，Described the first metal layer has two，Lay respectively at device cell body two ends and cover on insulating oxide，Described first silicon dioxide layer and the first silicon dioxide layer are sequentially coated on insulating oxide and part the first metal layer surface，Described polyimides covers in silicon nitride surface and separates from device cell body both sides，Described second silicon dioxide layer and the second silicon nitride layer are sequentially coated on polyimide surface，Described second metal level has two，Lay respectively at device cell body two ends，Second metal level of described left end covers on the second silicon nitride layer，The first metal layer of described right-hand member is provided with metal contact hole，Second metal level of described right-hand member is filled in metal contact hole.
As improvement, the thickness of described insulating oxide is between 100nm ~ 1000nm.
As improvement, described the first metal layer and the second metal level are copper, and thickness is 2 ~ 4 μm.
As improvement, the thickness of described first silicon dioxide layer and the second silicon dioxide layer is 40nm ± 4nm.
As improvement, the thickness of described first silicon nitride layer and the second silicon nitride layer is 150 nm ± 4nm
The preparation method of a kind of device cell body including metal, polyimides and barrier layer structure, is characterized in that, described device cell body preparation method comprises the steps:
Step one. a silicon substrate is provided, grows oxide layer over the substrate, obtain insulating oxide；
Step 2. at the superficial growth copper film of described insulating oxide, blocked by reticle, copper film performs etching and obtains the first metal layer；
Step 3. the first silicon dioxide layer and the first silicon nitride layer is deposited successively on the surface of described the first metal layer；
Step 4. spin-on polyimide liquid on described first silicon nitride layer, through overcuring and photoetching, development figure obtains polyimides；
Step 5. the second silicon dioxide layer and the second silicon nitride layer is deposited successively on the surface of described polyimides；
Step 6. blocked by reticle, on the first metal layer of right-hand member, perform etching formation metal contact hole；
Step 7. with the second silicon nitride layer superficial growth copper film in described metal contact hole, blocked by reticle, copper film performs etching and obtains the second metal level.
Further, the forming process of described copper film is that first sputtering forms copper crystalline substance, then along sub brilliant direction by galavanic growth copper film, ultimately forms copper film.
Further, the solidification temperature during described polyimide curing is 400 ± 40 degree.
As can be seen from the above description, the beneficial effects of the present invention is: the defect existed for prior art, the present invention uses the barrier layer structure between metallic copper and polyimides, copper is prevented to be diffused in polyimides, through repeated multiple times experiment, find that increasing barrier layer structure can be obviously improved the problem that under high voltage, device is breakdown, improves the pressure of device, improves device performance.
Accompanying drawing explanation
Fig. 1 is the cross-sectional view of the present invention.
Fig. 2 is the structural representation forming the first metal layer in preparation method of the present invention.
Fig. 3 is the structural representation forming ground floor barrier layer in preparation method of the present invention.
Fig. 4 is the structural representation forming polyimides in preparation method of the present invention.
Fig. 5 is the structural representation forming second layer barrier layer in preparation method of the present invention.
Fig. 6 is the structural representation forming metal contact hole in preparation method of the present invention.
Accompanying drawing illustrates: 1-substrate, 2-insulating oxide, 3-the first metal layer, 4-the first silicon dioxide layer, 5-the first silicon nitride layer district, 6-polyimides, 7-the second metal level, 8-the second silicon dioxide layer, 9-the second silicon nitride layer.
Detailed description of the invention
Below in conjunction with concrete drawings and Examples, the invention will be further described.
nullWith reference to the accompanying drawings shown in 1，One proposed by the invention includes metal、The device cell body of polyimides and barrier layer structure，Described device cell body includes substrate 1、Insulating oxide 2、The first metal layer 3、First silicon dioxide layer 4、First silicon nitride layer 5、Polyimides 6、Second metal level 7、Second silicon dioxide layer 8 and the second silicon nitride layer 9，It is characterized in that: described insulating oxide 2 is positioned on substrate 1 and adjacent，Described the first metal layer 3 has two，Lay respectively at device cell body two ends and cover on insulating oxide 2，Described first silicon dioxide layer 4 and the first silicon dioxide layer 5 are sequentially coated on insulating oxide 2 and part the first metal layer 3 surface，Described polyimides 6 covers on silicon nitride 5 surface and separates from device cell body both sides，Described second silicon dioxide layer 8 and the second silicon nitride layer 9 are sequentially coated on polyimides 6 surface，Described second metal level 7 has two，Lay respectively at device cell body two ends，Second metal level 7 of described left end covers on the second silicon nitride layer 9，The first metal layer 3 of described right-hand member is provided with metal contact hole，Second metal level 7 of described right-hand member is filled in metal contact hole，The first metal layer 3 of described right-hand member and the second metal level 7 of right-hand member are interconnective.
The thickness of described insulating oxide 2 is between 100nm ~ 1000nm.Described the first metal layer 3 and the second metal level 7 are copper, and thickness is 2 ~ 4 μm.The thickness of described first silicon dioxide layer 4 and the second silicon dioxide layer 8 is 40nm ± 4nm.The thickness of described first silicon nitride layer 5 and the second silicon nitride layer 9 is 150 nm ± 4nm.
The preparation method of a kind of device cell body including metal, polyimides and barrier layer structure, described device cell body preparation method comprises the steps:
Step one. as shown in Figure 2, it is provided that a silicon substrate 1, described substrate 1 grows oxide layer, obtains insulating oxide 2；
Step 2. as shown in Figure 2, at the superficial growth copper film of described insulating oxide 2, blocked by reticle, copper film performs etching and obtains the first metal layer 3；
Step 3. as shown in Figure 3, deposit the first silicon dioxide layer 4 and the first silicon nitride layer 5 successively on the surface of described the first metal layer 3；
Step 4. as shown in Figure 4, spin-on polyimide liquid on described first silicon nitride layer 5, through overcuring and photoetching, development figure obtains polyimides 6；
Step 5. as shown in Figure 5, deposit the second silicon dioxide layer 8 and the second silicon nitride layer 9 successively on the surface of described polyimides 6；
Step 6. as shown in Figure 6, blocked by reticle, on the first metal layer 3 of right-hand member, perform etching formation metal contact hole；
Step 7. with the second silicon nitride layer 9 superficial growth copper film in described metal contact hole, blocked by reticle, copper film performs etching and obtains the second metal level 7, finally give structure as shown in Figure 1.
The forming process of described copper film is that first sputtering forms copper crystalline substance, then along sub brilliant direction by galavanic growth copper film, ultimately forms copper film.
Solidification temperature in described polyimides 6 solidification process is 400 ± 40 degree.
With reference to the accompanying drawings shown in 1, separated by the first silicon dioxide layer 4 and the first silicon nitride layer 5 successively between the first metal layer 3 and polyimides 6, separated by the second silicon dioxide layer 8 and the second silicon nitride layer 9 successively between second metal level 7 and polyimides 6, and the second metal level 7 of the first metal layer 3 of device cell body right-hand member and right-hand member is interconnective, so when device works, even if generation high heat, this barrier layer structure also can effectively be diffused in polyimides by barrier metal copper, the buffer action of polyimides can be given full play to, device under high voltage is prevented to be burned out, and then it is pressure to improve device, improve device performance.
Being described the present invention and embodiment thereof above, this description does not has restricted, and shown in accompanying drawing is also one of embodiments of the present invention, and actual structure is not limited thereto.If those of ordinary skill in the art is enlightened by it, in the case of without departing from the invention objective, design the frame mode similar to this technical scheme and embodiment without creative, protection scope of the present invention all should be belonged to.
Claims (8)
- null1. one kind includes metal、The device cell body of polyimides and barrier layer structure，Described device cell body includes substrate (1)、Insulating oxide (2)、The first metal layer (3)、First silicon dioxide layer (4)、First silicon nitride layer (5)、Polyimides (6)、Second metal level (7)、Second silicon dioxide layer (8) and the second silicon nitride layer (9)，It is characterized in that: it is upper and adjacent that described insulating oxide (2) is positioned at substrate (1)，Described the first metal layer (3) has two，Lay respectively at device cell body two ends and cover on insulating oxide (2)，Described first silicon dioxide layer (4) and the first silicon dioxide layer (5) are sequentially coated on insulating oxide (2) and part the first metal layer (3) surface，Described polyimides (6) covers on silicon nitride (5) surface and separates from device cell body both sides，Described second silicon dioxide layer (8) and the second silicon nitride layer (9) are sequentially coated on polyimides (6) surface，Described second metal level (7) has two，Lay respectively at device cell body two ends，Second metal level (7) of described left end covers on the second silicon nitride layer (9)，The first metal layer (3) of described right-hand member is provided with metal contact hole，Second metal level (7) of described right-hand member is filled in metal contact hole.
- Include the device cell body of metal, polyimides and barrier layer structure the most according to claim 1, it is characterised in that: the thickness of described insulating oxide (2) 100nm ~ Between 1000nm.
- Include the device cell body of metal, polyimides and barrier layer structure the most according to claim 1, it is characterised in that: described the first metal layer (3) and the second metal level (7) are copper, and thickness is 2 ~ 4 μm.
- Include the device cell body of metal, polyimides and barrier layer structure the most according to claim 1, it is characterised in that: the thickness of described first silicon dioxide layer (4) and the second silicon dioxide layer (8) is 40nm ± 4nm.
- Include the device cell body of metal, polyimides and barrier layer structure the most according to claim 1, it is characterised in that: the thickness of described first silicon nitride layer (5) and the second silicon nitride layer (9) is 150 nm ± 4nm.
- 6. including a preparation method for the device cell body of metal, polyimides and barrier layer structure, it is characterized in that, the preparation method of described device cell body comprises the steps:Step one. a silicon substrate (1) is provided, described substrate (1) grows oxide layer, obtain insulating oxide (2)；Step 2. at the superficial growth copper film of described insulating oxide (2), blocked by reticle, copper film performs etching and obtains the first metal layer (3)；Step 3. the first silicon dioxide layer (4) and the first silicon nitride layer (5) is deposited successively on the surface of described the first metal layer (3)；Step 4. at the upper spin-on polyimide liquid of described first silicon nitride layer (5), through overcuring, development figure obtains polyimides (6)；Step 5. the second silicon dioxide layer (8) and the second silicon nitride layer (9) is deposited successively on the surface of described polyimides (6)；Step 6. blocked by reticle, on the first metal layer (3) of right-hand member, perform etching formation contact hole；Step 7. with the second silicon nitride layer (9) superficial growth copper film in described contact hole, blocked by reticle, copper film performs etching and obtains the second metal level (7).
- Include the preparation method of the device cell body of metal, polyimides and barrier layer structure the most according to claim 6, it is characterized in that, the forming process of described copper film is that first sputtering forms copper crystalline substance, then along sub brilliant direction by galavanic growth copper film, ultimately forms copper film.
- The most according to claim 6, include the preparation method of the device cell body of metal, polyimides and barrier layer structure, it is characterized in that, the solidification temperature in described polyimides (6) solidification process is 400 ± 40 degree.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610236012.3A CN105869827B (en) | 2016-04-15 | 2016-04-15 | A kind of device cell body for including metal, polyimides and barrier layer structure and preparation method |
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| CN201610236012.3A CN105869827B (en) | 2016-04-15 | 2016-04-15 | A kind of device cell body for including metal, polyimides and barrier layer structure and preparation method |
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| CN105869827A true CN105869827A (en) | 2016-08-17 |
| CN105869827B CN105869827B (en) | 2018-02-23 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109686545A (en) * | 2019-02-26 | 2019-04-26 | 维沃移动通信有限公司 | The preparation method of charge coil, the charging module of terminal device and terminal device |
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| US5475146A (en) * | 1993-09-02 | 1995-12-12 | E. I. Du Pont De Nemours And Company | Enantioselective hydroformylation |
| US6107165A (en) * | 1998-08-13 | 2000-08-22 | Quicklogic Corporation | Metal-to-metal antifuse having improved barrier layer |
| CN101409263A (en) * | 2008-12-02 | 2009-04-15 | 友达光电股份有限公司 | Pixel structure, display panel and method for manufacturing optoelectronic device |
| CN102508376A (en) * | 2011-12-15 | 2012-06-20 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and manufacturing method thereof |
| CN103123911A (en) * | 2012-10-23 | 2013-05-29 | 友达光电股份有限公司 | Pixel structure and manufacturing method thereof |
-
2016
- 2016-04-15 CN CN201610236012.3A patent/CN105869827B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5475146A (en) * | 1993-09-02 | 1995-12-12 | E. I. Du Pont De Nemours And Company | Enantioselective hydroformylation |
| US6107165A (en) * | 1998-08-13 | 2000-08-22 | Quicklogic Corporation | Metal-to-metal antifuse having improved barrier layer |
| CN101409263A (en) * | 2008-12-02 | 2009-04-15 | 友达光电股份有限公司 | Pixel structure, display panel and method for manufacturing optoelectronic device |
| CN102508376A (en) * | 2011-12-15 | 2012-06-20 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and manufacturing method thereof |
| CN103123911A (en) * | 2012-10-23 | 2013-05-29 | 友达光电股份有限公司 | Pixel structure and manufacturing method thereof |
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| CN109686545A (en) * | 2019-02-26 | 2019-04-26 | 维沃移动通信有限公司 | The preparation method of charge coil, the charging module of terminal device and terminal device |
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| CN105869827B (en) | 2018-02-23 |
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