CN105895763A - 发光二极管芯片 - Google Patents
发光二极管芯片 Download PDFInfo
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- CN105895763A CN105895763A CN201610089246.XA CN201610089246A CN105895763A CN 105895763 A CN105895763 A CN 105895763A CN 201610089246 A CN201610089246 A CN 201610089246A CN 105895763 A CN105895763 A CN 105895763A
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- 230000005611 electricity Effects 0.000 claims description 5
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- 239000000758 substrate Substances 0.000 description 8
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- 239000010936 titanium Substances 0.000 description 4
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- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
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- 229910052719 titanium Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
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- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
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- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
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Abstract
本发明提供一种发光二极管芯片,包括半导体组件层、第一电极、电流阻挡层、电流分散层以及第二电极。半导体组件层包括第一型掺杂半导体层、发光层以及第二型掺杂半导体层。电流阻挡层包括主体以及多个分别从主体朝向第一电极延伸的延伸部。电流分散层覆盖电流阻挡层。第二电极配置于电流分散层上,且包括焊垫以及多个从焊垫延伸的指部。这些指部位于这些延伸部上方,其中这些延伸部的宽度大于对应指部的宽度,延伸部沿着一排列方向排列,且在排列方向上,较靠近发光二极管芯片边缘的延伸部具有较小的宽度。本发明具有电流阻挡层以有效控制电流聚集的位置,进而有效提升发光效率。
Description
技术领域
本发明涉及一种发光组件,尤其涉及一种发光二极管(Light-EmittingDiode,LED)芯片。
背景技术
随着半导体科技的进步,现今的发光二极管已具备了高亮度与高演色性等特性,加上发光二极管具有省电、体积小、低电压驱动以及不含汞等优点,发光二极管已广泛地应用在显示器与照明等领域。一般而言,发光二极管芯片的发光效率与发光二极管芯片的内部量子效率(即光取出率)相关。当发光层所发出的光线有更多比率可以穿透出发光二极管芯片时,代表着发光二极管芯片的内部量子效率较佳。发光二极管芯片的电极通常是由金属材质所制造,由于金属材质的不透光性,发光二极管芯片上被电极覆盖的区域所发出的光线无法有效的被利用。如此一来,会造成电能的浪费。因此,已知已发展出一种在电极与半导体组件层之间制作电流阻挡层的技术,然而,通过电流阻挡层来提升发光二极管芯片的发光效率仍然存在许多改善的空间。因此,如何进一步提升发光二极管芯片的发光效率,实为目前研发人员研发的重点之一。
发明内容
本发明提供一种发光二极管芯片,其具有电流阻挡层以有效控制电流聚集的位置,进而有效提升发光效率。
本发明提供一种发光二极管芯片,其包括一半导体组件层、一第一电极、一电流阻挡层、一电流分散层以及一第二电极。半导体组件层包括一第一型掺杂半导体层、一发光层以及一第二型掺杂半导体层,其中发光层位于第一型掺杂半导体层与第二型掺杂半导体层之间。第一电极与第一型掺杂半导体层电性连接。电流阻挡层配置于第二型掺杂半导体层上,电流阻挡层包括一主体以及多个分别从主体朝向第一电极延伸的延伸部。电流分散层配置于第二型掺杂半导体层上以覆盖电流阻挡层。第二电极与第二型掺杂半导体层电性连接。第二电极包括一焊垫以及多个从焊垫延伸的指部,且多个指部位于延伸部上方,其中多个延伸部的宽度大于对应指部的宽度,多个延伸部沿着一排列方向排列,且在此排列方向上,较靠近发光二极管芯片边缘的延伸部具有较小的宽度。
在本发明的一实施例中,上述发光层配置于第一型掺杂半导体层上以暴露出部分第一型掺杂半导体层,且第一电极配置于发光层所暴露出的部分第一型掺杂半导体层上。
在本发明的一实施例中,上述的多个指部具有相同的宽度。
在本发明的一实施例中,上述的电流分散层的材质包括透明导电材料。
在本发明的一实施例中,上述的多个指部的数量与多个延伸部数量相同,且多个指部的数量大于2。
在本发明的一实施例中,上述的焊垫位于主体上方,且第二电极经由电流分散层与第二型掺杂半导体层电性连接。
在本发明的一实施例中,上述的焊垫贯穿电流分散层与主体,且焊垫与第二型掺杂半导体层接触。
在本发明的一实施例中,上述的电流分散层覆盖被焊垫贯穿的主体的侧壁。
在本发明的一实施例中,上述的电流分散层未覆盖被焊垫贯穿的主体的一侧壁。
在本发明的一实施例中,上述贯穿电流分散层与主体的焊垫会与主体的一侧壁接触。
基于上述,本发明实施例的发光二极管芯片通过电流阻挡层以及第二电极的设计,可控制电流聚集的位置,因此本发明的发光二极管芯片具有良好的发光效率。
为让本发明的上述特征和优点能更明显易懂,下文特举实施例,并配合附图作详细说明如下。
附图说明
图1A是依据本发明实施例的发光二极管芯片的剖面图;
图1B是依据本发明实施例的发光二极管芯片的上视图;
图1C是依据本发明另一实施例的发光二极管芯片的上视图;
图2是依据本发明另一实施例的发光二极管芯片的剖面图;
图3是依据本发明另一实施例的发光二极管芯片的剖面图。
附图标记:
100a、100b、100c:发光二极管芯片
110:半导体组件层
112:第一型掺杂半导体层
114:发光层
116:第二型掺杂半导体层
120:第一电极
130:电流阻挡层
132:主体
134:延伸部
140:电流分散层
150:第二电极
152:焊垫
154:指部
160:缓冲层
D:排列方向
E:边缘
S:侧壁
SUB:基板
具体实施方式
图1A是依据本发明实施例的发光二极管芯片的剖面图。图1B是依据本发明实施例的发光二极管芯片的上视图。图1C是依据本发明另一实施例的不同发光二极管芯片的上视图。
请参照图1A以及图1B,本实施例的发光二极管芯片100a包括一半导体组件层110、一第一电极120、一电流阻挡层130、一电流分散层140以及一第二电极150。半导体组件层110包括一第一型掺杂半导体层112、一发光层114以及一第二型掺杂半导体层116,其中发光层114位于第一型掺杂半导体层112与第二型掺杂半导体层116之间。第一电极120与第一型掺杂半导体层112电性连接。电流阻挡层130配置于第二型掺杂半导体层116上,且电流阻挡层130包括一主体132以及多个分别从主体132朝向第一电极120延伸的延伸部134。电流分散层140配置于第二型掺杂半导体层116上以覆盖电流阻挡层130。第二电极150经由电流分散层140与第二型掺杂半导体层116电性连接,其中第二电极150包括一焊垫152以及多个从焊垫152延伸的指部154,焊垫152位于主体132上方,而这些指部154位于这些延伸部134上方,其中这些延伸部134的宽度大于对应指部154的宽度,这些延伸部134沿着一排列方向D排列,且在此排列方向D上,较靠近发光二极管芯片100a边缘E的延伸部134具有较小的宽度。其中,这些延伸部134的延伸方向与排列方向D垂直。具体而言,本实施例中的指部154以及延伸部134的数量相等且皆为三个。然而,本实施例并不限定指部154以及延伸部134的数量。此外,在本实施例中,指部154具有相同的宽度,于其他实施例中,指部154可具有不同的宽度。
一般来说,施加于第二电极150的驱动电流主要的方向会由第二电极150至第一电极120。但在本实施例中,较靠近发光二极管芯片100a边缘E的延伸部134相对于在发光二极管芯片100a中心部分的延伸部134具有较小的宽度。换言之,较靠近发光二极管芯片100a中心部分的延伸部134较能有效的阻挡来自于第二电极150的电流,而较靠近发光二极管芯片100a边缘E的延伸部134的阻挡效果较不明显。因此,本实施例可以通过指部154和对应的延伸部134在发光二极管芯片100a不同区域的宽度设计来控制发光二极管芯片100a中电流聚集区域的位置,进而提升发光二极管芯片100a的发光效率。
在本实施例中,发光层114配置于第一型掺杂半导体层112上以暴露出部分的第一型掺杂半导体层112,且第一电极120配置于发光层114所暴露出的部分第一型掺杂半导体层112上。换言之,本实施例的发光二极管芯片100a为水平式(horizontal type)发光二极管芯片。举例而言,半导体组件层110中的第一型掺杂半导体层112例如为N型掺杂半导体层,而第二型掺杂半导体层116例如为P型掺杂半导体层,且发光层114例如由多个交替堆栈的井层(well layers)以及阻障层(barrier layer)所构成的多重量子井层(Multiple Quantum Well,MQW)。此外,本实施例的半导体组件层110例如是通过磊晶制程制作于一基板SUB上,而此基板SUB可为蓝宝石基板、硅基板、碳化硅基板等。
值得注意的是,前述的半导体组件层110可进一步包括一缓冲层160,此缓冲层160通常会在第一型掺杂半导体层112制作之前,先形成于基板SUB上。换言之,缓冲层160可选择性地形成于基板SUB与半导体组件层110之间,以提供适当应力释放并且改善后续形成的薄膜的磊晶品质。
在本实施例中,第一电极120例如是与第一型掺杂半导体层112具有良好欧姆接触的金属材质,电流阻挡层130的材质例如是介电层,电流分散层140的材质例如是透明导电材料,而第二电极150例如是与电流分散层140具有良好欧姆接触的金属材质。举例而言,第一电极120的材质包括金(Au)、钛(Ti)或铝(Al)等导电材料,电流阻挡层130的材质包括硅氧化物(SiOx)或氮化硅(SiNx)等介电材料,电流分散层140的材质包括铟锡氧化物(ITO)、铟锌氧化物(IZO)等透明导电材料;而第二电极150的材质包括金(Au)、钛(Ti)或铝(Al)等导电材料。
下述实施例沿用前述实施例的组件标号与部分内容,其中采用相同的标号来表示相同或近似的组件,并且省略了相同技术内容的说明。关于省略部分的说明可参考前述实施例,下述实施例不再重复赘述。
图1C是依据本发明另一实施例的不同发光二极管芯片的上视图。请参照图1C,具体而言,本实施例之指部154以及延伸部134的数量相等且皆为五个。然而,本实施例并不限定指部154以及延伸部134的数量必须为奇数,指部154以及延伸部134的数量亦可以偶数。
在前述的实施例中,指部154以及对应的延伸部134的数量可用以控制发光二极管芯片100a中电流聚集区域的密度,以其能进一步的提升发光二极管芯片100a的发光效率。
图2是依据本发明另一实施例的发光二极管芯片的剖面图。请参照图2,在本实施例的发光二极管芯片100b与前述实施例的发光二极管芯片100a主要的差异在于:在本实施例中,焊垫152贯穿电流分散层140与主体132,且焊垫152与第二型掺杂半导体层116接触,其中电流分散层140覆盖被焊垫152贯穿的主体132的一侧壁S。
图3是依据本发明另一实施例的不同发光二极管芯片的剖面图。请参照图3,在本实施例的发光二极管芯片100c与前述实施例的发光二极管芯片100b主要的差异在于:在本实施例中,电流分散层140未覆盖被焊垫152贯穿的主体132的一侧壁S。换言之,贯穿电流分散层140与主体132的焊垫152会直接与主体132的侧壁S接触或连接。
相较于发光二极管芯片100a,在前述的实施例所提到的发光二极管芯片(100b或100c)的配置方式,可以更进一步提升第二电极150与发光二极管芯片(100b或100c)的黏着性,可以避免第二电极150与发光二极管芯片(100b或100c)剥离。
应注意的是,虽然图1B与图1C所显示的配置方式以发光二极管芯片100a为例,但是图2与图3所显示的发光二极管芯片(100a或100c)也可以具有如同图1B与图1C所显示的配置方式。
综上所述,本发明的发光二极管芯片中通过电流阻挡层以及第二电极的设计,可控制电流聚集的位置,因此本发明的发光二极管芯片具有良好的发光效率。此外,焊垫贯穿电流分散层与主体,可以提升第二电极与发光二极管芯片的黏着性,避免第二电极与发光二极管芯片剥离。
虽然本发明已以实施例揭示如上,然其并非用以限定本发明,任何所属技术领域中普通技术人员,在不脱离本发明的精神和范围内,当可作些许的改动与润饰,故本发明的保护范围当视所附权利要求界定范围为准。
Claims (10)
1.一种发光二极管芯片,其特征在于,包括:
一半导体组件层,包括一第一型掺杂半导体层、一发光层以及一第二型掺杂半导体层,其中所述发光层位于所述第一型掺杂半导体层与所述第二型掺杂半导体层之间;
一第一电极,与所述第一型掺杂半导体层电性连接;
一电流阻挡层,配置于所述第二型掺杂半导体层上,所述电流阻挡层包括一主体以及多个延伸部;
一电流分散层,配置于所述第二型掺杂半导体层上以覆盖所述电流阻挡层;以及
一第二电极,配置于所述电流分散层上,所述第二电极包括一焊垫以及多个从所述焊垫延伸的指部,且所述多个指部位于所述多个延伸部上方,其中所述多个延伸部的宽度大于对应指部的宽度,且较靠近发光二极管芯片边缘的延伸部具有较小的宽度。
2.根据权利要求1所述的发光二极管芯片,其特征在于,所述发光层配置于所述第一型掺杂半导体层上以暴露出部分所述第一型掺杂半导体层,且所述第一电极配置于所述发光层所暴露出的部分所述第一型掺杂半导体层上。
3.根据权利要求1所述的发光二极管芯片,其特征在于,所述多个指部具有相同的宽度。
4.根据权利要求1所述的发光二极管芯片,其特征在于,所述电流分散层的材质包括透明导电材料。
5.根据权利要求1所述的发光二极管芯片,其特征在于,所述多个指部的数量与所述多个延伸部数量相同,且所述多个指部的数量大于2。
6.根据权利要求1所述的发光二极管芯片,其特征在于,所述焊垫位于所述主体上方,且所述第二电极经由所述电流分散层与所述第二型掺杂半导体层电性连接。
7.根据权利要求1所述的发光二极管芯片,其特征在于,所述焊垫贯穿所述电流分散层与所述主体,且所述焊垫与所述第二型掺杂半导体层接触。
8.根据权利要求7所述的发光二极管芯片,其特征在于,所述电流分散层覆盖被所述焊垫贯穿的所述主体的一侧壁。
9.根据权利要求7所述的发光二极管芯片,其特征在于,所述电流分散层未覆盖被所述焊垫贯穿的所述主体的一侧壁。
10.根据权利要求7所述的发光二极管芯片,其特征在于,贯穿所述电流分散层与所述主体的所述焊垫与所述主体的一侧壁接触。
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