CN1123514A - 可层叠的电路板结构及制造方法 - Google Patents

可层叠的电路板结构及制造方法 Download PDF

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CN1123514A
CN1123514A CN95106664A CN95106664A CN1123514A CN 1123514 A CN1123514 A CN 1123514A CN 95106664 A CN95106664 A CN 95106664A CN 95106664 A CN95106664 A CN 95106664A CN 1123514 A CN1123514 A CN 1123514A
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layer
passage
insulating barrier
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metal
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杰罗姆·A·弗兰肯
理查德·F·弗兰肯
罗纳德·L·艾姆肯
肯思·A·范德李
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Advanced Semiconductor Engineering Inc
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Abstract

一种用于制造具有精细间距的图形的多层印刷电路板的方法和装置，该电路板包含各层可叠装的电路板层，该板层设置有电源配置、信号配置和电容去耦合构造。利用一金属芯片、使芯片形成图形，选择性地将芯片包封在绝缘层之中，选择性地淀积金属以形成通道，接插件和信号线条，以及在各通道和接插件上利用金属接合形成枝状结构，以便从电路板层的板面的上方和下方进行可叠装的连接。

Description

可层叠的电路板结构及制造方法
本发明一般来说涉及电路板结构。本发明还涉及电路板的制造和使用，该电路板通过叠置的互相连接方式层叠。具体说来，本发明涉及可叠置的电路板层的有效制造和使用，以及这种电路板层连同带有电容结构的电路板层的使用。
具有精细间距图形的多层印刷电路板常用于在复杂的电子装置，包括但不局限于计算机系统中，将集成电路器件相互连接。当通过常规的钻孔和电镀各通道(包括使用隐蔽的通道或接插件)的实践方式来实现相互连接时，因在各电路板的不同层中按常规方式使用的铜制图形的间距很低，层对层的相互连接更复杂。
在这种多层电路板中，一般是使用铜制平片作为接地通道、作为电源供电通道，以及作为各信号线条层之间的屏蔽。通常集成电路封装件具有去耦合电容，其安装在印刷电路板表面上，直接临近它们的电源供电接线端，以便降低噪声。
制造多层印刷电路板的困难在于，直接连接集成电路晶片时需要精细布线间距，例如采用倒装技术就存在困难，导致采用高密度的电路板或基板，如在美国专利5146674号所介绍的，其主题结合本文可供参考。这个专利的技术特征包括由导电平片形成各单个层，完成多层电路板的结构。在贯通该片的绝缘孔中形成各通道和接插件。在绝缘层上淀积的导电层中形成信号线条图形，该绝缘层形成在金属芯片上。在通过对准加压，配对安装顺序的各层的过程中，经过各图形通道和接插件来实现竖直相互连接。
需指明，通道和接插件具有相似的竖直相互连接的功能，术语“通道”在下文的使用是试图将两种结构形式都包含。
各通道之间的可靠连接是利用在各通道的端部形成的枝状结构而实现的。当对准的各层受压时，该枝状结构与另一层通道中对应的枝状结构整体上接触。这种枝状结构的制造和使用介绍在美国专利5137461号上，其主题结合本文可供参考。
这种竖直连接的电路板结构的使用的进一步完善介绍在美国专利5363275号上，其主题结合本文可供参考。本发明重点集中在多层的选择性的分层结构，以便将高密度的倒装器件相互连接，以及提供基本上柔性的接线方式，用于这种板层的成组相互连接，可以为模件化组成的计算机系统所采用。
包含多层相互连接系统的各单个板层的可层叠的电路板的制造在上述美国专利5146674号和5363275号中查到，根据在5146674中所述的方法形成各单个的板层。该方法尽管是可行的，然而其复杂，因此费用高。
随着数字系统时钟速率的增加和集成电路晶片I/O线条数量的增加，在集成电路各线端处的电源供电的电容去耦合问题变得越来越重要。由于众多的原因，现有技术关于邻近集成电路封装件安装去耦合电容器的实践方式并不理想。首先，采用这些电容器需要额外的组装操作。此外，相对于同期的集成电路器件该电容器是较大的。最后，由于电容器是表面安装的器件，接地和电源供电的连接部分必然经过在电容器引线处的表面，导致在该去耦合通道中引入电阻和电感。
尽管可以将电容结构包含到集成电路晶片中，很难证明这种技术方案，在硅面积方面的成本和可能得到的电容的数值是合算的。
因此，需要一种适于制作先进的可层叠电路板结构的各单层的方法。
一方面，本发明涉及一种可叠置电路板的制造方法，其包含如下步骤：形成贯通金属片的孔，在金属片上形成第一绝缘层，在第一和第二位置形成贯通第一绝缘层的第一和第二孔，在第一和第二位置有选择地淀积金属，从而在第一位置淀积金属形成一通道，其径第一绝缘层与金属片电气绝缘，在第二位置处淀积金属形成一通道，其电连接到金属片，并且在通道的端部形成枝状结构。
各板层叠置，通过通道端部的枝状结构电连接。得到的多层板具有分层结构，最好包括电容器层、接地板、储能板和信号线。通道可以表面安装器件(如球网格阵列倒装器件)的精细间距图形中制作。
图1—10描述在制造一电路板层的过程中以示意横断面方式表示的各个阶段，该电路板层具有一储能极板和信号线条。
图11和12描述以示意横断面方式表示的两个储能极板的电路板各层的装配和分层连接。
图13—20以示意横断面方式描述在形成电路板电容器结构的各个不同阶段。
图21以示意横断面方式描述两个电路板电容器各层的层间的相互连接。
图22以示意横断面方式描述具有4层层叠的电路板结构的使用，以便将接地点、电源和信号传输到采用倒装方式的电子元件上，其复合结构包含信号层、电源供电层和电容层，通过顺序的通道和接插件结构进行相互连接。
本发明的优选实施例包含很多方面。其首先涉及到以导体为核心的电路板层的结构和制造。其次涉及以电容为核心的电路板结构和有效的装配。最后其涉及到一种层叠式的多层电路板结构，其具有信号、电源供电和电容器各层，它们有效地集合成一个组合件，适合于将安装各种元件(例如倒装器件之类)的具有精细间距的表面连接起来。首先通过参照导体式芯层、然后参照电容式芯层，最后参照多层叠放的组合电路板介绍本发明。
如图1所示利用大约0.025毫米厚的铜—镍铁合金—铜(CIC)的芯片1开始制造。虽然不是最理想，该金属芯片可以由纯铜、铬、镍铁合金、钼或铜—钼—铜构成。该芯片可采用光刻法形成图形的掩膜2涂覆，以便利用腐蚀剂如氧化铜和盐酸形成曝露区3。图2表示区域3经腐蚀的CIC层，图中示有的孔4最好是圆形的，延伸通过CIC片。形成图形的CIC片然后在两侧涂以相对厚的、可光成像的聚合物例如环氧树脂或聚酰亚氨的绝缘层6，如图3所示。
接着进行绝缘层6的光刻掩膜和腐蚀，以形成如图4所示的孔7。使用常规的腐蚀剂。需指出，由于绝缘层6的侧壁使孔7和CIC片1电绝缘，而被腐蚀的孔8使CIC片1露出。如图5表示的，在所有露出表面上共同形成淀积正常厚度为0.001到0.0025毫米厚的公共导电铜层9。一公共层9用于在下面顺序的操作过程中便利于在所选择的区域进行电镀。
然后在铜层9上以光刻方法形成掩膜11，如图6所示，以便选择性地对要电镀的那些区域进行曝露。接着进行掩膜11的电镀和剥离，没有被掩膜11覆盖的区域具有的淀积的导电铜层12的厚度为0.015到0.05毫米厚，如图7所示。参阅图7要注意、在该制造方法中这个阶段的电路板层包括：在孔13的内壁上的、在孔14处的CIC芯片1的绝缘侧壁和露出的区域上的相对厚的铜淀积层以及作为在一个或多个电路板层表面上选择性地形成图形的线条，例如独立的信号线条图形16或孔图形13的延伸部分17。这些导电区域限定了在最终形成的可层叠的电路板的各层内部以及其间的电通道。
接着，利用光刻法使掩膜18形成图形，以便除了在孔13处限定的通道的端部以及在14处限定的像插接件结构的通道以外覆盖其余所有部分。掩膜18的目的是限定一些区域，以用于按照美国专利5137461号所指出的方法形成选择性生长的枝状结构。图9描述了经历枝状结构生长过程的电路板层的横断面，因此枝状结构19形成在孔13处的通道的对置的两端，枝状结构21遍布在孔14处的通道状插接件的两端。需指出，尽管枝状结构形成的讲述不太重要，枝状结构材料还沿着在13处的通道的内通路淀积。接着一般利用锡/铅合金，利用金属接合的工艺(joining metallurgy)进行枝状区域的电镀，形成一个标称0.0025到0.025毫米的薄层。
图10表示在剥离掩膜18和腐蚀除去露出的公共的铜层9之后的电路板层的横断面。图10表示了可层叠的电路板结构的完整的一层。如该图所示，该层包括一导电的内芯1，其适合于经过在孔14处的枝状端接的接插件从各自的枝状结构的上方或下方进行供电或接地。此外，在孔13处的通道也出现在该层结构中，这些通道同样可用于从该层的上方或下方进行枝状方式连接。需指出，各通道与导电的芯片1是电气绝缘的。然而，其中一个通道连接到在该电路板层的上表面上的导体22。因此，例如为22的表面导体通过在孔13处的通道的枝状端接部分，由电路板层的上方或下方相互连接。在图10中的电路板层还示有在板的上表面上的电气上绝缘的导电线条23。表面导体23说明在电路板层的表面上的信号线条可以按与在孔13处的通道和在孔14处的接插件结构电气上不同的方式形成图形。
图11和图12描述将图10中的可叠装的电路板层的使用，以便形成一多层的电路板。在图11中，所示的电路板层覆以粘性的绝缘层24。在此之后，将一般具有不同的表面导体图形的第二个电路板层对准，在压力下配对连接，进行加热以便形成如图12所示的二层叠装的电路板结构0在层压步骤中，采用加热使得在枝状结构通道处的金属接合过程重新发生，以便形成一种高密实度的电连接。叠装结构实现了在各个芯片导体之间经过接插件结构的直接连接和各通道与相关的信号线条的直接连接。枝状结构保证了可靠的电连接，而粘性的绝缘层密封了周围的边界并将两个可叠装的电路板层粘接。
本发明的第二个方面涉及将电容元件形成到可叠装的电路板层的基本的芯式结构中。使得本发明的电路板电容器结构特别有价值的因素是：(1)由于使用薄膜高介电常数材料，使电容器的尺寸特别优异，(2)使在电容器结构和安装电子器件的表面之间的连接具有最佳的电特性，(3)与形成电容器结构所采用的制造方法以及制造其它可叠装的电路板层所采用的方法相类似和(4)可以易于将多层电容器电路板层和信号及电源的可叠装的电路板层相连接。该具有电容器结构的可叠装的电路板层具有高电容、低电阻、低电感的结构，其能用于与参阅图12所介绍的枝状结构相互连接的分层可叠装的多层电路板相结合。需要对电容区的去耦合效应特别讲述的是，该电容是由各通道的阵列限定的，是分布形成的，并且通过不多于沿着各通道路径的电路板层，与各器件的线头相分离。
利用一种可溶胶—凝胶的化合物溶液27涂覆—与CIC层1相似的导电金属片26，如图1 3所示开始带有电容器结构电路板层的制造过程。片26最好通过镀铂镍铁合金或镀薄铂层的铜—镍铁合金—铜，以便消除铜的氧化和与溶胶—凝胶化合物起反应。溶胶—凝胶化合物27通过旋转涂覆、喷涂、浸渍或其它方式沉积在该表面上，标称厚度为约0.001毫米。各种不同的材料可以用作化合物27，一个实例是钛酸铅镧，如在IBM研究报告RC 19550(84975)94年4月25日上，题为“用溶胶—凝胶制备的钛酸铅镧薄膜的厚度与绝缘特性的相互关系”，作者为Beach等人，由IBM研究部，J.J.Watson研究中心出版，其主题结合本文可供参考。发表在Advanced Materials技术刊物上的两篇文章介绍了理解溶胶—凝胶法的基本概念。第一篇题为“Advanced Dielectrics(近代绝缘材料)：Bulk Ceramics and Thin Film(体状陶瓷和薄膜)”，作者Hennings等人，出现在Advanced Materials 3(1991)No.7/8，第334—340页上。第二篇文章题为“Sol—Gel Processes”(溶胶一凝胶法)，作者Reuter，出现在Advanced Materials 3(1991)No.5，258—259页上。两篇参考文件的主题结合本文可供参考。
图14表示了该溶胶一凝胶法过程的下一步骤，包含高氧环境下的热处理，标称温度接近700℃。目的是在金属片26上形成一薄的晶状薄膜层29，该薄膜层29特征在于，具有低泄漏电流和极高的介电常数，一般达500数量级。在物理学方面的专业人员将会立即对与绝缘层29有关的许多指标作出评价。首先，由于电容的数值与绝缘层的厚度成反比，绝缘层29的薄膜特性所形成的结构的单位面积电容值高。由于电容直接与面积成比例，而薄膜基本上扩展遍及可叠装的电路板层的整个表面，还使受益于此获得高电容。最后，由于电容直接与介电常数成比例，利用溶胶—凝胶形成的晶状薄膜材料的优异的高介电常数进一步增加可得到的电容。
不应当忽视，为了形成例如29的晶状薄膜使用溶胶—凝胶法所需的高温是在用于常规印刷电路板结构例如FR4的使用性范围之外。这种印刷电路板材料所具有的玻璃临界温度范围为120—180℃。与之相反，当所选择的金属的氧化和各反应特性是与周围的热环境相适合时，溶胶—凝胶的热处理温度适合于例如26的金属片芯的结构。
在形成晶状薄膜层29的溶胶—凝胶法过程之后，如图15所示意表示的，利用化学汽相淀积、喷镀、蒸发或电镀用31概略表示的各种方法在层29上淀积几微米厚的导电材料层32。然后，将如图15所示的所含三层电容结构用作与图1开始介绍的电路板制造过程相类似的电路板层的芯片。
按照能产生图16所示横断面的各项操作开始形成电容器电路板图形。如图所示，利用可用光刻方式处理的掩膜33选择性地覆盖电容芯片，以便提供开孔34和36。开孔34和36最好是圆形的。接着进行电容芯片的腐蚀，最好采用异向性(anisotropic)的腐蚀剂，例如氯化铜和盐酸。根据腐蚀结果和剥离掩膜33，出现如图17所示的、在所选择位置34和36处具有开孔的芯片。
接着，遍及该芯片形成如图3中如6的绝缘层。利用光刻掩膜和选择性地腐蚀，选择性地除去绝缘层6形成了：介电绝缘的通孔37、介电绝缘的通孔38、露出电容芯体的金属层26的触接开孔39以及一个贯通绝缘层40到电容芯体的另一金属层29的开孔41。接着采用与参照图5、6和7所介绍的相似的步骤，产生如图19所示的结构。这些步骤包括：形成一个薄的公共的铜层、形成一个掩膜和镀膜，以便形成一个贯通通孔37和38并深入到各个开孔39和41的厚金属层，后者的形成对实际的电容器极板26和29来说是电气上公用的。在剥离掩膜之后，出现在图19以断面图表示的带电容器的电路板层结构。
要指出，被涂覆的导电层42延伸通过开孔37到电路板的另外一侧，该导电层42以接触面在绝缘层40中的开孔39处与电容器结构的导电极板26相接触。与之相似，被涂覆的金属层43延伸通过开孔38，并经过触接开孔41电连接到电容器极板29上。
利用参照图8、9和10所介绍的操作相类似的光刻掩膜和枝状结构形成的操作，产生如图20所示的具有电容的电路板层结构。要指出，在通孔37处所覆盖的枝状结构对电容器结构的一个极板是公用的，而在通孔38处所覆盖的枝状结构对电容器结构的对置的极板是公用的。
多个电容器层的平行连接形成如图21所示的结构。按照图12所述的方式使用一种粘性绝缘物39，以便将两个配对安装的电路板层密封和粘接。再次利用加热，在层压步骤中使得在枝状结构的通道上重新进行金属接合的过程，以便形成高密实度的电连接。
关于在图21中所示的组件值得注意的是，其易于与电路板的电容结构以平行方式相连接，并且以这样一种形式，可以从上方或下方实现与信号和电源分布层进一步逐次地相互连接。首先要指出，用于形成电容层的制造过程与为了形成信号和电源分布电路板层所进行的那些过程相类似。
本发明的第3个方面涉及将分布电源和电信号的电路板层和一些在层叠的多层电路板结构中能够产生电容去耦合的板层相互连接的能力。在图22中示有一个实例。如该图所示，组合件结构具有：两个图21所示的电容器层，其位于在图22所示结构的底部，以及两个如图12所示的分布电信号、分布电源和带有屏蔽的板层，在上部层叠。为了增进分布电容、多半可以利用各通道的阵列来使电容板各层相互连接，而不是被用于按照组合的电源供电和接地线条的另外的直接相互连接。出于解释的目的，所示的分层可叠装的多层电路板41事先考虑还连接到小球一网格阵列型的倒装电子器件46的球状件42、43和44上。要特别指出，在47处的电源供电通道和在48处的接地通道其位置直接接近与各个球状件42和44竖直对准的位置点。这就降低了电阻和电感的影响，这种影响可能会降低利用在下面的多层电路板结构的电容层所产生的去耦合效果。与之相似，要指出，电子器件的球形件43直接由下方从多层电路板的连接点接受信号。这种配置减少了信号通道的长度以及在信号通道中的电阻或电感。
虽然，通过列举特定实施例的方式对本发明做了介绍，应当说明本发明所包含的装置和方法与下文要陈述的权利要求的宽度范围应当保持一致。

Claims (8)

1.一种可叠置电路板层的制造方法，包括如下步骤：
形成贯通金属片的孔；
在金属片上形成第一绝缘层；
分别在第一位置和第二位置形成贯通第一绝缘层的第一和第二孔；
在第一和第二位置处选择性地淀积金属，从而在第一位置处淀积金属形成一径第一绝缘层与金属片电绝缘的通道，在第二位置处淀积金属形成一电连接到金属片的通道；及
在通道的端部形成枝状结构。
2.如权利要求1所述的方法，其特征在于，还包括在枝状结构上形成金属接合部分的步骤。
3.如权利要求2所述的方法，其特征在于，选择性地淀积金属的步骤包括：
遮掩金属片的非选择区和第一绝缘层；
在遮掩步骤中未被覆盖的区域镀金属。
4.如权利要求3所述的方法，其特征在于，还包括下列步骤：
在电镀步骤之前形成公共层；
在电镀步骤之后除去暴露的公共层。
5.如权利要求2所述的方法，其特征在于，金属片包括铜一镍铁合金一铜组合物。
6.如权利要求1所述的方法，其特征在于，选择性地淀积金属的步骤使第一绝缘层的第三位置处与第一和第二位置处的淀积金属电气绝缘。
7.如权利要求2所述的方法，其特征在于，形成枝状结构的步骤包括下列步骤：
选择性地遮掩通道端部之外的区域；以及
未受遮掩的区域枝状生长。
8.如权利要求6所述的方法，其特征在于，形成枝状结构的步骤包括下列步骤：
选择性地遮掩通道端部之外的区域；以及
未受遮掩的区域枝状生长。
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