CN1142684A - 制造金属氧化物场效应晶体管的方法 - Google Patents

制造金属氧化物场效应晶体管的方法 Download PDF

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CN1142684A
CN1142684A CN96106872A CN96106872A CN1142684A CN 1142684 A CN1142684 A CN 1142684A CN 96106872 A CN96106872 A CN 96106872A CN 96106872 A CN96106872 A CN 96106872A CN 1142684 A CN1142684 A CN 1142684A
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polysilicon layer
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metal
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高尧焕
黄圣敏
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SK Hynix Inc
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Abstract

一种制造金属氧化物硅场效应晶体管的方法，其中的多晶硅层被淀积在起着使MOSFET的栅同MOSFET的基片绝缘作用的栅氧化膜上。当利用金属膜或金属硅化物侧壁作掩模形成栅电极时，多晶硅层起着防止栅氧化膜被腐蚀的作用，所以，当形成栅电极时，可以防止MOSFET的半导体基片和栅电极之间出现短路。

Description

制造金属氧化物场效应晶体管的方法
本发明涉及一种制造金属氧化物场效应晶体管(MOS-FET)的方法，特别涉及一种包括用金属膜或金属硅化物膜形成栅电极的制造MOSFET的方法。
为达到半导体器件的高集成化，曾采用过各种各样的方法。比如，一种形成薄导电层作为MOSFET的栅电极的方法是公知的。为达到高集成化而与形成栅相关的比例设计原则也是公知的。该比例设计原则是指为进一步增加晶体管沟道的跨导，MOSFET应有较薄的栅氧化膜。
参照图1～4，说明一种常规制造具有薄栅电极的MOS-FET的方法。
根据此方法，首先制备一块半导体基片1，如图1所示。在半导体基片1上依次层叠栅氧化膜2、多晶硅层和绝缘膜。之后，进行栅构图步骤，以形成多晶硅层图形3和绝缘膜图形4。在腐蚀多晶硅层图形之后，仍保留栅氧化膜2不被腐蚀。
然后，在所得结构的整个上表面上，淀积厚100～1000的金属膜5，如图2所示。该金属膜5是由W、Ta、Ti、MO、Pt、Ni或Co制成的。
随后，进行退火步骤，以使金属膜5能与多晶硅层图形3反应，而在多晶硅层图形3的两个侧壁上形成硅化物膜6，如图3所示。此时，金属膜5不与栅氧化膜2和绝缘膜图形4反应。所以，位于栅氧化膜2和绝缘膜图形4上的那一部分金属膜5未变成该金属的硅化物。
然后，利用金属膜5和硅化物膜6之间的腐蚀选择率的差别，根据各向同性腐蚀，去掉留在栅氧化膜2和绝缘膜图形4上的金属膜5，如图4所示。于是，得到由多晶硅层图形3和金属硅化物膜6构成的栅电极9。
然而，根据上述常规方法存在一个当腐蚀多晶硅层形成多晶硅层图形时，栅氧化膜2可能被不合要求地腐蚀的问题。如果在这种栅氧化膜2被腐蚀的条件下进行后续的工艺步骤，则可能在栅氧化膜2还有半导体基片上形成硅化物膜。在此情况下，可能在半导体基片和栅电极之间出现短路。
因而，本发明之目的在于，克服上述已有技术中所含的问题，并提供一种尽管形成薄栅氧化膜而仍能防止MOSFET的半导体基片和栅电极之间出现短路，因而不仅能消除由MOSFET损伤所导致的MOSFET特性的退化而且还能达到改善工艺裕度的制造MOSFET的方法。
根据本发明的一个方案，本发明提供一种制造金属氧化物硅场效应晶体管的方法，包括以下各步骤：在一块半导体基片上依次层叠栅氧化膜、第一多晶硅层、绝缘膜、第二多晶硅层，部分腐蚀第二多晶硅层，而形成第二多晶硅层图形；在利用第二多晶硅层图形作掩模，在部分腐蚀第一多晶硅层之后所得结构上形成绝缘膜图形；在绝缘膜图形形成之后所得结构上淀积金属膜；各向异性腐蚀金属膜，因而在第二多晶硅层图形两侧壁上分别形成金属膜侧壁；以及利用第二多晶硅层图形和金属膜侧壁作掩模腐蚀第一多晶硅层和栅氧化膜而形成栅。
根据本发明的另一方案，本发明提供一种制造金属氧化物硅场效应晶体管的方法，包括以下各步骤：在一块半导体基片上依次层叠栅氧化膜、第一多晶硅层、绝缘膜、第二多晶硅层，然后根据栅构图工艺使第二多晶硅层和绝缘膜构成图形，因而形成第二多晶硅层图形和绝缘膜图形，并在所得结构上形成金属膜；各向异性腐蚀金属膜，因而在第二多晶硅层图形的两侧壁上各自形成金属膜侧壁；使金属膜退火，因而使金属膜同与之接触的第二多晶硅层图形和第一多晶硅层反应，而形成金属硅化物膜；以及利用第二多晶硅层图形和金属硅化物膜作掩模，腐蚀第一多晶硅层和栅氧化膜，因而形成具有由第二多晶硅层图形、金属硅化物膜、第一多晶硅层图形和绝缘膜图形构成的多硅化物结构的栅。
根据本发明的又一方案，本发明提供一种制造金属氧化物硅场效应晶体管的方法，包括以下各步骤：在一块半导体基片上依次层叠栅氧化膜、第一多晶硅层、绝缘膜、第二多晶硅层并根据栅构图工艺使第二多晶硅层和绝缘膜构成图形，因而形成第二多晶硅层图形和绝缘膜图形，然后在所得结构上形成金属膜；使金属膜退火，因而使金属膜同与之接触的第二多晶硅层图形和第一多晶硅层反应，因而当使第一多晶硅层构图时，形成金属硅化物膜；以及各向异性腐蚀金属硅化物膜，因而在第二多晶硅层图形的两侧壁各自形成金属硅化物膜侧壁，因而形成具有由第二多晶硅层图形、金属硅化物膜侧壁、第一多晶硅层图形和绝缘膜图形构成的多硅化物结构的栅。
从下面参照附图的关于实施例的描述，将明了本发明的其它目的和方案。
图1～4是分别说明常规的制造MOSFET方法的剖面图。
图5～8是分别解释根据本发明的实施例1形成MOS-FET栅电极方法的剖面图。
图9～12是分别解释根据本发明的实施例2形成MOS-FET栅电极方法的剖面图。
图13～16是分别解释根据本发明的实施例3形成MOSFET栅电极方法的剖面图。
参照图5～8，来解释根据本发明实施例1形成MOSFET栅电极的方法。
根据本发明的方法，首先制备一块半导体基片11，如图5所示，在半导体基片11上，依次层叠栅氧化膜12和第一多晶硅层17。在第一多晶硅层17上淀积厚50～500的绝缘膜18。然后在绝缘膜18上形成厚100～500的第二多晶硅层。之后，进行栅构图工艺步骤，以使第二多晶硅层构成图形，而形成第二多晶硅层图形13。在此步，将第二多晶硅层一直腐蚀到露出绝缘膜18。
然后，利用第二多晶硅层图形13作为掩模，来腐蚀裸露的绝缘膜18，如图6所示。此时，位于第二多晶硅层图形13下面的那一部分绝缘膜18仍未被腐蚀而留下。随后，在包括第二多晶硅层图形13的裸露表面和第一多晶硅层17的裸露表面在内的所得结构的整个裸露表面上淀积厚100～1000的金属膜15。
各向异性地腐蚀金属膜15，因而在第二多晶硅层图形13的两个侧表面上分别形成金属膜侧壁15′，如图7所示，金属膜侧壁15′起到使第二多晶硅层图形13和第一多晶硅层17相互电连接的作用。
然后，利用第二多晶硅层图形13和金属膜侧壁15′作为掩模，腐蚀第一多晶硅层17和栅氧化膜12，如图8所示。于是，得到由第二多晶硅层图形13、金属膜侧壁15′、已构图的第一多晶硅层17和已构图的绝缘膜18组成的栅电极19。该栅电极19具有带金属侧壁的结构。
根据图5～8的本发明的实施例，尽管位于栅电极19下面的栅氧化膜12的厚度很薄，但它并未被腐蚀，这是因为第一多晶硅层17起到了腐蚀阻挡膜的作用。由于第一多晶硅层17保护着栅氧化膜12，则可防止栅电极19和基片11之间的连接。于是，可以防止半导体器件被损伤。
图9～12是解释一种根据本发明的实施例2形成MOS-FET栅电极的方法。
根据本发明的该实施例，首先，制备一块半导体基片21，如图9所示，在半导体基片21上依次形成栅氧化膜22和第一多晶硅层27。在第一多晶硅层27上淀积厚50～500的绝缘膜。然后，在该绝缘膜上形成厚100～500的第二多晶硅层。之后，进行栅构图工艺步骤，以使第二多晶硅层同绝缘膜一起构成图形，因而形成第二多晶硅层图形23和绝缘膜28。随后，在所得结构的整个裸露表面上淀积厚100～1000的金属膜25。
然后，各向异性地腐蚀金属膜25，因而在第二多晶硅层图形23的各的侧表面上分别形成金属膜侧壁25′，如图10所示。
随后，进行退火工艺步骤，以使金属膜25能同与之接触的第二多晶硅层图形23和第一多晶硅层27反应，而形成金属硅化物膜26，如图11所示。
金属硅化物膜26起着使第二多晶硅层图形23和第一多晶硅层27相互电连接的作用。
然后，利用第二多晶硅层图形23和金属硅化物膜26做掩模，腐蚀第一多晶硅层27和栅氧化膜22。于是，得到由第二多晶硅层图形23、金属硅化物膜26、已构图的第一多晶硅层27和绝缘膜图形28组成的栅电极29。尽管位于栅电极29下面的栅氧化膜22的厚度很薄，但它未被腐蚀，这是因为第一多晶硅层27起到了腐蚀阻挡膜的作用。
图13～16是解释一种根据本发明的实施例3形成MOSFET栅电极的方法。
根据本发明的该实施例，首先制备一块半导体基片31，如图13所示。在半导体基片31上层叠栅氧化膜32(和第一多晶硅层37)。在第一多晶硅层37上淀积厚50～500的绝缘膜。然后，在该绝缘膜上形成厚100～500的第二多晶硅层。之后，进行栅构图工艺步骤，以使第二多晶硅层，绝缘膜和第一多晶硅层构成图形，因而形成第二多晶硅层图形33和绝缘膜图形38。随后，在所得结构的整个裸露表面上淀积100～1000的金属膜35。
随后，进行退火工艺步骤，以使金属膜35能同与之接触的第二多晶硅层图形33和第一多晶硅层37反应，而形成金属硅化物膜36，如图14所示。
然后，各向异性腐蚀金属硅化物膜36，因而在第二多晶硅层图形33的各侧壁上分别形成金属硅化物侧壁36′，如图15所示。于是，得到由第二多晶硅层图形33、金属硅化物侧壁36′、已构图的第一多晶硅层37和已构图的绝缘膜38组成的栅电极39。
图16是表示利用第二多晶硅层图形33、金属硅化物侧壁36′、已构图的第一多晶硅层37和已构图的绝缘膜图形38作为掩模的栅氧化膜32的腐蚀情况的剖面图。尽管，位于栅电极39的下面的栅氧化膜32的厚度很薄，但它未被腐蚀，这是因为第一多晶硅层37起到了腐蚀阻挡膜的作用。使栅氧化膜不能被腐蚀。
由以上描述可见，本发明提供一种制造MOSFET的方法，其中的一层多晶硅层被淀积在栅绝缘膜上，起到了使MOSFET的栅同MOSFET的基片绝缘的作用。当利用金属膜或金属硅化物膜侧壁做掩模形成栅电极时，该多晶硅层起到了防止栅氧化膜被腐蚀的作用，所以，可以防止MOSFET的半导体基片和栅电极之间出现短路，因而达到了对半导体器件可靠性的改善。
虽然，为了解释之目的，公开了本发明的优选实施例，但本领域的技术人员应当明了，本发明可以有不脱离所附权利要求书公开的精神和范畴的各式各样的改型、添加和替代。

Claims (19)

1.一种制造金属氧化物硅场效应晶体管的方法，包括以下各步骤：
在一块半导体基片上依次层叠栅氧化膜、第一多晶硅层、绝缘膜、第二多晶硅层，部分腐蚀第二多晶硅层，而形成第二多晶硅层图形；
在利用第二多晶硅层图形作掩模，在部分腐蚀第一多晶硅层之后所得结构上形成绝缘膜图形；
在绝缘膜图形形成之后所得结构上淀积电极金属膜；
各向异性腐蚀金属膜，因而在第二多晶硅层图形两侧壁上分别形成金属膜侧壁；以及
利用第二多晶硅层图形和金属膜侧壁作掩模腐蚀第一多晶硅层而形成栅。
2.根据权利要求1的方法，其中，当腐蚀栅氧化膜时，它的位于栅下面的那一部分未被腐蚀。
3.根据权利要求1的方法，其中的金属膜选自由W、Ta、Ti、Mo、Pt、Ni和Co组成的集合。
4.根据权利要求1的方法，其中的金属膜厚100～1000。
5.根据权利要求1的方法，其中的第一多晶硅层厚100～500。
6.根据权利要求1的方法，其中的绝缘膜厚50～500。
7.一种制造金属氧化物硅场效应晶体管的方法，包括以下各步骤：
在一块半导体基片上依次层叠栅氧化膜、第一多晶硅层、绝缘膜、第二多晶硅层并根据栅构图工艺使第二多晶硅层和绝缘膜构成图形，因而形成第二多晶硅层图形和绝缘膜图形，然后在所得结构上形成金属膜；
各向异性腐蚀金属膜，因而在第二多晶硅层图形的两侧壁上分别形成金属膜侧壁；
使金属膜退火，因而使金属膜同与之接触的第二多晶硅层图形和第一多晶硅层反应，而形成金属硅化物膜；以及
利用第二多晶硅层图形和金属硅化物膜作掩模，腐蚀第一多晶硅层和栅氧化膜，因而形成具有由第二多晶硅层图形、金属硅化物膜、第一多晶硅层图形和绝缘膜图形构成的多硅化物结构的栅。
8.根据权利要求7的方法，其中，当腐蚀栅氧化膜时，甚至当栅氧化膜的厚度很薄时，借助于起到腐蚀阻挡膜作用的第一多晶硅层，也不腐蚀位于栅下面的那一部分栅氧化膜。
9.根据权利要求7的方法，其中的金属膜选自由W、Ta、Ti、Mo、Pt、Ni和Co组成的集合。
10.根据权利要求7的方法，其中的金属膜厚100～1000。
11.根据权利要求7的方法，其中的第一多晶硅层厚100～500。
12.根据权利要求7的方法，其中的绝缘膜厚50～500。
13.一种制造金属氧化物硅场效应晶体管的方法，包括以下各步骤：在一块半导体基片上依次层叠栅氧化膜、第一多晶硅层、绝缘膜、第二多晶硅层并根据栅构图工艺使第二多晶硅层和绝缘膜构成图形，因而形成第二多晶硅层图形和绝缘膜图形，然后在所得结构上形成金属膜；
使金属膜退火，因而使金属膜同与之接触的第二多晶硅层图形和第一多晶硅层反应，因而当使第一多晶硅层构图时，形成金属硅化物膜；以及
各向异性腐蚀金属硅化物膜，因而在第二多晶硅层图形的两侧壁分别形成金属硅化物膜侧壁，因而形成具有由第二多晶硅层图形、金属硅化物侧壁、第一多晶硅层图形和绝缘膜图形构成的多硅化物结构的栅。
14.根据权利要求13的方法，还包括在栅形成后的腐蚀栅氧化膜的步骤
15.根据权利要求13的方法，其中，当腐蚀栅氧化膜时，甚至当栅氧化膜的厚度很薄时，借助于起到腐蚀阻挡膜作用的第一多晶硅层，也不腐蚀位于栅下面的那一部分栅氧化膜。
16.根据权利要求13的方法，其中的金属膜选自由W、Ta、Ti、Mo、Pt、Ni和Co组成的集合。
17.根据权利要求13的方法，其中的金属膜厚100～1000。
18.根据权利要求13的方法，其中的第一多晶硅层厚100～500。
19.根据权利要求13的方法，其中的绝缘膜厚50～500。
CN96106872A 1995-06-30 1996-06-27 制造金属氧化物场效应晶体管的方法 Expired - Fee Related CN1076870C (zh)

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