CN1183593C - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN1183593C
CN1183593C CNB011357932A CN01135793A CN1183593C CN 1183593 C CN1183593 C CN 1183593C CN B011357932 A CNB011357932 A CN B011357932A CN 01135793 A CN01135793 A CN 01135793A CN 1183593 C CN1183593 C CN 1183593C
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Prior art keywords
semiconductor
mentioned
semiconductor chip
semiconductor device
contact zone
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CN1368761A (zh
Inventor
石井秀基
道井一成
柴田润
中岛盛义
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

本发明的半导体装置备有第一半导体组件(7)和安装在该第一半导体组件(7)上的第二半导体组件(8)。第一半导体组件(7)的表面上有第二半导体组件安装用接触区(6)，背面上有与安装基板连接用的外部连接用接触区(12)。第二半导体组件(8)有与第二半导体组件安装用接触区(6)连接的外部引线(10)。

Description

半导体装置
技术领域
本发明涉及有多个半导体组件的半导体装置。
背景技术
例如在特开平10-116963号中公开了有多个半导体组件的半导体装置的一例。在图13中示出了该公报中记载的半导体装置。
如图13所示，半导体装置有重叠安装在安装基板15上的第一及第二半导体组件22、23。第一及第二半导体组件22、23分别有半导体芯片(图中未示出)及外部引线24、25，通过外部引线24、25与设置在安装基板15上的接触区连接。
这样在上述公报记载的发明中，第一及第二半导体组件22、23都直接安装在安装基板15上，将位于上方的第二半导体组件23安装在位于下方的第一半导体组件22上这一点在上述公报中未全部公开。就是说，在上述公报中未全部公开将半导体组件安装在半导体组件上的想法。
由于如上所述将第一及第二半导体组件22、23都通过外部引线24、25直接安装在安装基板15上，所以存在以下问题。
如图13所示，由于位于下侧的第一半导体组件22的外部引线24向外伸出，所以为了该外部引线24而需要确保宽度d。就是说，为了该外部引线24，第一半导体组件22的尺寸沿宽度方向增大。
另外，由于外部引线24而使第一半导体组件22的树脂部从安装基板15向上隆起，所以需要图13所示的厚度t，结果第一半导体组件22的尺寸沿高度方向增大。
另一方面，由于第二半导体组件23的外部引线25也与安装基板15连接，所以需要将该外部引线25配置在第一半导体组件22的外部引线24的外侧。因此，第二半导体组件23的宽度比第一半导体组件22的宽度还大。
如上所述第一半导体组件22的尺寸变大，而第二半导体组件23的尺寸变得比第一半导体组件22还大，所以其结果存在半导体装置的尺寸沿半导体装置的宽度方向(水平方向)和高度方向(垂直方向)这样两个方向增大的问题。
发明内容
本发明就是为了解决上述的课题而完成的。本发明的目的在于使具有多个半导体组件的半导体装置小型化。
本发明的半导体装置备有：在表面上有第一接触区和在背面上有与安装基板连接用的第二接触区的第一半导体组件；以及安装在第一半导体组件上、有与第一接触区连接的外部导体部的第二半导体组件。
如上所述由于将第二接触区设置在第一半导体组件的背面上，所以在第一半导体组件上不设置外部引线，就能将第一半导体组件安装在安装基板上。因此，能使第一半导体组件的尺寸沿宽度方向(水平方向)和高度方向(垂直方向)这样两个方向缩小。另外由于第二半导体组件安装在第一半导体组件上，所以不需要使第二半导体组件的宽度比第一半导体组件的宽度大，另外还能降低第二半导体组件的高度。因此，也能使第二半导体组件的尺寸沿宽度方向和高度方向这样两个方向缩小。
上述第一接触区最好配置在第一半导体组件的周边部上。因此，能容易地进行第二半导体组件向第一半导体组件上的安装。
第一半导体组件有第一半导体芯片；封装该第一半导体芯片的树脂部(封装部)；以及承载该树脂部、由该树脂部向外侧伸出的基板部，第一接触区配置在基板部上由树脂部向外侧伸出的部分上。另一方面，第二半导体组件有第二半导体芯片。
由于将上述这样的基板部设置在第一半导体组件上，所以在该基板部上能将第一接触区配置在向树脂部外侧伸出的周边部上。由于这样将第一接触区配置在基板部上，所以能容易地进行第一接触区的成形。另外，由于设置上述的基板部，所以能将第二接触区(外部连接用端子)呈阵列状地配置在基板部的全部背面上，半导体装置的小型化及多引脚化成为可能。
在上述基板部上，最好导电性地连接第一和第二半导体组件。因此，能使第一和第二半导体组件的第二接触区(外部连接用端子)公用，能减少半导体装置的外部连接用端子个数。
在上述基板部上设有通过导线与第一半导体芯片导电性地连接的第三接触区，树脂部最好到达基板部，同时覆盖导线及第三接触区。
由于这样在基板部上直接形成树脂部，所以能降低第一半导体组件的高度。另外，由于采用上述的结构，所以不需要在基板部上设置伸出到树脂部的外部的导体部。
上述基板部也可以有凹部。在此情况下，最好将树脂部配置在凹部内。因此，能避免树脂部在基板部上突出，能更容易地进行第二半导体组件向第一半导体组件的安装。
第二半导体组件有安装第二半导体芯片的垫片、以及封装第二半导体芯片的封装树脂(封装部)，外部导体部包括从封装树脂的侧面伸出的外部引线，外部引线最好向第一半导体组件的方向弯曲。
由于这样使外部引线向第一半导体组件的方向弯曲，所以在上述基板部上即使在第一半导体组件的树脂部突出的情况下，也能容易地将第二半导体组件安装在第一半导体组件上。
上述第一半导体芯片包含逻辑装置，第二半导体芯片包含存储装置。
因此，不需要将例如包含逻辑装置的逻辑IC(IntegratedCircuit)和包含存储装置的存储器IC安装在一个芯片上，能缩短开发时间，同时能避免芯片尺寸的制约。
也可以将第二半导体芯片安装在上述垫片上，将第三半导体芯片重叠在第二半导体芯片上。在此情况下，最好使垫片在封装树脂的表面上露出。
另外，也可以将第二半导体芯片安装在上述的垫片上侧，将第三半导体芯片安装在垫片下侧。另外，也可以将第四半导体芯片重叠在第一半导体芯片上。
这样由于第一和第二半导体组件中的至少一者有多个半导体芯片，所以能谋求半导体装置的高功能化。另外，在使垫片在封装树脂的表面上露出的情况下，能使第二半导体组件的厚度薄。另外，在将半导体芯片分别配置在垫片的表面和背面的情况下，还能避免芯片尺寸的制约。
也可以在上述第二接触区上形成外部连接用的焊锡凸点。因此，通过焊珠等焊锡凸点，能将第一半导体组件安装在安装基板上。
附图说明：
图1是本发明的实施形态1的半导体装置的平面图。
图2是图1所示的半导体装置的侧视图。
图3是将图1所示的第一半导体组件中的树脂部(封装部)除外的部分的平面图。
图4是图1所示的半导体装置的仰视图。
图5是图1所示的半导体装置的剖面图。
图6是表示将图1所示的半导体装置安装在安装基板上的状态的侧视图。
图7是第二半导体组件的外部引线和第一半导体组件的接触区的接触部的放大图。
图8是表示第一半导体组件中的基板部的内部结构例的剖面图。
图9是本发明的实施形态2的半导体装置的剖面图。
图10是本发明的实施形态3的半导体装置的剖面图。
图11是本发明的实施形态4的半导体装置的剖面图。
图12是本发明的实施形态5的半导体装置的剖面图。
图13是表示现有的半导体装置之一例的侧视图。
以下，用图1～图12说明本发明的实施形态。
发明的具体实施方式
(实施形态1)
图1是本发明的实施形态1的半导体装置的平面图，图2是实施形态1的半导体装置的侧视图，图3是将树脂部除外的第一半导体组件的平面图，图4是本实施形态1的半导体装置的仰视图，图5是本实施形态1的半导体装置的剖面图，图6是表示将本实施形态1的半导体装置安装在安装基板上的状态的侧视图。
如图1及图2所示，本实施形态1的半导体装置备有第一半导体组件7、以及安装在该第一半导体组件7上的第二半导体组件8。半导体装置的整体厚度例如为1.0mm～1.2mm左右，第一及第二半导体组件7、8的厚度例如为500微米～600微米左右。
如图1至图4所示，位于下方的第一半导体组件7有半导体芯片1a、基板部4、导线连接用接触区(第三接触区)5、第二半导体组件安装用接触区(第一接触区)6、树脂部(封装部)9、焊珠(焊锡凸点)11、以及外部连接用接触区(第二接触区)12。
如图1及图2所示，基板部4向树脂部9外侧伸出，例如由环氧玻璃等构成，厚度为100微米至200微米左右。基板部4的厚度例如为半导体装置的整体厚度的10％～20％，为第一半导体组件7的厚度的15％～30％左右。因此，能确保基板部4所必要的强度。
如图3所示，在基板部4的表面上形成导线连接用接触区5和第二半导体组件连接用接触区6，如图2所示，在基板部4的背面上形成外部连接用接触区12。
如图3所示，导线连接用接触区5配置在第一半导体芯片1a的周围，以便包围第一半导体芯片1a，例如由Cu等金属层(导电层)构成。
在第一半导体芯片1a的周边部上形成焊接区3，通过由金等构成的导线2，使该焊接区3与导线连接用接触区5连接。
树脂部9由环氧树脂等热硬化性树脂构成，封装第一半导体芯片1a，覆盖第一半导体芯片1a、导线2及导线连接用接触区5，到达基板部4。
由于这样在基板部4上直接形成树脂部9，所以如图2所示，不需要从树脂部9的侧面向基板部4形成导体部，能使第一半导体组件7沿宽度方向缩小。另外，与具有外部引线的现有例的情况相比，还能降低第一半导体组件7的高度。
因此，能使第一半导体组件7沿宽度方向和高度方向这样两个方向缩小。由于将第二半导体组件8安装在该第一半导体组件7上，所以没有必要使第二半导体组件8的宽度比第一半导体组件7的宽度大，结果还能缩小第二半导体组件8的尺寸。其结果，能使半导体装置的尺寸小型化(本发明的效果1)。
如图1至图3所示，第二半导体组件安装用接触区6配置在第一半导体组件7的周边部上，例如用Cu等金属层构成。更详细地说，第二半导体组件安装用接触区6配置在向树脂部9的外侧伸出的基板部4的周边部上。
因此，不仅能容易地进行第二半导体组件安装用接触区6的形成，而且能容易地进行第二半导体组件8向第一半导体组件7的安装(本发明的效果2)。
在基板部4的背面形成外部连接用接触区12，例如用Cu等金属层构成。最好在基板部4的全部背面上呈矩阵状地形成该外部连接用接触区12。由于设置这样的外部连接用接触区12，所以半导体装置的小型化及多引脚化成为可能(本发明的效果3)。
如图2所示，在外部连接用接触区12上形成焊珠11。因此，如图4所示，焊珠11也在基板部4的全部背面上呈网络状地形成。
另外，能省略焊珠11。由于省略焊珠11，所以能使半导体装置更薄。
其次，用图5、图7及图8，说明本实施形态的半导体装置的断面结构。
如图5所示，通过粘接材料14将第一半导体芯片1a置于第一半导体组件7的基板部4上，用树脂部9封装第一半导体芯片1a。
第二半导体组件8有第二半导体芯片1b、安装第二半导体芯片1b的垫片13、封装第二半导体芯片1b的封装树脂、以及从封装树脂的侧面伸出的外部引线10。
第二半导体芯片1b通过粘接材料14安装在垫片13上，外部引线10向第一半导体组件7的方向弯曲。
由于这样使外部引线10向第一半导体组件7的方向弯曲，所以如图5所示，在基板部4上，即使在第一半导体组件7的树脂部9突出的情况下，也能容易地将第二半导体组件8安装在第一半导体组件7上(本发明的效果4)。另外，也可以将外部引线10以外的外部导体部设置在第二半导体组件8上。
图5所示的第一半导体芯片1a是含有逻辑装置的逻辑IC，第二半导体芯片1b是含有存储装置的存储器IC。
由于这样将多个半导体芯片置于一个半导体装置上，所以能谋求半导体装置的高功能化(本发明的效果5)。另外，通过将逻辑IC和存储器IC置于另一半导体组件上，不需要使它们一个芯片化，能缩短开发时间(本发明的效果6)。另外，如图5所示，由于不重叠半导体芯片，所以能避免芯片尺寸的制约(本发明的效果7)。
图7表示第二半导体组件8的外部引线10和第二半导体组件安装用接触区6的连接部的结构例。如图7所示，外部引线10和第二半导体组件安装用接触区6通过例如焊锡层(导电层)17连接。该焊锡层17能通过电镀、用调合器进行涂敷等方法来形成。
为了将第二半导体组件8安装在第一半导体组件7上，可以用上述的方法预先在第二半导体组件安装用接触区6形成焊锡层17，将第二半导体组件8置于第二半导体组件安装用接触区6上，使焊锡层17在该状态下熔融。
图8表示基板部4的放大剖面图。如图8所示，在基板部4上设通孔18，在该通孔18形成导电层(通孔布线)19。然后，利用导电层19连接第二半导体组件安装用接触区6和外部连接用接触区12。另外，在基板部4的表面上形成连接第二半导体组件安装用接触区6和导线连接用接触区5用的布线20。
因此，在基板部4上，能导电性地连接第一和第二半导体组件7、8，能使第一和第二半导体组件7、8的外部连接用接触区12公用化。其结果，能减少半导体装置的外部连接用端子的个数(本发明的效果8)。
图6中示出了将具有上述结构的本发明的半导体装置安装在安装基板15上的状态。
如图6所示，通过焊珠11等导电材料，连接安装基板15上的安装用接触区16和外部连接用接触区12。因此，在第一半导体组件7上不设置外部引线，就能将第一半导体组件7安装在安装基板15上。
其次说明实施形态1的半导体装置的制造方法之一例。
制造本实施形态1的半导体装置时，首先在不同的工序中分别组装第一及第二半导体组件7、8。
组装半导体组件7时，在基板部4的表面和背面的规定位置形成导线连接用接触区5、第二半导体组件安装用接触区6及外部连接用接触区1，再在基板部4的表面及内部形成规定的布线。
然后，通过粘接层14将第一半导体芯片1a安装在基板部4的表面上，利用引线接合法，用导线2连接第一半导体芯片1a的焊接凸点3和导线连接用接触区5。
其次，用传输模法等封装技术，对第一半导体芯片1a及其周边进行树脂封装。由此，形成树脂部9。然后在第一半导体组件7组装后，进行电气测试。
另一方面，关于第二半导体组件8，通过粘接层14将第二半导体芯片1b安装在垫片13上，利用引线接合法，用导线2连接第二半导体芯片1b的焊接区和内部引线。
此后，用传输模法等封装技术，对第二半导体芯片1b进行树脂封装，对外部引线10进行弯曲加工。然后在第二半导体组件8组装后，进行电气测试。
如上所述对第一和第二半导体组件7、8分别进行了电气测试后，将第二半导体组件8安装在第一半导体组件7上。因此，能提高成品率，能降低加工费用(本发明的效果9)。
(实施形态2)
其次，用图9说明本发明的实施形态2。图9是表示本实施形态2的半导体装置的剖面图。
如图9所示，在本实施形态2中，通过粘接层14将作为存储器IC的第三半导体芯片1c重叠在作为存储器IC的第二半导体芯片1b上，在该第二半导体芯片1b上已经安装了SRAM(Static RandomAccess Memory)和EEPROM(Electrically Erasable andProgrammable Read Only Memory)等存储装置，省略了焊珠。另外，分别通过导线2将第二及第三半导体芯片1b、1c连接在内部引线上，使垫片13在第二半导体组件8的表面上露出。
关于除此以外的结构，与实施形态1基本上相同，所以重复说明从略。
如上所述，由于本实施形态2的半导体装置具有与实施形态1的半导体装置基本相同的结构，所以能获得本发明的效果1～4、6、8及9。
除此以外，本实施形态2的半导体装置由于安装了三个半导体芯片，所以能谋求半导体装置的进一步的高功能化(本发明的效果10)。
另外，由于将作为逻辑IC的第一半导体芯片1a收容在第一半导体组件7上，将作为存储器IC的第二及第三半导体芯片1b、1c收容在第二半导体组件8上，所以不需要改变第一半导体芯片1a，使其与第二及第三半导体芯片1b、1c的尺寸一致(本发明的效果11)。
另外，由于使垫片13在第二半导体组件8的表面上露出，所以能使第二半导体组件8的厚度薄，另外由于在外部连接用接触区12上不设置焊珠，所以也能使第一半导体组件7的厚度薄。因此，能使半导体装置的总体厚度薄(本发明的效果12)。
另外，关于实施形态2、后面所述的实施形态3及实施形态4的制造方法，由于只要将实施形态1的制造方法稍加改变即可，所以将它们的制造方法省略。
(实施形态3)
其次，用图10说明本发明的实施形态3。图10是表示本实施形态3的半导体装置的剖面图。
在实施形态3中，如图10所示，将上述的第二及第三半导体芯片(存储器IC)1b、1c安装在垫片13的表面及背面上，通过导线2将它们与内部引线连接。
另外在外部连接用接触区12上不设置焊珠。因此，能使半导体装置的厚度薄。关于除此以外的结构与实施形态1基本上相同，所以重复说明从略。
本实施形态3的半导体装置也具有与实施形态1的半导体装置基本上相同的结构，所以能获得本发明的效果1～4、6、8、9。另外，与实施形态2的情况相同，也能获得本发明的效果。
除此以外，由于在第二半导体组件8中，将半导体芯片安装在垫片13的上下，所以没有芯片尺寸的制约。因此，能没有尺寸制约地组装三个芯片(本发明的效果13)。
(实施形态4)
其次，用图11说明本发明的实施形态4。图11是表示本实施形态4的半导体装置的剖面图。
在实施形态4中，如图11所示，通过粘接材料14将第一半导体芯片(逻辑IC)1a和第四半导体芯片(周边IC)1d重叠在基板部4的表面上，通过粘接材料14将第二和第三半导体芯片(存储器IC)1b、1c重叠在垫片13上。
然后，通过导线2将第一及第四半导体芯片1a、1d与设置在基板部4上的导线连接用接触区连接，将第二和第三半导体芯片1b、1c与内部引线连接。另外在外部连接用接触区12上不设置焊珠。
另外，上述所谓的周边IC，是指具有串并联变换电路或更新电路之类的其他周边电路的IC芯片，通过将这样的芯片组装在半导体组件上，能取得系统的功能，存储器应用系统的高级化成为可能(本发明的效果14)。
关于除此以外的结构与实施形态1基本上相同，所以重复说明从略。
本实施形态4的半导体装置也具有与实施形态1的半导体装置基本上相同的结构，所以能获得本发明的效果1～4、6、8、9。
除此以外，本实施形态4的半导体装置由于安装4个半导体芯片，所以能谋求半导体装置的进一步的高功能化(本发明的效果15)。
另外，由于将两个半导体芯片分别安装在各半导体组件上，所以能使芯片尺寸的制约小(本发明的效果16)。
(实施形态6)
其次，用图12说明本发明的实施形态5。图12是表示本实施形态5的半导体装置的剖面图。
在实施形态5中，如图12所示，在基板部4的中央设有凹部21，使位于凹部21的周围的基板部4的周边部的厚度比凹部21正下方的基板部4的厚度厚。对基板部4进行例如锪孔加工，能形成凹部21。
然后，将第一半导体芯片1a安装在上述凹部21上，对第一半导体芯片1a进行树脂封装，在凹部21内形成树脂部9。在凹部21的底面上形成导线连接用接触区5，利用导线2将第一半导体芯片1a与导线连接用接触区5连接。
树脂部9覆盖导线2及导线连接用接触区5，到达凹部21的底面上。另外，如图12所示，树脂部9的背面的高度最好与基板部4的周边部的高度大致相等。因此，能阻止树脂部9在基板部4上突出，能更容易地进行第二半导体组件8的安装(本发明的效果17)。
将第二半导体组件安装用接触区6配置在厚度大的基板部4的周边部上。因此，能提高第二半导体组件安装用接触区6下面的基板部4的强度，能提高第二半导体组件8安装后的可靠性。
另外在外部连接用接触区12上不设置焊珠。关于除此以外的结构与实施形态1基本上相同，所以重复说明从略。
本实施形态5的半导体装置也具有与实施形态1的半导体装置基本上相同的结构，所以能获得本发明的效果1～9。
除此以外，在本实施形态5的半导体装置中，由于基板部4的表面大致平坦，所以在将焊锡涂敷在第二半导体组件安装用接触区6上时，能采用筛网印刷法，能容易地进行焊锡的涂敷(本发明的效果18)。
本实施形态5的半导体装置的制造方法，如果将对基板部4进行锪孔加工、形成凹部21的工序除外，则基本上与实施形态1的情况相同。
虽然如上进行了本发明的实施形态的说明，但也可以将上述的各实施形态中记载的内容互相组合。
如果采用本发明，则由于能使第一和第二半导体组件沿宽度方向和高度方向两个方向缩小，所以也能使包含它们的半导体装置沿宽度方向和高度方向缩小。因此，能使备有多个半导体组件的半导体装置小型化。

Claims (12)

1.一种半导体装置，其特征在于备有：在基板部(4)的表面上有第一接触区(6)和在上述基板部(4)的背面上有与安装基板连接用的第二接触区(12)的第一半导体组件(7)；以及
安装在上述第一半导体组件上、有与上述第一接触区连接的外部导体部(10)的第二半导体组件(8)。
2.根据权利要求1所述的半导体装置，其特征在于：上述第一接触区配置在上述第一半导体组件的周边部上。
3.根据权利要求1所述的半导体装置，其特征在于：上述第一半导体组件有第一半导体芯片(1a)；封装该第一半导体芯片的树脂部(9)；以及承载该树脂部、由该树脂部向外侧伸出的上述基板部(4)，
上述第一接触区配置在基板部上由树脂部向外侧伸出的部分上，
上述第二半导体组件有第二半导体芯片(1b)。
4.根据权利要求3所述的半导体装置，其特征在于：在上述基板部上，导电性地连接第一和第二半导体组件。
5.根据权利要求3所述的半导体装置，其特征在于：在上述基板部上设有通过导线(2)与上述第一半导体芯片导电性地连接的第三接触区(5)，上述树脂部到达上述基板部同时覆盖上述导线及上述第3接触区。
6.根据权利要求3所述的半导体装置，其特征在于：上述基板部有凹部(21)，
将上述树脂部配置在上述凹部内。
7.根据权利要求3所述的半导体装置，其特征在于：上述第二半导体组件有安装上述第二半导体芯片的垫片(13)、以及封装上述第二半导体芯片的封装树脂(8)，
上述外部导体部(10)包括从上述封装树脂的侧面伸出的外部引线(10)，
上述外部引线向上述第一半导体组件的方向弯曲。
8.根据权利要求3所述的半导体装置，其特征在于：上述第一半导体芯片包含逻辑装置，
上述第二半导体芯片包含存储装置。
9.根据权利要求7所述的半导体装置，其特征在于：将上述第二半导体芯片安装在上述垫片上，将第三半导体芯片(1c)重叠在上述第二半导体芯片上，
上述垫片在上述封装树脂的表面上露出。
10.根据权利要求7所述的半导体装置，其特征在于：将上述第二半导体芯片安装在上述的垫片上侧，将第三半导体芯片(1c)安装在上述垫片下侧。
11.根据权利要求3所述的半导体装置，其特征在于：将第四半导体芯片(1d)叠放在上述第一半导体芯片上。
12.根据权利要求1所述的半导体装置，其特征在于：在上述第二接触区上形成外部连接用的焊锡凸点(11)。
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