CN1278678A

CN1278678A - Satellite clock time system transmitted as carrier in low-voltage electric distribution network

Info

Publication number: CN1278678A
Application number: CN 00115938
Authority: CN
Inventors: 王元虎
Original assignee: Individual
Current assignee: Individual
Priority date: 2000-08-04
Filing date: 2000-08-04
Publication date: 2001-01-03
Anticipated expiration: 2020-08-04
Also published as: CN1140065C

Abstract

The present invention relates to a system for transferring satellite clock time by utilizing low-voltage distribution netwook carrier, which is characterized by that it adopts the principle of that power line carrier can implement signal transmission, modulates the digital time signal of satellite clock on the carrier signal, and couples it on the distribution network of low-voltage side of distribution transformer, and utilizes coupling and demodutation to make any user using electricity on said distribution metwork can utilize special-made user clock to directly obtain accurate satellite clock time from power lin.

Description

Utilize satellite clock time system transmitted as carrier in low-voltage electric distribution network

The present invention relates to a kind of satellite clock time system transmitted as carrier in low-voltage electric distribution network that utilizes.

Up to now, civilian clock all is when independently walking, and no matter is electronic clock or mechanical clock, and accumulated error is all arranged, and needs manual calibration.

At present, the time signal that is provided by GPS of USA GPS (Global Position System) and Russian GLONASS GPS (Global Position System) has very high precision, with the synchronous error of the UTC of coordinate universal time less than 1 microsecond, there is not accumulated error, and signal uninterruptedly, is not limited by the region, therefore, be used widely in fields such as military affairs, communication, the energy.If directly adopt satellite receiver design normal domestic clock, cost an arm and a leg on the one hand (even the most cheap GPS receiver is also about 1000 yuan), market is difficult to accept, on the other hand, because the satellite receiver antenna need be installed in openr place, and antenna length is restricted, and causes difficulty to normal domestic.

Power line carrier realizes signal transmission system, is a kind of means of communication that extensively adopts in electric power system, mainly is used in high pressure and the supergrid, realizes the communication and the control of electrical network.The main feature of this method is to utilize existing transmission line, has saved the investment of setting up dedicated communication line, and simultaneously, transmission line also has the intensity height, the characteristics of distance, so not only economy but also reliable of power line carrier communication.The power line carrier communication method realizes that in low-voltage network the signal transmission also has application, is studying the automatic data logging that is applied to realize user's electric energy meter at present.Do not see as yet up to now the method that adopts the transmission of low-voltage distribution wire carrier wave realization time is arranged.

The objective of the invention is at above-mentioned situation, aim to provide a kind of satellite clock time system transmitted as carrier in low-voltage electric distribution network that utilizes, make common user among the people obtain precise time (year, month, day, week, time, minute, second) at an easy rate by special user clock facility.

The implementation of the object of the invention is, utilize satellite clock time system transmitted as carrier in low-voltage electric distribution network, comprise the user clock (secondary clock) of satellite clock (master clock), low-voltage network, the detection conciliation of band time signal and the Presentation Function of modulation of band time signal and transtation mission circuit as signal vehicle.

From 10 pin outgoing carrier signals, it is online to send to low-voltage distribution through isolating transformer B1 and coupling capacitor C3, C4 again through modulation for 17 pin of the time data of satellite clock output termination IC1 (AT9301), time data.The online carrier signal of low-voltage distribution is through coupling capacitor C13, C14 and isolating transformer B2, enter from 10 pin of IC2 (AT9301), upon mediation is from 12 pin output time data-signals, the RXD termination of 89C2051 CPU is collected mail number, the TXD end goes out the time figure of encoding through CPU to 1,2 human hair combing wastes of the lowest order chip of display driver chip group 74LS164,13 pin of 74LS164 are successively to 1,2 pin of high chip displacement delivery time numeral, 10 pin of CPU provide the numerical shift signal to 9 pin of all 74LS164, show that by number LED demonstrates the time.

The present invention is described in detail in detail with reference to the accompanying drawings.

Fig. 1 system principle diagram of the present invention

The modulation of Fig. 2 satellite clock (master clock) and coupling electrical schematic diagram

Fig. 3 user clock (secondary clock) and coupling and conciliation electrical schematic diagram

With reference to Fig. 1, a satellite clock (master clock) is by to time signal modulation and to be coupled to low-voltage distribution online, and the Any user on this power distribution network all can be by user clock (secondary clock) acquisition time of band coupling and demodulator circuit.

With reference to Fig. 2, IC1 (AT9301) is a kind of power line carrier special chip, as long as be equipped with simple peripheral circuit, can realize the transmission of low-voltage network carrier data.1,2 pin connect internal oscillator electricity

consumption container C

1,3,4 pin serial connection R1, C5 is as inner phase-locked loop loop filter, 5 pin connect high level, make chip be in emission state, 6 pin connect offset

compensation capacitor C

6,7 pin are connected in series R3 over the ground, C9 forms automatic electric-level control in the sheet, keeps output amplifier stable, and 8,9 pin can external where necessary power amplifier, the 10th, the carrier signal output, 13 pin meet extraneous impulsive noise filter capacitor C7, and 14 pin connect power supply ground, and 15 pin meet power supply+15V, the external limit filtration capacitor C 8 of 16 pin, 17 pin are data input pin, connect the data output end of satellite clock, and 18 pin meet adjustable resistance R4 and adjust the internal oscillator frequency of oscillation.Send on the power distribution network through isolating transformer B1 and coupling capacitor C3, C4 from the carrier signal of 10 pin output.Inductance L 1, L2 suppress the High-frequency Interference on the electrical network.R2 is a current-limiting resistance, and C2 plays the carrier signal tunning effect, and C10 is a decoupling capacitance, and D is the voltage-stabiliser tube that shields.

With reference to Fig. 3, signal coupling circuit and Fig. 2 are identical, IC2 (AT9301) is basic identical with the connection among Fig. 2, but because its effect is to receive the carrier frequency time signal on the power distribution network and be demodulated into digit time signal, therefore, it is its 5 pin ground connection that some districts are also arranged on the connection, make chip be in accepting state, 10 pin are the carrier signal input, 12 pin are the digital signal output end of demodulation, connect the signal input part of user clock display control circuit, working power is through R7, R8 is concatenated into output 12 pin and through the inside voltage stabilizing (5.6V) of 11 pin, draws level for output provides.User clock shows that control is realized by 89C2051 CPU, its RXD termination is received digit time signal, the TXD end is crossed the time figure of CPU coding to 1, the 2 human hair combing waste warp let-offs of the lowest order chip of display driver chip group 74LS164,13 pin of 74LS164 are according to this to 1,2 pin of high chip displacement delivery time numeral, provide the numerical shift signal by the p1.0 pin of CPU to 9 pin of all 74LS164.Show that by number LED demonstrates the time (year, month, day, week, time, minute, second) at last.Wherein, year: 4, month: 2, day: 2, week: 1, the time: 2, divide: 2, second: 2, totally 15.The conventional auxiliary circuit of CPU omits in the drawings.

Modulation and demodulation chip IC 1, IC2 among Fig. 2, Fig. 3 also can adopt LM1893, M711.

The present invention adopts satellite clock as master clock, and civilian relatively clock does not have accumulated error, the time precision height of secondary clock, and have calendar, and not needing manual calibration, this also meets the more and more stronger trend of concept of time of people in the social development.

Claims

1, utilize satellite clock time system transmitted as carrier in low-voltage electric distribution network, the satellite clock (master clock) that comprises modulation of band time signal and transtation mission circuit, low-voltage network as signal vehicle, the band time signal detects the user clock (secondary clock) of conciliation and Presentation Function, 17 pin of the time data output termination IC1 (AT9301) of satellite clock, time data is through modulating from 10 pin outgoing carrier signals, again through isolating transformer B1 and coupling capacitor C3, it is online that C4 sends to low-voltage distribution, the online carrier signal of low-voltage distribution is through coupling capacitor C13, C14 and isolating transformer B2, enter from 10 pin of IC2 (AT9301), upon mediation is from 12 pin output time data-signals, the RXD termination of 89C2051 CPU is collected mail number, TXD holds to 1 of the minimum chip of display driver chip group 74LS164,2 human hair combing wastes go out the time figure through the CPU coding, 13 pin of 74LS164 are successively to 1 of a high chip, 2 pin displacement delivery time numeral, 10 pin of CPU provide the numerical shift signal to 9 pin of all 74LS164, show that by number LED demonstrates the time.

2, time system according to claim 1 is characterized in that modulation and demodulation chip IC 1, IC2 also can adopt LM1893, M711.