CN1295707C - Magnetic storage device with magnetic shielding layer and mfg. method thereof - Google Patents

Magnetic storage device with magnetic shielding layer and mfg. method thereof Download PDF

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Publication number
CN1295707C
CN1295707C CNB021570132A CN02157013A CN1295707C CN 1295707 C CN1295707 C CN 1295707C CN B021570132 A CNB021570132 A CN B021570132A CN 02157013 A CN02157013 A CN 02157013A CN 1295707 C CN1295707 C CN 1295707C
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layer
line layer
line
magnetosphere
memory element
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CN1427414A (en
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细谷启司
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Toshiba Corp
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Toshiba Corp
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
    • G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H10B61/10—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having two electrodes, e.g. diodes or MIM elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H10B61/20—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
    • H10B61/22—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type

Abstract

A magnetic memory device includes a first wiring layer which runs in the first direction, a memory element which is arranged above the first wiring layer, second wiring layers which are arranged on the memory element and run in a second direction different from the first direction, and a first magnetic shield layer which is formed on the side surface of each second wiring layer and formed around the side surface of the memory element.

Description

Magnetic memory device and manufacture method thereof with magnetic masking layer
The application is based on the No.2001-384793 of Japanese patent application formerly that applies in November 18 calendar year 2001 and required its preference, should here be cited as a reference at the full text of first to file.
Technical field
The present invention relates to a kind of magnetic memory device and manufacture method thereof, more particularly, relate to a kind of like this magnetic memory device and manufacture method thereof, this device writes each by current field, and the corresponding resistance variations of magnetized state of a response and a unit is read the information of " 1 " or " 0 ".
Background technology
Recently proposed to have utilized the MRAM (magnetic RAM) of magnetoresistance effect as memory element.MRAM is characterised in that, for data being write in the storage unit, adopts current field to change the direction of magnetization of ferromagnetic material.In MRAM, adopt the MTJ (MTJ, Magnetic Tunneling Junction) of TMR (tunnel magnetoresistance, Tunneling Magneto Resistive) effect can extract the information of " 1 " or " 0 " in response to the variation of resistance value.MR (magnetoresistance) as this MTJ element of the resistance difference between " 1 " and " 0 " reaches 50% than almost, and this has just greatly promoted the practical application of MRAM.
But, must provide enough big write current to printing circuit in order to produce the current field of writing information in such as the storage unit of MTJ element having magnetoresistance element.At present, write current reaches the every about several mA-10mA of printing circuit.Further dwindle the distance that has shortened between the magnetoresistance element on the feature dimension.This just means that the generation of big write current can influence near unit, selected unit.
A kind of technology that addresses this problem is " magnetic shielding ".According to this technology, have only current field circuit or current field circuit and magnetoresistance element both to be coated with magnetic part.The magnetic field concentration that will be produced by the current field circuit by the effect identical with yoke is on selected unit.Just information can be write in the selected unit by less write current like this.
In Japanese Patent Application Publication No.11-238377, disclosed a known example of this technology.In this embodiment, shown in Figure 61, element isolating oxide film 72 optionally is formed at semiconductor-based the end 71.MOSFET73 optionally is formed between the element isolating oxide film 72.The source of MOSFET73 by contact 74,76 with 78 and first, second be connected with GMR (giant magnetoresistance) element 80 with tertiary circuit layer 75,77,79.Be used for by current field the word line up and down 81 of GMR element 80 writing informations and 82 and this GMR element 80 be formed on the above and below of this GMR element 80 spaced apartly.The magnetic masking layer of being made by non-conductive Ferrite Material 83 forms as passivation film, and this film is covered with the whole surface of memory cell array.
Prior art can shield the stray magnetic field of magnetic masking layer 83 outsides by non-conductive Ferrite Material.The prior art can also will accumulate on the magnetosphere as the GMR element of recording section by writing magnetic fields that wiring 81 and 82 produces.
But effect was relatively poor aspect the caused mistake in magnetic field of leaking between the adjacent cells of the prior art in preventing undersized magnetic store was write.The prior art will be accumulated on the magnetic part by the magnetic field that the current field circuit produces unsatisfactorily.
Summary of the invention
Magnetic memory device according to a first aspect of the invention, a plurality of second line layers that it comprises first line layer, the memory element that is arranged on described first line layer top that extend along first direction, be arranged on the described memory element and extend along the second direction different with described first direction, and be formed on first screen layer on the side of the side of each second line layer and memory element.
According to the magnetic memory device manufacture method of second aspect present invention, it may further comprise the steps: form first line layer that extends along first direction; Above described first line layer, optionally form memory element; Form first insulation course round described memory element; On described first insulation course and memory element, form second line layer that extends along the second direction different with described first direction; Remove the part that is not covered of first insulation course by second line layer as mask with described second line layer; And on described second line layer, form first screen layer.
According to a third aspect of the invention we, provide a kind of magnetic memory device manufacture method, it comprises: form first line layer that extends along first direction; Above first line layer, form the straight memory element that extends along first direction; Around memory element, form first insulation course; On described first insulation course and memory element, form second line layer that extends along the second direction different with described first direction; Remove the part that does not cover second line layer of first insulation course and memory element with second line layer as mask, thereby described memory element is formed island; And on second line layer, form first screen layer.
Description of drawings
Figure 1A is the stereographic map according to the magnetic memory device of first embodiment of the invention;
The cut-open view of the magnetic memory device that Figure 1B cuts open for the IB-IB line in Figure 1A;
The cut-open view of the magnetic memory device that Fig. 1 C cuts open for the IC-IC line in Figure 1A;
Fig. 2 A and 2B are respectively the cut-open view of the MTJ element with single tunnel junction structure of each embodiment according to the present invention;
Fig. 3 A and 3B are respectively the cut-open view of the MTJ element with double tunnel junction structure of each embodiment according to the present invention;
Fig. 4 A is the stereographic map of a step of the magnetic memory device of manufacturing first embodiment of the invention;
The cut-open view of the magnetic recording device that Fig. 4 B cuts open for the IVB-IVB line in Fig. 4 A;
The cut-open view of the magnetic recording device that Fig. 4 C cuts open for the IVC-IVC line in Fig. 4 A;
Fig. 5 A is the stereographic map of the step after Fig. 4 A of the magnetic memory device of manufacturing first embodiment of the invention;
The cut-open view of the magnetic recording device that Fig. 5 B cuts open for the VB-VB line in Fig. 5 A;
The cut-open view of the magnetic recording device that Fig. 5 C cuts open for the VC-VC line in Fig. 5 A;
Fig. 6 A is the stereographic map of the step after Fig. 5 A of the magnetic memory device of manufacturing first embodiment of the invention;
The cut-open view of the magnetic recording device that Fig. 6 B cuts open for the VIB-VIB line in Fig. 6 A;
The cut-open view of the magnetic recording device that Fig. 6 C cuts open for the VIC-VIC line in Fig. 6 A;
Fig. 7 A is the stereographic map of the step after Fig. 6 A of the magnetic memory device of manufacturing first embodiment of the invention;
The cut-open view of the magnetic recording device that Fig. 7 B cuts open for the VIIB-VIIB line in Fig. 7 A;
The cut-open view of the magnetic recording device that Fig. 7 C cuts open for the VIIC-VIIC line in Fig. 7 A;
Fig. 8 A is the stereographic map of the step after Fig. 7 A of the magnetic memory device of manufacturing first embodiment of the invention;
The cut-open view of the magnetic recording device that Fig. 8 B cuts open for the VIIIB-VIIIB line in Fig. 8 A;
The cut-open view of the magnetic recording device that Fig. 8 C cuts open for the VIIIC-VIIIC line in Fig. 8 A;
Fig. 9 A is the stereographic map of the step after Fig. 8 A of the magnetic memory device of manufacturing first embodiment of the invention;
The cut-open view of the magnetic recording device that Fig. 9 B cuts open for the IXB-IXB line in Fig. 9 A;
The cut-open view of the magnetic recording device that Fig. 9 C cuts open for the IXC-IXC line in Fig. 9 A;
Figure 10 A is the stereographic map of the step after Fig. 9 A of the magnetic memory device of manufacturing first embodiment of the invention;
The cut-open view of the magnetic recording device that Figure 10 B cuts open for the XB-XB line in Figure 10 A;
Figure 11 A, 12A, 13A, 14A and 15A are the cut-open view of the direction of extending along first line layer of the step of the magnetic memory device of making second embodiment of the invention;
Figure 11 B, 12B, 13B, 14B and 15B are the cut-open view of the direction of extending along second line layer of the step of the magnetic memory device of making second embodiment of the invention;
Figure 16 A is the cut-open view of the direction of extending along first line layer according to the magnetic memory device of third embodiment of the invention;
Figure 16 B is the cut-open view of the direction of extending along second line layer according to the magnetic memory device of third embodiment of the invention;
Figure 17 A, 18A, 19A, 20A and 21A are the cut-open view of the direction of extending along first line layer of the step of the magnetic memory device of making third embodiment of the invention;
Figure 17 B, 18B, 19B, 20B and 21B are the cut-open view of the direction of extending along second line layer of the step of the magnetic memory device of making third embodiment of the invention;
Figure 22 A is the stereographic map according to the magnetic memory device of four embodiment of the invention;
The cut-open view of the magnetic memory device that Figure 22 B cuts open for the XXIIB-XXIIB line in Figure 22 A;
The cut-open view of the magnetic memory device that Figure 22 C cuts open for the XXIIC-XXIIC line in Figure 22 A;
Figure 23 A is the stereographic map according to the magnetic memory device of four embodiment of the invention;
The cut-open view of the magnetic memory device that Figure 23 B cuts open for the XXIIIB-XXIIIB line in Figure 23 A;
The cut-open view of the magnetic memory device that Figure 23 C cuts open for the XXIIIC-XXIIIC line in Figure 23 A;
Figure 24 A is the cut-open view of the direction of extending along first line layer according to the magnetic memory device of fifth embodiment of the invention;
Figure 24 B is the cut-open view of the direction of extending along second line layer according to the magnetic memory device of fifth embodiment of the invention;
Figure 25 A is the cut-open view of the direction of extending along first line layer of the step of the magnetic memory device of making fifth embodiment of the invention;
Figure 25 B is the cut-open view of the direction of extending along second line layer of the step of the magnetic memory device of making fifth embodiment of the invention;
Figure 26 A is the cut-open view of the direction of extending along first line layer according to the magnetic memory device of sixth embodiment of the invention;
Figure 26 B is the cut-open view of the direction of extending along second line layer according to the magnetic memory device of sixth embodiment of the invention;
Figure 27 A is the cut-open view of the direction of extending along first line layer of the step of the magnetic memory device of making sixth embodiment of the invention;
Figure 27 B is the cut-open view of the direction of extending along second line layer of the step of the magnetic memory device of making sixth embodiment of the invention;
Figure 28 is the cut-open view according to the magnetic memory device of seventh embodiment of the invention;
Figure 29 is the cut-open view of the step of manufacturing seventh embodiment of the invention;
Figure 30 A and 30B be seventh embodiment of the invention have the cut-open view of diode as the magnetic memory device of on-off element;
Figure 31 A and 31B be seventh embodiment of the invention have the cut-open view of MOSFET as the magnetic memory device of on-off element;
Figure 32 is the cut-open view according to the magnetic memory device of eighth embodiment of the invention;
Figure 33 is for making the cut-open view according to the step of eighth embodiment of the invention;
Figure 34 A and 34B be eighth embodiment of the invention have the cut-open view of diode as the magnetic memory device of on-off element;
Figure 35 A and 35B be eighth embodiment of the invention have the cut-open view of MOSFET as the magnetic memory device of on-off element;
Figure 36 is the cut-open view of the another kind of magnetic memory device of eighth embodiment of the invention, and wherein the magnetic masking layer of each second line layer separates;
Figure 37 A and 37B be eighth embodiment of the invention have the cut-open view of diode as the magnetic memory device of on-off element, wherein the magnetic masking layer of each second line layer separates;
Figure 38 A and 38B be eighth embodiment of the invention have the cut-open view of MOSFET as the magnetic memory device of on-off element, wherein the magnetic masking layer of each second line layer separates;
Figure 39 is the cut-open view according to the magnetic memory device of ninth embodiment of the invention;
Figure 40 is for making the cut-open view according to the step of ninth embodiment of the invention;
Figure 41 A and 41B be ninth embodiment of the invention have the cut-open view of diode as the magnetic memory device of on-off element;
Figure 42 A and 42B be ninth embodiment of the invention have the cut-open view of MOSFET as the magnetic memory device of on-off element;
Figure 43 is the cut-open view of the another kind of magnetic memory device of ninth embodiment of the invention, and wherein the magnetic masking layer of each second line layer separates;
Figure 44 A and 44B be ninth embodiment of the invention have the cut-open view of diode as the another kind of magnetic memory device of on-off element, wherein the magnetic masking layer of each second line layer separates;
Figure 45 A and 45B be ninth embodiment of the invention have the cut-open view of MOSFET as the another kind of magnetic memory device of on-off element, wherein the magnetic masking layer of each second line layer separates;
Figure 46 is the cut-open view of another magnetic memory device of ninth embodiment of the invention, wherein the magnetic masking layer of each second line layer be separately and be formed on above second line layer;
Figure 47 A and 47B for according to ninth embodiment of the invention have the cut-open view of diode as another magnetic memory device of on-off element, wherein the magnetic masking layer of each second line layer be separately and be formed on above second line layer;
Figure 48 A and 48B for according to ninth embodiment of the invention have the cut-open view of MOSFET as another magnetic memory device of on-off element, wherein the magnetic masking layer of each second line layer be separately and be formed on above second line layer;
Figure 49,50,51 and 52 is the stereographic map of manufacturing according to the step of the magnetic memory device of tenth embodiment of the invention;
Figure 53 A and 53B are the cut-open view without any the magnetic memory device of on-off element according to eleventh embodiment of the invention;
Figure 54 A and 54B are for having the cut-open view of diode as the magnetic memory device of on-off element according to eleventh embodiment of the invention;
Figure 55 A and 55B are for having the cut-open view of MOSFET as the magnetic memory device of on-off element according to eleventh embodiment of the invention;
Figure 56 A and 56B are the cut-open view without any the magnetic memory device of on-off element according to twelveth embodiment of the invention;
Figure 57 A and 57B are for having the cut-open view of diode as the magnetic memory device of on-off element according to twelveth embodiment of the invention;
Figure 58 A and 58B are for having the cut-open view of MOSFET as the magnetic memory device of on-off element according to twelveth embodiment of the invention;
Figure 59 and 60 is the cut-open view according to the magnetic memory device of thirteenth embodiment of the invention;
Figure 61 is the cut-open view of conventional magnetic memory part.
Embodiment
The preferred embodiments of the invention relate to a kind of magnetic memory device, and (MRAM: MAGNETIC RANDOM ACCESS MEMORY), this memory device has adopted MTJ (MTJ) element that has utilized TMR (tunnel magnetoresistance) effect as memory element.
Several views below with reference to accompanying drawings describe the preferred embodiments of the invention.In following instructions, identical Reference numeral is represented identical parts in institute's drawings attached.
[first embodiment]
In the first embodiment, above magnetic masking layer is formed near second line layer, thereby be covered with the MTJ element and second line layer.This embodiment is not used any on-off element.
Figure 1A is the stereographic map according to the magnetic memory device of first embodiment of the invention.The cut-open view of the magnetic memory device that Figure 1B cuts open for the IB-IB line in Figure 1A.The cut-open view of the magnetic memory device that Fig. 1 C cuts open for the IC-IC line in Figure 1A.To the structure according to the magnetic memory device of first embodiment be described below.
Shown in Figure 1A, 1B and 1C, in the magnetic memory device according to first embodiment, first and second line layers (wiring layer) 13 extend along different directions with 20.Each the MTJ element 18 that is electrically connected with corresponding first and second line layers 13 and 20 is set in place the node place between first and second line layers 13 and 20.Magnetic masking layer 21 forms the side of each MTJ element 18 of covering and the top and side of each second line layer 20.Magnetic masking layer 21 is formed on the second adjacent line layer 20 continuously.
MTJ element 18 equals the width of second line layer 20 along the width X of the direction of first line layer, 13 extensions.The direction that MTJ element 18 extends along second line layer 20 width Y equal the width of first line layer 13.Therefore, the side of MTJ element 18 direction of extending along second line layer 20 and second line layer 20 form almost the plane without any step along the side of this direction.Magnetic masking layer 21 forms and covers this plane.Interlayer dielectric film 19 has been filled the interval between the MTJ element.The film thickness of interlayer dielectric film 19 and MTJ element is almost equal each other.
In the first embodiment, magnetic masking layer 21 is formed on the second adjacent line layer 20 continuously.A kind of insulating material of magnetic masking layer 21 preferred employings.This is because if will be formed on continuously by the magnetic masking layer 21 that conductive material is made on second line layer 20, the second then adjacent line layer 20 is electrically connected by this magnetic masking layer 21, or the MTJ element that separates by each unit is electrically connected.
That is to say that magnetic masking layer 21 is a kind of insulation magnetospheres.The examples of materials of this insulation magnetosphere has for example (Fe, Co)-(B, Si, Hf, Zr, Sm, Ta, Al)-(F, O, N) film of the ferrite of insulation and metal-nonmetal nanometer particle film.More particularly, the ferrite of insulation comprises at least a material that is selected among Mn-Zn-ferrite, Ni-Zn-ferrite, MnFeO, CuFeO, FeO and the NiFeO.
In this first embodiment, first and second line layers 13 and 20 suitably intersect mutually so that form the large unit array.But first and second line layers 13 and 20 can intersect mutually, as long as they extend just passable along different directions.
MTJ element 18 constitutes by three layers: magnetic fixed bed (magnetosphere) 14, and its direction of magnetization is fixed; Tunnel junction layer (non-magnetosphere) 15; And magnetic recording layer (magnetosphere) 16, its direction of magnetization is reverse.The position of magnetic fixed bed 14 and magnetic recording layer 16 can exchange.MTJ element 18 can be taked a kind of single tunnel junction structure or a kind of double tunnel junction structure that is formed by two tunnel junction layers 15 that is formed by a tunnel junction layer 15.To the MTJ element 18 with single tunnel junction structure and double tunnel junction structure be illustrated below.
Comprise at the MTJ element shown in Fig. 2 A: the magnetic fixed bed 14 that obtains by sequence stack template layer (template layer) 101, initial ferromagnetic layer 102, inverse ferric magnetosphere 103 and benchmark ferromagnetic layer 104 with single tunnel junction structure; Be formed on the tunnel junction layer 15 on the magnetic fixed bed 14; And magnetic recording layer 16 by free ferromagnetic 105 and contact layer 106 sequence stacks are obtained on tunnel junction layer 15.
The MTJ element 18 that has at the single tunnel junction structure shown in Fig. 2 B comprises: by sequence stack template layer (template layer) 101, initial ferromagnetic layer 102, inverse ferric magnetosphere 103, ferromagnetic layer 104 ', non-magnetosphere 107 and ferromagnetic layer 104 " the magnetic fixed bed 14 that obtains; Be formed on the tunnel junction layer 15 on the magnetic fixed bed 14; And by with ferromagnetic layer 105 ', non-magnetosphere 107, ferromagnetic layer 105 " and the magnetic recording layer 16 that on tunnel junction layer 15, obtains of contact layer 106 sequence stacks.
The MTJ element 18 shown in Fig. 2 B introduced a kind of by the ferromagnetic layer in the magnetic fixed bed 14 104 ', non-magnetosphere 107 and ferromagnetic layer 104 " three-decker that constitutes and a kind of by the ferromagnetic layer in the magnetic recording layer 16 105 ', non-magnetosphere 107 and ferromagnetic layer 105 " three-decker that constitutes.This MTJ element 18 can provide a kind of cellular construction that more is applicable to miniaturization, and wherein, the generation of magnetic pole is compared with the MTJ element 18 shown in Fig. 2 A and has been subjected to inhibition in the ferromagnet.
Comprise at the MTJ element 18 shown in Fig. 3 A: the first magnetic fixed bed 14a that obtains by sequence stack template layer 101, initial ferromagnetic layer 102, inverse ferric magnetosphere 103 and benchmark ferromagnetic layer 104 with a kind of double tunnel junction structure; Be formed on the first tunnel junction layer 15a on the magnetic fixed bed 14a; Be formed on the magnetic recording layer 16 on the first tunnel junction layer 15a; Be formed on the second tunnel junction layer 15b on the magnetic recording layer 16; And the second magnetic fixed bed 14b by benchmark ferromagnetic layer 104, inverse ferric magnetosphere 102 and contact layer 106 sequence stacks are obtained on the second tunnel junction layer 15b.
The MTJ element 18 that has at the single tunnel junction structure shown in Fig. 3 B comprises: the first magnetic fixed bed 14a that obtains by sequence stack template layer 101, initial ferromagnetic layer 102, inverse ferric magnetosphere 103 and benchmark ferromagnetic layer 104; Be formed on the first tunnel junction layer 15a on the first magnetic fixed bed 14a; By with ferromagnetic layer 16 ', non-magnetosphere 107 and the ferromagnetic layer 16 " magnetic recording layer 16 that sequence stack obtains on the first tunnel junction layer 15a; Be formed on the magnetic recording layer 16 the second tunnel junction layer 15b and by with ferromagnetic layer 104 ', non-magnetosphere 107, ferromagnetic layer 104 ", the second magnetic fixed bed 14b that on the second tunnel junction layer 15b, obtains of inverse ferric magnetosphere 103, initial ferromagnetic layer 102 and contact layer 106 sequence stacks.
The MTJ element 18 shown in Fig. 3 B introduced a kind of ferromagnetic layer 16 of forming magnetic recording layer 16 ', non-magnetosphere 107 and ferromagnetic layer 16 " three-decker and a kind of by the ferromagnetic layer 104 among the second magnetic fixed bed 14b ', non-magnetosphere 107 and ferromagnetic layer 104 " three-decker that constitutes.This MTJ element 18 can provide a kind of cellular construction that more is applicable to miniaturization, and wherein the generation of magnetic pole is compared with the MTJ element 18 shown in Fig. 3 A and has been subjected to inhibition in the ferromagnet.
MTJ element 18 with this double tunnel junction structure can be worked under higher bias voltage, and compares with the MTJ element 18 with single tunnel junction structure than (the resistance variations ratio between state " 1 " and " 0 ") at its MR (magnetoresistance) under the condition that applies identical external bias and to reduce still less.This double tunnel junction structure more helps sense information from the unit.
MTJ element 18 with list or double tunnel junction structure for example is to adopt following material to form.
The examples of materials of magnetic fixed bed 14,14a and 14b and magnetic recording layer 16 has Fe, Co, Ni and their alloy, has the magnet of high spin-polarization, and oxide is CrO for example 2And RXMnO 3-y(R: rare earth element, X:Ca, Ba, Cr) and whistler alloy be NiMnSb and PtMnSb for example.These magnetic materials if they can not lose ferromagnetism and then can include nonmagnetic elements for example Ag, Cu, Au, Al, Mg, Si, Bi, Ta, B, C, O, N, Pd, Pt, Zr, Ir, W, Mo or Nb a little.
The preferred exemplary of the material of the inverse ferric magnetosphere 103 of component part magnetic fixed bed 14,14a or 14b has Fe-Mn, Pt-Mn, Pt-Cr-Mn, Ni-Mn, NiO and Fe 2O 3
The examples of materials of tunnel junction layer 15,15a and 15b has for example Al of various dielectrics 2O 3, SiO 2, MgO, AlN, Bi 2O 3, MgF 2, CaF 2, SrTiO 2And AlLaO 3These dielectrics can comprise oxygen, nitrogen or fluorine defective.
Fig. 4 A, 4B, 4C to Fig. 9 A, 9B and 9C demonstrate the step of the magnetic memory device of making first embodiment of the invention.To the magnetic memory device manufacture method of first embodiment be described below.
Shown in Fig. 4 A, 4B and 4C, first interlayer dielectric film 12 and first line layer 13 are formed at semiconductor-based the end 11.More particularly, utilize RIE (reactive ion etching, reactive ion etching) method that first line layer 13 is formed a kind of desired pattern.First interlayer dielectric film 12 is formed on first line layer 13.Adopt CMP (chemically mechanical polishing) or deep etch (etch-back) method to make first interlayer dielectric film, 12 complanations (planarize) up to the surface that exposes first line layer 13.
Shown in Fig. 5 A, 5B and 5C, magnetic fixed bed 14 is deposited on first interlayer dielectric film 12 and first line layer 13.Tunnel junction layer 15 is deposited on the magnetic fixed bed 14.Magnetic recording layer 16 is deposited on the tunnel junction layer 15.Magnetic fixed bed 14, tunnel junction layer 15 and magnetic recording layer 16 form a kind of TMR material layer 17.
Shown in Fig. 6 A, 6B and 6C, use the mask (not shown) optionally this TMR material layer 17 to be etched with the island MTJ element 18 that formation separates by each unit.Second interlayer dielectric film 19 is formed on first interlayer dielectric film 12, MTJ element 18 and first line layer 13.Utilize CMP or deep etch method to make these second interlayer dielectric film, 19 complanations up to the surface that exposes each MTJ element 18.
Shown in Fig. 7 A, 7B and 7C, the direction of extending with first line layer 13 vertically is formed on second line layer 20 on the MTJ element 18 and second interlayer dielectric film 19.
Shown in Fig. 8 A, 8B and 8C, adopt second line layer 20 to remove second interlayer dielectric film 19 that between second line layer 20, exposes, up to exposing first interlayer dielectric film 12 and first line layer 13 as mask.
Shown in Fig. 9 A, 9B and 9C, magnetic masking layer 21 is formed on second line layer 20, first interlayer dielectric film 12 and first line layer 13.The film thickness of magnetic masking layer 21 preferably the interval S between second line layer 20 1/2 so that prevent to be covered with magnetic masking layer 21 contacts of the side of the second adjacent line layer 20.
Shown in Figure 1A, 1B and 1C, the 3rd interlayer dielectric film 22 is deposited on the magnetic masking layer 21, thereby has finished a mram memory cell array.
In adopting the MRAM of MTJ element 18, write as follows and sense data as memory element.
In data write, all provide write current to produce current field for the first and second selected line layers 13 and 20 two.At the node place between first and second line layers 13 and 20 combination field of two current fields is applied on the MTJ element 18.Its magnetization reversal threshold value is lower than the magnetization reversal of the magnetic recording layer 16 of magnetic fixed bed 14.The direction of magnetization of magnetic fixed bed 14 and magnetic recording layer 16 becomes and is parallel to each other (for example, state " 0 ") or antiparallel each other (for example state " 1 ").
In data read, electric current is provided for the MTJ element 18 that has wherein write state " 0 " or " 1 ", determining these data according to the resistance value difference of MTJ is " 1 " or " 0 ".
According to this first embodiment, magnetic masking layer 21 is covered with the top and side of second line layer 20 and wherein utilizes second line layer 20 to write the side of the MTJ element 18 of data.Magnetic masking layer 21 shows enough yoke effect and makes the current field that is produced by second line layer 20 to be applied to effectively on the selected unit.Owing to can reduce write current, so a kind of MRAM that can cut down the consumption of energy can be provided.
By covering second line layer 20 and MTJ elements 18, thereby can mask the magnetic field that leaks on the adjacent MTJ element 18 that the direction of extending along first line layer 13 is provided with effectively, write thereby suppressed mistake with magnetic masking layer 21.
By using insulation magnetic masking layer 21, this magnetic masking layer 21 needn't separate between adjacent second line layer 20.Spacing between second line layer 20 needn't be bigger, and the feature dimension of storage unit can dwindle.
This first embodiment has adopted MTJ element 18 as memory element.This embodiment is compared and can be obtained the bigger read operation speed that reads signal and Geng Gao with using by two magnetospheres and be clipped in GMR (giant magnetoresistance) element that one deck conductive layer between them forms.
First and second line layers 13 and 20, MTJ element 18 and second interlayer dielectric film 19 form in the mode of autoregistration (self-alignment), and therefore a kind of MRAM that is suitable for miniaturization is provided.
[second embodiment]
In this second embodiment, magnetic masking layer is formed on the second adjacent line layer, thereby is covered with the MTJ element and second line layer.This embodiment has used diode as on-off element.
Figure 10 A and 10B are the cut-open view according to the magnetic memory device of second embodiment of the invention.Figure 10 A is the cut-open view of the direction of extending along first line layer of magnetic memory device.Figure 10 B is the cut-open view of the direction of extending along second line layer of magnetic memory device.To the structure of the magnetic memory device of this second embodiment be described below.Be noted that and only describe the structure different with first embodiment.
Shown in Figure 10 A and 10B, diode 32 is inserted between first line layer 13 and the MTJ element 18 as the read current on-off element.Diode 32 has and MTJ element 18 shape much at one.That is to say that the side of the direction that extend along second line layer 20 side of the direction that this diode 32 extends along each second line layer 20, MTJ element 18 and second line layer 20 form one almost without any the plane of step along the side of this direction.Above the second adjacent line layer, magnetic masking layer 21 is formed on the upper surface of this plane and second line layer 20 continuously.
Magnetic masking layer 21 is formed on the side at least of second line layer 20 and MTJ element just enough, and needn't always be formed on the side of diode 32.Magnetic masking layer 21 be formed on continuously the second adjacent line layer 20 above, and preferably adopt a kind of insulating material.
Figure 11 A and 11B to Figure 15 A and 15B are the cut-open view of the step of the magnetic memory device of manufacturing second embodiment of the invention.To the magnetic memory device manufacture method of second embodiment be described below.The step identical with first embodiment will be carried out briefly bright.
Shown in Figure 11 A and 11B, first interlayer dielectric film 12 and second line layer 13 are formed at semiconductor-based the end 11.
Shown in Figure 12 A and 12B, diode material layer 31 is formed on first interlayer dielectric film 12 and first line layer 13.To be formed on the diode material layer 31 by the TMR material layer 17 that magnetic fixed bed 14, tunnel junction layer 15 and magnetic recording layer 16 constitute.
Shown in Figure 13 A and 13B, use the mask (not shown) that TMR material layer 17 and diode layer 31 are carried out selective etch to be formed on the island MTJ element and the diode 32 of isolating in each unit.Second interlayer dielectric film 19 is formed on the MTJ element 18 and first line layer 13.Adopt CMP or deep etch method to make interlayer dielectric film 19 complanations up to the surface that exposes each MTJ element 18.
Shown in Figure 14 A and 14B, the direction of extending with first line layer 13 vertically is formed on second line layer 20 on the MTJ element 18 and second interlayer dielectric film 19.
Shown in Figure 15 A and 15B, second interlayer dielectric film of using second line layer 20 to remove as mask to expose between second line layer 20 19 is up to exposing first interlayer dielectric film 12 and first line layer 13.Afterwards, magnetic masking layer 21 is formed on second line layer 20, first interlayer dielectric film 12 and first line layer 13.
Shown in Figure 10 A and 10B, the 3rd interlayer dielectric film 22 is deposited on the magnetic masking layer 21, thereby finishes a mram memory cell array.
This second embodiment can also have following effect except can obtaining the effect identical with first embodiment.
This first embodiment has adopted matrix structure, and electric current can leak on the unit of selecting outside the unit in data read.This leakage current can reduce the S/N of read signal than (signal to noise ratio (S/N ratio)) or reading speed.In this second embodiment, diode 32 is arranged to on-off element, and utilizes diode 32 to carry out rectification, thereby can only read current be offered selected unit.This second embodiment can be improved the S/N ratio of read signal and improve reading speed.
[the 3rd embodiment]
In the 3rd embodiment, magnetic masking layer is formed on above the second adjacent line layer, thereby is covered with MTJ element and these second line layers.This embodiment uses transistor as on-off element.
Figure 16 A and 16B are the cut-open view according to the magnetic memory device of third embodiment of the invention.Figure 16 A is the cut-open view of the direction of extending along first line layer of magnetic memory device.Figure 16 B is the cut-open view of the direction of extending along second line layer of magnetic memory device.To the structure according to the magnetic memory device of the 3rd embodiment be described below.Be noted that and only describe the structure different with first embodiment.
Shown in Figure 16 A and 16B, in the 3rd embodiment, MOSFET44 is arranged to the read current on-off element.Form the contact 45 that is connected with the source 43 of MOSFET44.Form the bottom electrode 48 of the MTJ element 18 that is connected with contact 45.This bottom electrode 48 and first line layer 13 are spaced apart, and are electrically connected with MTJ element 18.The side of the direction that bottom electrode 48 extends along each second line layer 20, MTJ element 18 along side that second line layer 20 extends and second line layer 20 form one along the side of this direction almost without any the plane of step.Above the second adjacent line layer 20, magnetic masking layer 21 is formed on the upper surface of this plane and second line layer 20 continuously.
Magnetic masking layer 21 is formed on the side at least of second line layer 20 and MTJ element just enough, and needn't always be formed on the side of MOSFET44.Magnetic masking layer 21 be formed on continuously adjacent second line layer 20 above, and preferably adopt a kind of insulating material.
Figure 17 A and 17B to Figure 21 A and 21B are the cut-open view of manufacturing according to the step of the magnetic memory device of second embodiment of the invention.To the magnetic memory device manufacture method according to second embodiment be described below.The step identical with first embodiment will be carried out briefly bright.
Shown in Figure 17 A and 17B, gate electrode 42 optionally is formed on across gate pole insulation film 41 at semiconductor-based the end 11.Source electrode and drain diffusion layer 43 are formed at gate electrode 42 both sides in the semiconductor-based end 11.Like this, formed MOSFET44, as on-off element.Form first interlayer dielectric film 12 and first line layer 13, and the 4th interlayer dielectric film 46 is formed on first interlayer dielectric film 12 and first line layer 13.Form contact 45, and make it to be connected with source 43.
Shown in Figure 18 A and 18B, on the 4th interlayer dielectric film 46 and contact 45, form lower electrode material layer 47.To be formed on the lower electrode material layer 47 by the TMR material layer 17 that magnetic fixed bed 14, tunnel junction layer 15 and magnetic recording layer 16 constitute.
Shown in Figure 19 A and 19B, use the mask (not shown) that TMR material layer 17 is carried out selective etch to form the island MTJ element by each cell isolation.Optionally lower electrode material layer 47 is etched with and forms bottom electrode 48 with the shape that requires.On MTJ element 18, bottom electrode 48 and the 4th interlayer dielectric film 46, form second interlayer dielectric film 19.Adopt CMP or deep etch method to make interlayer dielectric film 19 complanations up to the surface that exposes each MTJ element 18.
Shown in Figure 20 A and 20B, the direction of extending with first line layer 13 vertically is formed on second line layer 20 on the MTJ element 18 and second interlayer dielectric film 19.
Shown in Figure 21 A and 21B, second interlayer dielectric film of using second line layer 20 to remove as mask to expose between second line layer 20 19 is up to exposing the 4th interlayer dielectric film 46.Afterwards, magnetic masking layer 21 is formed on second line layer 20 and the 4th interlayer dielectric film 46.
Shown in Figure 16 A and 16B, the 3rd interlayer dielectric film 22 is deposited on the magnetic masking layer 21, thereby finishes a mram memory cell array.
The 3rd embodiment can also have following effect except can obtaining the effect identical with first embodiment.
First embodiment has adopted matrix structure, and electric current can leak on the unit of selecting outside the unit in data read.This leakage current can reduce the S/N of read signal than (signal to noise ratio (S/N ratio)) or reading speed.In the 3rd embodiment, MOSFET44 is set as on-off element, thereby can only read current be offered selected unit.This second embodiment can be improved the S/N ratio of read signal and improve reading speed.
Read switch is MOSFET44, this can with common CMOS process compatible.This read switch can be easy to be applied in the situation about being built with in the logical circuit as the described storage unit of the 3rd embodiment.
[the 4th embodiment]
The 4th embodiment is the improvement project of first embodiment, and wherein the magnetic masking layer of each second line layer separates.
Figure 22 A is the stereographic map according to the magnetic memory device of four embodiment of the invention.The cut-open view of the magnetic memory device that Figure 22 B cuts open for the XXIIB-XXIIB line in Figure 22 A.The cut-open view of the magnetic memory device that Figure 22 C cuts open for the XXIIC-XXIIC line in Figure 22 A.To the structure according to the magnetic memory device of the 4th embodiment be described below.Be noted that and only describe the structure different with first embodiment.
Shown in Figure 22 A, 22B and 22C, in the 4th embodiment, only on the side of each second line layer 20 and each MTJ element 18, be formed with magnetic masking layer 21a.Above each second line layer 20 or between adjacent second line layer 20 without any magnetic masking layer 21a.In other words, the magnetic masking layer 21a of each second line layer separates.Magnetic masking layer 21a preferably adopts a kind of insulating material, occurs short circuit so that prevent between the magnetosphere up and down 14 and 16 of MTJ element 18.
Figure 23 A, 23B and 23C are respectively the stereographic map and the cut-open view of the step of the magnetic memory device of making four embodiment of the invention.To the magnetic memory device manufacture method according to the 4th embodiment be described below.The explanation of the step identical with first embodiment will be omitted.
Shown in Fig. 2 A, 2B, 2C to Fig. 9 A, 9B and 9C, magnetic masking layer 21 forms and is covered with second line layer 20 and MTJ element 18.
Shown in Figure 23 A, 23B and 23C, by perpendicular magnetic anisotropy etching (verticalanisotropic etching) for example RIE remove the magnetic masking layer 21 on the upper surface that is formed on each second line layer 20 and be formed at first interlayer dielectric film 12 between second line layer 20 and the magnetic masking layer 21 on first line layer 13.Only on the side surface of MTJ element 18, second interlayer dielectric film 19 and second line layer 20, leave magnetic masking layer 21a.
Shown in Figure 22 A, 22B and 22C, the 3rd interlayer dielectric film 22 is deposited on magnetic masking layer 21a, second line layer 20, first line layer 13 and first interlayer dielectric film 12, thereby finishes a mram memory cell array.
The 4th embodiment can obtain the effect identical with first embodiment.
[the 5th embodiment]
The 5th embodiment is the improvement project of second embodiment, and wherein the magnetic masking layer of each second line layer separates.
Figure 24 A and 24B are the cut-open view according to the magnetic memory device of fifth embodiment of the invention.Figure 24 A is the cut-open view of the direction of extending along first line layer according to the magnetic memory device of fifth embodiment of the invention.Figure 24 B is the cut-open view of the direction of extending along second line layer according to the magnetic memory device of fifth embodiment of the invention.To the structure according to the magnetic memory device of the 5th embodiment be described below.Be noted that and only describe the structure different with second embodiment.
Shown in Figure 24 A and 24B, in the 5th embodiment, only magnetic masking layer 21a is formed on the side surface of each diode 32, each second line layer 20 and each MTJ element 18.Do not form any magnetic masking layer 21a at each second line layer 20 or between adjacent second line layer 20.That is to say that the magnetic masking layer 21a of each second line layer 20 separates.Magnetic masking layer 21a preferably adopts a kind of insulating material, occurs short circuit so that prevent between the magnetosphere up and down 14 and 16 of MTJ element 18.
Magnetic masking layer 21a is formed on the side at least of second line layer 20 and MTJ element just enough, and needn't always be formed on the side of diode 32.
Figure 25 A and 25B are the cut-open view of the step of the magnetic memory device of manufacturing fifth embodiment of the invention.To the magnetic memory device manufacture method according to the 5th embodiment be described below.The step explanation identical with second embodiment will dispense.
Shown in Figure 11 A and 11B to Figure 15 A and 15B, magnetic masking layer 21 forms and is covered with diode 32, second line layer 20 and MTJ element 18.
Shown in Figure 25 A and 25B, by the perpendicular magnetic anisotropy etching for example RIE remove the magnetic masking layer 21 on the upper surface that is formed on each second line layer 20 and be formed at first interlayer dielectric film 12 between second line layer 20 and the magnetic masking layer 21 on first line layer 13.Only on the side surface of MTJ element 18, second interlayer dielectric film 19 and second line layer 20, leave magnetic masking layer 21a.
Shown in Figure 24 A and 24B, the 3rd interlayer dielectric film 22 is deposited on magnetic masking layer 21a, second line layer 20, first line layer 13 and first interlayer dielectric film 12, thereby finishes a mram memory cell array.
The 5th embodiment can obtain the effect identical with second embodiment.
[the 6th embodiment]
The 6th embodiment is the improvement project of the 3rd embodiment, and wherein magnetic masking layer separates in each second line layer.
Figure 26 A and 26B are the cut-open view according to the magnetic memory device of sixth embodiment of the invention.Figure 26 A is the cut-open view of the direction of extending along first line layer according to the magnetic memory device of sixth embodiment of the invention.Figure 26 B is the cut-open view of the direction of extending along second line layer according to the magnetic memory device of sixth embodiment of the invention.To the structure according to the magnetic memory device of the 6th embodiment be described below.Be noted that and only describe the structure different with the 3rd embodiment.
Shown in Figure 26 A and 26B, in the 6th embodiment, only magnetic masking layer 21a is formed on the side surface of each bottom electrode 48, each second line layer 20 and each MTJ element 18.Do not forming any magnetic masking layer 21a on each second line layer 20 or between adjacent second line layer 20.That is to say that the magnetic masking layer 21a of each second line layer 20 separates.Magnetic masking layer 21a preferably adopts a kind of insulating material, occurs short circuit so that prevent between the magnetosphere up and down 14 and 16 of MTJ element 18.
Magnetic masking layer 21a is formed on the side at least of second line layer 20 and MTJ element 18 just enough, and needn't always be formed on the side of bottom electrode 48.
Figure 27 A and 27B are at the cut-open view of making according to the step in the magnetic memory device of sixth embodiment of the invention.To the magnetic memory device manufacture method according to the 6th embodiment be described below.The step explanation identical with the 3rd embodiment will dispense.
Shown in Figure 17 A and 17B to Figure 21 A and 21B, magnetic masking layer 21 forms and is covered with bottom electrode 48, second line layer 20 and MTJ element 18.
Shown in Figure 27 A and 27B, by the perpendicular magnetic anisotropy etching for example RIE remove the magnetic masking layer 21 on the upper surface that is formed on each second line layer 20 and be formed at first interlayer dielectric film 12 between second line layer 20 and the magnetic masking layer 21 on first line layer 13.Only on the side surface of MTJ element 18, second interlayer dielectric film 19 and second line layer 20, leave magnetic masking layer 21a.
Shown in Figure 26 A and 26B, the 3rd interlayer dielectric film 22 is deposited on magnetic masking layer 21a, second line layer 20, first line layer 13 and first interlayer dielectric film 12, thereby finishes a mram memory cell array.
The 6th embodiment can obtain the effect identical with the 3rd embodiment.
[the 7th embodiment]
The 7th embodiment is another improvement project of first embodiment, and wherein similar with the 4th embodiment, the magnetic masking layer of each second line layer separates, and also forms magnetic masking layer on second line layer.
Figure 28 is the cut-open view according to the magnetic memory device of seventh embodiment of the invention.To the structure according to the magnetic memory device of the 7th embodiment be described below.Be noted that and only describe the structure different with first embodiment.
As shown in figure 28, comprise the first magnetic masking layer 21a on the side surface that is formed on each second line layer 20 and each MTJ element 18 according to the magnetic memory device of the 7th embodiment and be formed on second magnetic masking layer 51 on second line layer 20.Magnetic masking layer 21a is not formed between adjacent second line layer 20, and similar with the 4th embodiment, by each second line layer 20 separately.The first magnetic masking layer 21a preferably adopts a kind of insulating material, occurs short circuit so that prevent between the magnetosphere up and down 14 and 16 of MTJ element 18.This second magnetic masking layer is not limited to insulating material, and it can adopt conductive material.
Adopt in the situation of conductive material at second magnetic masking layer 51, the examples of materials of conduction magnetosphere has the amorphous material of Ni-Fe alloy, Co-Fe alloy, Co-Fe-Ni alloy, Co-(Zr, Hf, Nb, Ta, Ti) base and the amorphous material of (Co, Fe, Ni)-(Si, B)-(P, Al, Mo, Nb, Mn) base.
Figure 29 is the cut-open view of manufacturing according to the step of the magnetic memory device of seventh embodiment of the invention.To the magnetic memory device manufacture method according to the 7th embodiment be described below.The explanation of the step identical with first embodiment will dispense.
Shown in Fig. 2 A, 2B, 2C to 8A, 8B and 8C, second interlayer dielectric film of using second line layer 20 to remove as mask to expose between second line layer 20 19 is up to exposing first interlayer dielectric film 12 and first line layer 13.
As shown in figure 29, magnetic masking layer 51 is formed on each second line layer 20.Magnetic masking layer 21 forms and is covered with magnetic masking layer 51, second line layer 20 and MTJ element 18.
As shown in figure 28, by the perpendicular magnetic anisotropy etching for example RIE remove the magnetic masking layer 21 on the upper surface that is formed on each second line layer 20 and be formed at first interlayer dielectric film 12 between second line layer 20 and the magnetic masking layer 21 on first line layer 13.On the side surface of MTJ element 18, second interlayer dielectric film 19 and second line layer 20, leave magnetic masking layer 21a.On second line layer 20, leave magnetic masking layer 51.Afterwards, the 3rd interlayer dielectric film 22 is deposited on magnetic masking layer 51, first line layer 13 and the first intermediate medium film 12, thereby finishes a mram memory cell array.
The 7th embodiment can obtain the effect identical with the 3rd embodiment.
Similar with the 4th embodiment, the magnetic masking layer 21a and 51 of each adjacent second line layer 20 separates.The material of magnetic masking layer 51 is not limited to insulating material, and it can be a kind of conductive material.This can improve the selection to the material of magnetic masking layer 51.
In the 7th embodiment, magnetic masking layer 51 is formed on second line layer 20.This embodiment is compared with the 4th embodiment to improve and is suppressed wrong and write and magnetic field is accumulated in effect on the selected unit.
The 7th embodiment is applied on the structure of first embodiment, but is not limited to this.The 7th embodiment can also be applied in shown in Figure 30 A and 30B similarly to be had on the magnetic memory device of diode 32 as on-off element with second embodiment.The 7th embodiment can also be applied in similarly to be had on the magnetic memory device of MOSFET44 as on-off element with the 3rd embodiment shown in Figure 31 A and 31B.
[the 8th embodiment]
The 8th embodiment is another improvement project of first embodiment, and wherein the side surface of each second line layer and each MTJ element is coated with insulation course, and magnetic masking layer is formed on adjacent second line layer.
Figure 32 is the cut-open view according to the magnetic memory device of eighth embodiment of the invention.To the structure according to the magnetic memory device of the 8th embodiment be described below.Be noted that and only describe the structure different with first embodiment.
Shown in figure 32, in magnetic memory device, side wall insulating layer 61 is formed on the side surface of each second line layer 20 and each MTJ element 18 according to the 8th embodiment.Magnetic masking layer 51 is formed on second line layer 20.Magnetic masking layer 21 forms and is covered with side wall insulating layer 61 and magnetic masking layer 51.The 8th embodiment has utilized side wall insulating layer 61 to make second adjacent line layer 20 and adjacent MTJ element 18 electrical isolations.Therefore, magnetic masking layer 21 is formed on adjacent second line layer 20 continuously.
When magnetic masking layer 51 for example adopted a kind of insulating material, magnetic masking layer 21 was not limited to insulating material but can uses conductive material.On the other hand, when magnetic masking layer 51 for example adopted a kind of conductive material, magnetic masking layer 21 preferably adopted a kind of insulating material and occurs short circuit so that prevent between adjacent second line layer 20.
Magnetic masking layer 51 needn't always be formed on second line layer 20, and magnetic masking layer 21 can be formed directly on second line layer 20.
Figure 33 is the cut-open view of the step of the magnetic memory device of manufacturing eighth embodiment of the invention.To the magnetic memory device manufacture method according to the 8th embodiment be described below.The explanation of the step identical with first embodiment will dispense.
Shown in Fig. 2 A, 2B and 2C to 8A, 8B and 8C, second interlayer dielectric film of using second line layer 20 to remove as mask to expose between second line layer 20 19 is up to exposing first interlayer dielectric film 12 and first line layer 13.
As shown in figure 33, magnetic masking layer 51 is formed on each second line layer 20.Side wall insulating layer 61 is formed on the side surface of second interlayer dielectric film, 19 (not shown), second line layer 20 and MTJ element 18.
Shown in figure 32, magnetic masking layer 21 forms and is covered with magnetic masking layer 51 and side wall insulating layer 61.The 3rd interlayer dielectric film 22 is deposited on the magnetic masking layer 21, thereby finishes a mram memory cell array.
The 8th embodiment can obtain the effect identical with first embodiment.
In the 8th embodiment, side wall insulating layer 61 is covered with the side surface of second line layer 20 and MTJ element 18.Even magnetic masking layer 21 is formed on adjacent second line layer 20 continuously, this magnetic masking layer 21 also is not limited to insulating material, but can adopt a kind of conductive material.This just can improve the selection of the material of this magnetic masking layer 21.
The 8th embodiment is applied on the structure of first embodiment, but is not limited to this.The 8th embodiment can also can also be applied in shown in Figure 34 A and 34B similarly to be had on the magnetic memory device of diode 32 as on-off element with second embodiment.The 7th embodiment can also be applied in similarly to be had on the magnetic memory device of MOSFET44 as on-off element with the 3rd embodiment shown in Figure 35 A and 35B.
In Figure 30,34A, 34B, 35A and 35B, magnetic masking layer 21 is formed on adjacent second line layer 20 continuously, but is not limited to this.For example, shown in Figure 36,37A, 37B, 38A and 38B,, this magnetic masking layer 21 is separated in each second line layer 20 by from removing magnetic masking layer 21 between adjacent second line layer 20 and from magnetic masking layer 51.In this case, magnetic masking layer 21 and 51 can adopt insulating material or conductive material.
[the 9th embodiment]
The 9th embodiment is another improvement project of first embodiment, and wherein the side surface of each MTJ element is coated with insulation course, and magnetic masking layer is formed on adjacent second line layer.
Figure 39 is the cut-open view according to the magnetic memory device of ninth embodiment of the invention.To the structure according to the magnetic memory device of the 9th embodiment be described below.Be noted that and only describe the structure different with first embodiment.
As shown in figure 39, in the magnetic memory device according to the 9th embodiment, the width of each second line layer 20 is greater than the width of each MTJ element.Side wall insulating layer 19a is formed on from the side surface of the recessed MTJ element 18 of the side surface of second line layer 20.Magnetic masking layer 21 forms and is covered with the side wall insulating layer 19a and second line layer 20.Magnetic masking layer 21 is formed on adjacent second line layer 20 continuously.
In the 9th embodiment, when the magnetic masking layer of being made by conductive material 21 is formed on adjacent second line layer 20, make the direction MTJ element 18 electricity isolation adjacent one another are of extending by side wall insulating layer 19a along first line layer 13.But the second adjacent line layer 20 does not have electricity to isolate.Thus, this magnetic masking layer 21 preferably adopts a kind of insulating material in the 9th embodiment.
Figure 40 is at the cut-open view of making according to the step in the magnetic memory device of ninth embodiment of the invention.To the magnetic memory device manufacture method according to the 9th embodiment be described below.The explanation of the step identical with first embodiment will dispense.
Shown in Fig. 2 A, 2B and 2C to 6A, 6B and 6C, in each unit, form the island MTJ element 18 of isolating.Second interlayer dielectric film 19 is formed on the MTJ element 18 and first line layer 13.Adopt CMP or deep etch method to make 19 complanations of second interlayer dielectric film up to the surface that exposes each MTJ element 18.
As shown in figure 40, the direction with 13 extensions of first line layer vertically is formed on second line layer 20 on the MTJ element 18 and second interlayer dielectric film 19.At this moment, the width of each second line layer 20 is greater than MTJ element 18.
As shown in figure 39, remove second interlayer dielectric film 19 that between second line layer 20, exposes as mask up to exposing first interlayer dielectric film 12 and first line layer 13 with second line layer 20.As a result, on the side surface of MTJ element 18, form side wall insulating layer 19a by second interlayer dielectric film 19.Magnetic masking layer 21 is formed on second line layer 20, first interlayer dielectric film 12 and first line layer 13.The 3rd interlayer dielectric film 22 is deposited on the magnetic masking layer 21, thereby finishes a mram memory cell array.
The 9th embodiment can obtain the effect identical with first embodiment.
The 9th embodiment is applied on the structure of first embodiment, but is not limited to this.The 9th embodiment can also be applied in shown in Figure 41 A and 41B similarly to be had on the magnetic memory device of diode 32 as on-off element with second embodiment.The 7th embodiment can also be applied in similarly to be had on the magnetic memory device of MOSFET44 as on-off element with the 3rd embodiment shown in Figure 42 A and 42B.
In Figure 39,41A, 41B, 42A and 42B, magnetic masking layer 21 is formed on adjacent second line layer 20 continuously, but is not limited to this.For example, shown in Figure 43,44A, 44B, 45A and 45B,, thereby can make this magnetic masking layer 21 separately by each second line layer 20 by between adjacent second line layer 20 and from magnetic masking layer 51, remove magnetic masking layer 21.In this case, magnetic masking layer 21 and 51 can adopt insulating material or conductive material.
In Figure 43,44A, 44B, 45A and 45B, on second line layer 20, do not stay magnetic masking layer 21, but be not limited to this.For example, shown in Figure 46,47A, 47B, 48A and 48B, magnetic masking layer 51 can be formed on second line layer 20.In this case, magnetic masking layer 21 and 51 can adopt insulating material or conductive material.These structures can further improve and suppress wrong and write and magnetic field is accumulated in effect on the selected unit.
[the tenth embodiment]
The tenth embodiment provides the structure identical with first embodiment, just pattern-forming (paterning) the method difference of MTJ element.
Figure 49-52 is the stereographic map of the step of the magnetic memory device of manufacturing tenth embodiment of the invention.To the magnetic memory device manufacture method according to the tenth embodiment be described below.Those steps identical with first embodiment will be carried out briefly bright
As shown in figure 49, similar with first embodiment, first interlayer dielectric film 12 and first line layer 13 are formed at semiconductor-based the end 11.To be formed on by the TMR material layer 17 that magnetic fixed bed 14, tunnel junction layer 15 and magnetic recording layer 16 constitute on first interlayer dielectric film 12 and first line layer 13.Use the mask (not shown) that TMR material layer 17 optionally is etched with the straight TMR material layer 17 that formation is extended along the direction of first line layer, 13 extensions.Second interlayer dielectric film 19 is formed on the TMR material layer 17 and first interlayer dielectric film 12.Adopt CMP or deep etch method to make 19 complanations of second interlayer dielectric film up to the surface that exposes TMR material layer 17.
As shown in figure 50, the direction with 13 extensions of first line layer vertically is formed on second line layer 20 on the TMR material layer 17 and second interlayer dielectric film 19.
Shown in Figure 51, use second line layer 20 to remove second interlayer dielectric film 19 that between second line layer 20, exposes and TMR material layer 17 up to exposing first interlayer dielectric film 12 and first line layer 13 as mask.Therefore, form the island MTJ element 18 of pressing each cell isolation.
Shown in Figure 52, magnetic masking layer 21 is formed on second line layer 20, first interlayer dielectric film 12 and first line layer 13.
Similar with first embodiment, shown in Figure 1A, 1B and 1C, the 3rd interlayer dielectric film 22 is deposited on the magnetic masking layer 21, thereby finishes a mram memory cell array.
The tenth embodiment can obtain the effect identical with first embodiment.
In the tenth embodiment, at first to MTJ element 18 processing graphic patterns, form a kind of straight shape, then with it to process with the mode of second line layer, 20 autoregistrations (self-alignment).This method can form for example a kind of rectangle MTJ element 18, and this element can not only be realized by lithography originally.By reducing for example magnetization reversal threshold value, can reduce the write current size.The shape difference between the MTJ element 18 can be suppressed, and the difference of the write current threshold value between the MTJ element 18 can be suppressed at.Thereby can form a kind of like this storer, wherein reduction of the energy consumption of all storage unit and write error can occur hardly.
In the above description, the manufacture method according to the tenth embodiment is applied on first embodiment.But this method can also be applied on second to the 8th embodiment, as long as second line layer has identical width with the MTJ element.
[the 11 embodiment]
The 11 embodiment relates to the improvement project of first to the 3rd embodiment, wherein second line layer but also also have first line layer all to be coated with magnetic masking layer not only.
Figure 53 A, 53B, 54A, 54B, 55A and 55B are the cut-open view according to the magnetic memory device of eleventh embodiment of the invention.Figure 53 A and 53B demonstrate another improvement project of first embodiment, and any on-off element wherein is not set.Figure 54 A and 54B demonstrate an improvement project of second embodiment, diode 32 wherein are set as on-off element.Figure 55 A and 55B demonstrate an improvement project of the 3rd embodiment, transistor 44 wherein are set as on-off element.To the structure according to the magnetic memory device of the 11 embodiment be described below.Be noted that and only describe the structure different with first embodiment.
Shown in Figure 53 A, 53B, 54A, 54B, 55A and 55B, in magnetic memory device, magnetic masking layer 62 is formed on the bottom and side surface of first line layer 13 according to the 11 embodiment.This magnetic masking layer 62 separates by each unit, and can be formed by insulation or conductive material.
When first line layer 13 has a kind of inlaying (damascene) structure, form magnetic masking layer 62 by for example following method.First wiring groove is formed in the insulation film 12.Magnetic masking layer 62 is formed in this groove, and the first wiring material layer is formed on the magnetic masking layer 62.Adopt CMP or deep etch method to make magnetic masking layer 62 and material layer complanation up to the surface that exposes insulation film 12.Thereby, can obtain a kind of like this structure, wherein magnetic masking layer 62 is formed on the bottom surface and side of first line layer 13.
The 11 embodiment can obtain the effect identical with first embodiment.
In the 11 embodiment, the bottom surface of first line layer 13 and side are coated with magnetic masking layer 62.Magnetic masking layer 62 has yoke effect and makes the current field that is produced by first line layer 13 to be applied to effectively on the selected unit.Therefore can reduce the write current that offers first line layer 13, and can further cut down the consumption of energy.
By covering first line layer 13, thereby can shield the magnetic field that leaks on the adjacent MTJ element 18 that the direction of extending along second line layer 20 is provided with effectively with magnetic masking layer 62.
Magnetic masking layer 62 by each adjacent first line layer 13 separately.The material of magnetic masking layer 62 is not limited to insulating material, but can be a kind of conductive material.This can improve the selection of the material of magnetic masking layer 62.
[the 12 embodiment]
The 12 embodiment is the improvement project of the 11 embodiment, and wherein magnetic masking layer is clipped between the metal barrier.
Figure 56 A, 56B, 57A, 57B, 58A and 58B are the cut-open view according to the magnetic memory device of twelveth embodiment of the invention.Figure 56 A and 56B demonstrate another improvement project of first embodiment, and any on-off element wherein is not set.Figure 57 A and 57B demonstrate another improvement project of second embodiment, diode 32 wherein are set as on-off element.Figure 58 A and 58B demonstrate another improvement project of the 3rd embodiment, transistor 44 wherein are set as on-off element.To the structure according to the magnetic memory device of the 12 embodiment be described below.Be noted that and only describe the structure different with first embodiment.
Shown in Figure 53 A, 53B, 54A, 54B, 55A and 55B, in the magnetic memory device according to the 12 embodiment, the upper surface and the magnetic masking layer on the side 21 that are formed on second line layer 20 are clipped between metal barrier 63 and 64.The bottom surface and the magnetic masking layer on the side 62 that are formed on first line layer 13 are clipped between metal barrier 65 and 66.
The metal barrier 63 and 65 that is formed on the inside surface of magnetic masking layer 21 and 62 is made by for example Co or CoFe material.The metal barrier 64 and 66 that is formed on the outside surface of magnetic masking layer 21 and 62 is made by for example Ta, TaN or TaSiN material.
When first line layer 13 is mosaic texture, form magnetic masking layer 62 and metal barrier 65 and 66 by for example following method.First wiring groove is formed in the insulation film 12.Metal barrier 66, magnetic masking layer 62 and metal barrier 65 orders are formed in this groove.The first wiring material layer is formed on the magnetic masking layer 62.Adopt CMP or deep etch method to make magnetic masking layer 62 and material layer complanation up to the surface that exposes insulation film 12.Thereby the magnetic masking layer 62 that is clipped between metal barrier 65 and 66 just is formed on the bottom surface and side of first line layer 13.
The 12 embodiment can obtain the effect identical with the 11 embodiment.
Owing on the surfaces externally and internally of magnetic masking layer 21 and 62, be formed with metal barrier 63,64,65 and 66, so the 12 embodiment has following effect.
Be clipped in metal barrier 63 between second line layer 20 and the magnetic masking layer 21 and can suppress reaction between the magnetic masking layer 21 and second line layer 20.This metal barrier 63 can improve magnetic shield performance (yoke performance) and suppress the increase of the line resistance (wiringresistance) of second line layer 20.
Be clipped in that metal barrier 64 between magnetic masking layer 21 and the interlayer dielectric film 22 can improve magnetic masking layer 21 and as the adhesion property between the interlayer dielectric film 22 of upper film.This metal barrier 64 can prevent that the shielding material of magnetic masking layer 21 is to interlayer dielectric film 22 diffusions.
Be clipped in metal barrier 65 between first line layer 13 and the magnetic masking layer 62 and can suppress reaction between the magnetic masking layer 62 and first line layer 13.This metal barrier 65 can improve magnetic shield performance (yoke performance) and suppress the increase of the line resistance of first line layer 20.
Be clipped in that metal barrier 66 between magnetic masking layer 62 and the interlayer dielectric film 12 can improve magnetic masking layer 62 and as the adhesion property between the interlayer dielectric film 62 of film down.This metal barrier 66 can prevent that the shielding material of magnetic masking layer 62 is to interlayer dielectric film 12 diffusions.
[the 13 embodiment]
The 13 embodiment is the improvement project without any the magnetic memory device of on-off element.
Figure 59 and 60 is the stereographic map according to the magnetic memory device of thirteenth embodiment of the invention.To the structure according to the magnetic memory device of the 13 embodiment be described below.Be noted that and mainly describe the structure different with 53B with Figure 53 A.
In the structure shown in Figure 59, first line layer 13 is divided into and writes word line 13a and sense word line 13b.Write that word line 13a for example vertically extends with second line layer (bit line) 20 and spaced apart with MTJ element 18.Sense word line 13b on identical plane with write word line 13a and extend abreast, and be connected with MTJ element 18 with contact 68 by lower metal layer 67.Magnetic masking layer 62a and 62b are formed on the side and bottom surface that writes with sense word line 13a and 13b.
Equally, in the structure shown in Figure 60, first line layer 13 is divided into and writes word line 13a and sense word line 13b.Write that word line 13a for example vertically extends with second line layer (bit line) 20 and spaced apart with MTJ element 18.Magnetic masking layer 62a is formed on the side and bottom surface that writes word line 13a.Sense word line 13b with write word line 13a and extend abreast, and be arranged in MTJ element 18 and write between the word line 13a and contact with MTJ element 18.
The 13 embodiment can obtain the effect identical with the 11 embodiment.
In the 13 embodiment, first line layer 13 is divided into and writes word line 13a and sense word line 13b.With compare with the simple crosspoint structure shown in the 53B as Figure 53 A, read output signal can be set greatlyyer to improve reading speed.
Because write with read line and partly separate, thus in writing, be applied on the tunnel junction layer 15 without any voltage bias, thus improved reliability.
In the 3rd embodiment,, can reduce unit size and help the exploitation of sandwich construction without any on-off element.
Those those of ordinary skills will readily understand other advantage and improvement.Therefore, the scope of more broad sense of the present invention is not limited to particular content shown here and described and representative embodiment.Therefore, the scheme that under situation about not breaking away from, can make various variations by the spirit or scope of claims and the overall summary of the invention that equivalent limited thereof.

Claims (49)

1. magnetic memory device, it comprises:
First line layer, it extends along first direction;
Memory element, it is arranged on described first line layer top;
A plurality of second line layers are arranged on the described memory element and along the second direction different with first direction and extend; And
First screen layer, it is formed on the side of the side of described each second line layer and memory element.
2. device as claimed in claim 1, wherein said first screen layer are formed on the side of the side of described each second line layer and upper surface and memory element, and are formed on each continuously above second line layer.
3. device as claimed in claim 1, wherein said first screen layer comprises the insulation magnetosphere.
4. device as claimed in claim 3, described insulation magnetosphere is formed by the ferrite of insulation.
5. device as claimed in claim 1, the side of wherein said each first line layer and the side of memory element form a plane basically, and described first screen layer is formed on this plane.
6. device as claimed in claim 1, wherein said memory element comprise the MTJ element that is formed by first magnetosphere, second magnetosphere and non-magnetosphere at least.
7. device as claimed in claim 6, wherein said MTJ element are to have the unijunction structure of a non-magnetosphere or have the double junction structure of two non-magnetospheres.
8. device as claimed in claim 6, wherein:
Described first and second magnetospheres have different magnetization reversal threshold values; And
In order in the MTJ element, to write data, be changed to the direction of magnetization of first and second magnetospheres parallel to each other or antiparallel each other.
9. device as claimed in claim 6, the resistance value of wherein said MTJ element is parallel to each other or antiparallel each other variations according to the direction of magnetization of first and second magnetospheres, and reads the data that are written in the MTJ element according to the variation of resistance value.
10. device as claimed in claim 1 also includes first insulation course, and this layer is arranged on the side of memory element along second direction and its thickness equals memory element.
11. device as claimed in claim 1 also comprises diode, it is formed between first line layer and the memory element.
12. device as claimed in claim 1 also comprises the transistor that is connected with memory element, and wherein said memory element and described first line layer are spaced apart.
13. device as claimed in claim 1 also comprises the secondary shielding layer on the upper surface that is formed on described each second line layer.
14. device as claimed in claim 13, wherein said first screen layer comprise an insulation magnetosphere.
15. device as claimed in claim 13, wherein said secondary shielding layer comprise insulation magnetosphere or conduction magnetosphere.
16. device as claimed in claim 1 also comprises:
The secondary shielding layer, it is formed on the upper surface of described each second line layer; And
Second insulation course, it is formed between the side and first screen layer of the side of described each second line layer and memory element.
17. device as claimed in claim 16, wherein said first screen layer comprise insulation magnetosphere or conduction magnetosphere.
18. device as claimed in claim 16, wherein said secondary shielding layer comprise insulation magnetosphere or conduction magnetosphere.
19. device as claimed in claim 16, wherein said first screen layer are formed on the upper surface of the side of second insulation course and secondary shielding layer, and are formed on continuously on each second line layer.
20. device as claimed in claim 19, wherein said secondary shielding layer comprises the insulation magnetosphere, and described first screen layer comprises insulation magnetosphere or conduction magnetosphere.
21. device as claimed in claim 19, wherein said secondary shielding layer comprises the conduction magnetosphere, and described first screen layer comprises the insulation magnetosphere.
22. device as claimed in claim 1 also comprises the 3rd insulation course, this layer is formed between the side and first screen layer of memory element, and the side of the side of described the 3rd insulation course and second line layer is substantially parallel.
23. device as claimed in claim 22, wherein said memory element is along the width of the first direction width less than described each second line layer.
24. device as claimed in claim 22, wherein said first screen layer comprise insulation magnetosphere or conduction magnetosphere.
25. device as claimed in claim 22, wherein said first screen layer are formed on the side of the side of described each second line layer and upper surface and the 3rd insulation course, and are formed on continuously between each second line layer.
26. device as claimed in claim 25, wherein said first screen layer comprise an insulation magnetosphere.
27. device as claimed in claim 22 also comprises the secondary shielding layer, this layer is formed on the upper surface of described each second line layer.
28. device as claimed in claim 27, wherein said first screen layer comprise insulation magnetosphere and conduction magnetosphere.
29. device as claimed in claim 27, wherein said secondary shielding layer comprise insulation magnetosphere or conduction magnetosphere.
30. device as claimed in claim 1 also comprises the 3rd screen layer, this layer is formed on the lower surface and side of first line layer.
31. device as claimed in claim 30, wherein said the 3rd screen layer comprise insulation magnetosphere or conduction magnetosphere.
32. device as claimed in claim 1 also comprises first and second metal barriers, these restraining barriers clip described first screen layer.
33. device as claimed in claim 30 also comprises third and fourth metal barrier, these restraining barriers clip described the 3rd screen layer.
34. device as claimed in claim 1 also comprises the tertiary circuit layer, this layer is arranged on the plane identical with first line layer, extends abreast with described first line layer, be connected with memory element, and as reading circuit.
35. device as claimed in claim 1 also comprises the 4th line layer, it is arranged between first line layer and the memory element, extends abreast with described first line layer, be connected with described memory element, and as reading circuit.
36. a magnetic memory device manufacture method, it comprises:
First line layer that formation is extended along first direction;
Optionally memory element is formed on first line layer top;
Around memory element, form first insulation course;
On described first insulation course and memory element, form second line layer that extends along the second direction different with described first direction;
Remove the part that does not cover second line layer of first insulation course as mask with second line layer; And
First screen layer is formed on second line layer.
37. method as claimed in claim 36, the film thickness that wherein said first screen layer forms are not more than 1/2 of spacing between second line layer.
38. method as claimed in claim 36, wherein said memory element comprise the MTJ element that is formed by first magnetosphere, second magnetosphere and non-magnetosphere at least.
39. method as claimed in claim 36 also is included between described first line layer and the memory element and forms diode.
40. method as claimed in claim 36 also comprises forming the transistor that is connected with described memory element.
41. method as claimed in claim 36, also comprise, after forming described first screen layer, upper surface from described each second line layer, and between each second line layer, remove first screen layer, on the side of the side of described each second line layer and memory element, stay described first screen layer.
42. method as claimed in claim 41 is wherein removed described first screen layer by anisotropic etching.
43. method as claimed in claim 36 also comprises:
Before forming first screen layer, on the upper surface of described each second line layer, form the secondary shielding layer; And
After forming described first screen layer, from the upper surface of secondary shielding layer, and remove described first screen layer between each second line layer, on the side of the side of described each second line layer and memory element, stay described first screen layer.
44. method as claimed in claim 36 also comprised before forming described first screen layer:
On the upper surface of described each second line layer, form the secondary shielding layer; And
On the side of the side of described each second line layer and described memory element, form second insulation course.
45. method as claimed in claim 44, after forming described first screen layer, also comprise: from the upper surface of described secondary shielding layer, and between described each second line layer, remove described first screen layer, on the side of described second insulation course, stay described first screen layer.
46. method as claimed in claim 36, wherein:
Described second line layer so forms, and makes the width setup of described each second line layer must be greater than the width of memory element along first direction;
The part that does not cover described second line layer with described line layer is removed described first insulation course as mask stays described first insulation course on the side of memory element, described memory element is recessed from the side surface of described each second line layer; And
Described first screen layer is formed on the side of the side of described each second line layer and upper surface and described first insulation course.
47. method as claimed in claim 46, also comprise, after forming described first screen layer, upper surface from the secondary shielding layer, and remove described first screen layer between each second line layer, staying described first screen layer on the side of described first insulation course and on the side of described each second line layer.
48. method as claimed in claim 47 also comprises, before forming described first screen layer, forms described secondary shielding layer on the upper surface of described each second line layer.
49. a magnetic memory device manufacture method, it comprises:
First line layer that formation is extended along first direction;
Above first line layer, form the straight memory element that extends along first direction;
Around memory element, form first insulation course;
On described first insulation course and memory element, form second line layer that extends along the second direction different with described first direction;
Remove the part that does not cover second line layer of first insulation course and memory element with second line layer as mask, thereby described memory element is formed island; And
On second line layer, form first screen layer.
CNB021570132A 2001-12-18 2002-12-18 Magnetic storage device with magnetic shielding layer and mfg. method thereof Expired - Fee Related CN1295707C (en)

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