CN1301546C - Method for improving dense fast flashing memory trough oxide layer edge electric avalanche utilizing shielding bird's mouth - Google Patents
Method for improving dense fast flashing memory trough oxide layer edge electric avalanche utilizing shielding bird's mouth Download PDFInfo
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- CN1301546C CN1301546C CNB031236790A CN03123679A CN1301546C CN 1301546 C CN1301546 C CN 1301546C CN B031236790 A CNB031236790 A CN B031236790A CN 03123679 A CN03123679 A CN 03123679A CN 1301546 C CN1301546 C CN 1301546C
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- oxide
- element region
- beak
- ditches
- edge
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Abstract
The present invention discloses a method for improving electric avalanche of a trough oxide layer edge of a dense fast flashing memory utilizing a shielding bird's mouth. The edge of an element region forms a bird's mouth liner to prevent the subsequently formed avalanche caused by the electric field effect of the edge because of the enhancement of the local electric field when the trough oxide layer is too sharp at the corner of the element region.
Description
Technical field
The present invention relates to a kind of high density flash (flash) memory body, more particularly, relate to a kind of method of utilizing the screen type beak to improve the electricity collapse of high density flash memory body tunnel oxide edge.
Background technology
The trend of ic manufacturing technology development is that mainly the size of electric crystal is constantly dwindled, because the element that dwindles can improve switch speed and components consume power, the integration density of circuit and function also can promote.Traditional localized oxidation of silicon (LOCalized Oxidation of Silicon; LOCOS) method is subjected to beak (bird ' s beak) effect and the smooth restriction of air spots, can only be contracted to several microns, therefore, develops again and shallow trench isolation (Shallow Trench Isolation in order to overcome problem that size dwindles; STI) technology is certainly to separate the problem that is faced.
Typical STI processing procedure is to form shade (mask) on a silicon substrate, behind little shadow program definition STI pattern, utilize the shade trench etched, in irrigation canals and ditches, fill monoxide afterwards, and optionally in irrigation canals and ditches, forming monoxide (Liner oxide) before the fill oxide earlier.Follow-up common replacing cmp (Chemical-Mechanical Polishing; CMP) eat-back oxide and make its flattening surface.Next make electric crystal structure at element region.
Though STI can dwindle size of component, yet the tunnel oxide of follow-up formation is too sharp-pointed in the corner of element region, makes internal field's enhancing and then initiation fringe field effect cause collapse.Therefore, how to provide a kind of method that can improve the electricity collapse of high density flash memory body tunnel oxide edge to be imminent.
Summary of the invention
Main purpose of the present invention is to propose a kind of method of utilizing the screen type beak to improve the electricity collapse of high density flash memory body tunnel oxide edge.
The method that the present invention improves the electricity collapse of high density flash memory body tunnel oxide edge is included in the substrate a plurality of shallow trench isolation of definition and a plurality of element region behind deposition one bed course, with the bed course is that shade etching substrate forms a plurality of irrigation canals and ditches, the edge that the lining oxide of growing up in irrigation canals and ditches extends to element region forms initial beak, and then deposit monoxide and fill up this a plurality of irrigation canals and ditches, eat-back this oxide with cmp, and with bed course as grinding stop layer, thereby stay a planarized surface, after removing bed course, deposition oxide covers this sti oxide once more, and this thing of etching oxygen forms beak limit lining and covers initial beak, thereby prevents that follow-up formed tunnel oxide is too sharp-pointed in the corner portions located of element region.
Description of drawings
Below in conjunction with accompanying drawing the specific embodiment among the present invention is described in further detail.
Fig. 1 is the schematic diagram after forming pad nitride and definition shallow trench isolation pattern in the substrate;
Fig. 2 is the schematic diagram of the irrigation canals and ditches of etching shallow trench isolation;
Fig. 3 is the schematic diagram behind the formation lining oxide in irrigation canals and ditches;
Fig. 4 is the schematic diagram after the deposition high density plasma oxide;
Fig. 5 is at the process cmp and the schematic diagram after removing the pad nitride;
Fig. 6 is the schematic diagram after high temperature oxide deposition;
Fig. 7 is at the schematic diagram that is etched with after forming beak limit lining;
Fig. 8 is the schematic diagram after deposit sacrificial oxides;
Fig. 9 is the schematic diagram after removing sacrifical oxide; And
Figure 10 is the schematic diagram after forming tunnel oxide.
Embodiment
As shown in Figure 1, at first deposit mononitride on silicon base 10, pattern and this silicon nitride thing of etching of and then defining shallow trench isolation form a plurality of pad nitride 12.Be that shade etching substrate 10 forms a plurality of irrigation canals and ditches 14 then, as shown in Figure 2 with pad nitride 12.Next for example carrying out the high-temperature oxydation processing procedure under 1100 to 1200 ℃, as shown in Figure 3, forming lining oxide 15 on the surface of irrigation canals and ditches 14, this step will make and form edge slynessization of irrigation canals and ditches 14 initial beak 16 intrusions simultaneously and fill up the element of nitride 12 belows.For example and then re-use and fill up each irrigation canals and ditches 14, as shown in Figure 4 in 400 to 500 ℃ of high density plasma oxide, 18 depositions.Then eat-back oxide 18 with for example cmp, this step as etch stop layer, thereby stays a planarized surface with pad nitride 12, and then removes pad nitride 12 and exposes element region 20, as shown in Figure 5.And then once again for example to cover STI18 and element region 20 at 800 to 900 ℃ of following high-temperature oxydation processing procedure deposition monoxide 24, as shown in Figure 6, and in this high temperature program, the oxide 18 of twice deposition and 24 will fuse together becomes oxide 25.Etching oxide 25 exposes element region 20 once more then, and the part of oxide 25 this moment at element region 20 edges will form beak limit lining 26, and as shown in Figure 7, initial beak 16 will be aimed at and cover to this beak limit lining 26.The step of this etching oxide 25 can over etching, to remove a thickness on silicon base 10 surfaces in the element region 20.Differently, also can after forming a sacrificial oxide layer 28, element region 20 remove this sacrificial oxide layer 28 again, as Fig. 8 and shown in Figure 9, and the preparation of this sacrificial oxide layer 28 and to remove be the material that remains in the previous processing procedure on the element region 20 in order to remove.At last, on element region 20, form a tunnel oxide 30, as shown in figure 10, owing to serve as a contrast the bent angle part at 20 edges, 26 cladding element districts, so taper off to a point because of bent angle can prevent tunnel oxide 30 formation the time on the beak limit of element region 20 both sides.
More than the narration done for the preferred embodiment among the present invention only for illustrating its purpose, and and non-limiting protection scope of the present invention.Because of making an amendment based on the embodiment of the invention or changing is possible; therefore; do not breaking away from variation and the modification that to make equivalence under the design spirit of the present invention to it; therefore; every not breaking away from the equivalence variation of having done under the design spirit of the present invention and modification, all should think to fall into protection scope of the present invention.
Claims (14)
1. a method of utilizing the screen type beak to improve the electricity collapse of high density flash memory body tunnel oxide edge comprises the following steps:
In a substrate, form a plurality of irrigation canals and ditches to isolate a plurality of element regions;
In a plurality of irrigation canals and ditches, form the edge that the lining oxide extends to a plurality of element regions, and described lining oxide forms a plurality of initial beaks at the edge of a plurality of element regions;
Depositing one first oxide fills up a plurality of irrigation canals and ditches and forms a plurality of shallow trench isolation;
Deposit one second oxide and cover a plurality of shallow trench isolation and element region;
Etching second oxide serves as a contrast at the edge of a plurality of element regions to form a plurality of beaks limit, and described beak limit lining covers the bent angle part at described element region edge; And
Form tunnel oxide at a plurality of element regions.
2. according to the method described in the claim 1, it is characterized in that: the step of a plurality of irrigation canals and ditches of described formation comprises the following steps:
In substrate, form a pad nitride;
The pattern of a plurality of shallow trench isolation of definition on this pad nitride, and
With the pad nitride is that shade etching substrate forms a plurality of irrigation canals and ditches.
3. according to the method described in the claim 1, it is characterized in that: the step of a plurality of shallow trench isolation of described formation comprises the following steps:
High density plasma oxide deposits described first oxide; And
This first oxide of cmp.
4. according to the method described in the claim 1, it is characterized in that: the step of described deposition second oxide comprises high temperature oxide deposition.
5. according to the method described in the claim 1, it is characterized in that: more include the following step:
Forming lining back, a plurality of beaks limit at a plurality of element regions formation sacrifical oxides; And;
Remove described sacrifical oxide.
6. according to the method described in the claim 1, it is characterized in that: described beak limit lining aligning also covers initial beak.
7. a method of utilizing the screen type beak to improve the electricity collapse of high density flash memory body tunnel oxide edge comprises the following steps:
Deposition one pad nitride in a substrate;
The pattern of definition one element region and shallow trench isolation on this pad nitride;
With the pad nitride is that shade etching substrate forms irrigation canals and ditches;
Formation one lining oxide forms an initial beak below extending to the edge of element region and invading this pad nitride in irrigation canals and ditches;
Depositing one first oxide fills up these irrigation canals and ditches and covers nitride;
This first oxide of etch-back;
Remove this pad nitride;
Deposit one second oxide and cover this first oxide and element region;
Etching second oxide is to form the edge of beak limit lining at this element region; And
Form tunnel oxide at this element region.
8. according to the method described in the claim 7, it is characterized in that: described formation lining oxide is to use 1100 to 1200 ℃ high-temperature oxidation.
9. according to the method described in the claim 7, it is characterized in that: described deposition first oxide is to use the high-density electric slurry oxide processing procedure, and its operating temperature is at 400 to 500 ℃.
10. according to the method described in the claim 7, it is characterized in that: described etch-back first oxide is to use cmp, and with the pad nitride be etch stop layer.
11. the method according to described in the claim 7 is characterized in that: described deposition second oxide is to use the high-temperature oxydation deposition manufacture process, and its operating temperature is at 800 to 900 ℃.
12. the method according to described in the claim 11 is characterized in that: described first and second oxide fuses together.
13. the method according to described in the claim 7 is characterized in that: surface one thickness of the described etching second oxide over etching to remove substrate in this element region.
14. the method according to described in the claim 7 is characterized in that: more comprise the following steps:
Forming lining back, beak limit at this element region formation sacrifical oxide; And
Remove this sacrifical oxide.
Priority Applications (1)
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CNB031236790A CN1301546C (en) | 2003-05-14 | 2003-05-14 | Method for improving dense fast flashing memory trough oxide layer edge electric avalanche utilizing shielding bird's mouth |
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CNB031236790A CN1301546C (en) | 2003-05-14 | 2003-05-14 | Method for improving dense fast flashing memory trough oxide layer edge electric avalanche utilizing shielding bird's mouth |
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CN1549323A CN1549323A (en) | 2004-11-24 |
CN1301546C true CN1301546C (en) | 2007-02-21 |
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CN103904037A (en) * | 2014-04-04 | 2014-07-02 | 武汉新芯集成电路制造有限公司 | Manufacturing method of NOR flash memory |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6051478A (en) * | 1997-12-18 | 2000-04-18 | Advanced Micro Devices, Inc. | Method of enhancing trench edge oxide quality |
US6054343A (en) * | 1998-01-26 | 2000-04-25 | Texas Instruments Incorporated | Nitride trench fill process for increasing shallow trench isolation (STI) robustness |
US6093619A (en) * | 1998-06-18 | 2000-07-25 | Taiwan Semiconductor Manufaturing Company | Method to form trench-free buried contact in process with STI technology |
US6130467A (en) * | 1997-12-18 | 2000-10-10 | Advanced Micro Devices, Inc. | Shallow trench isolation with spacers for improved gate oxide quality |
US6355539B1 (en) * | 2001-05-07 | 2002-03-12 | Macronix International Co., Ltd. | Method for forming shallow trench isolation |
CN1392604A (en) * | 2001-06-18 | 2003-01-22 | 矽统科技股份有限公司 | Method for elimianting leakage current of shallow channel isolation area |
US6541382B1 (en) * | 2000-04-17 | 2003-04-01 | Taiwan Semiconductor Manufacturing Company | Lining and corner rounding method for shallow trench isolation |
-
2003
- 2003-05-14 CN CNB031236790A patent/CN1301546C/en not_active Expired - Fee Related
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6051478A (en) * | 1997-12-18 | 2000-04-18 | Advanced Micro Devices, Inc. | Method of enhancing trench edge oxide quality |
US6130467A (en) * | 1997-12-18 | 2000-10-10 | Advanced Micro Devices, Inc. | Shallow trench isolation with spacers for improved gate oxide quality |
US6054343A (en) * | 1998-01-26 | 2000-04-25 | Texas Instruments Incorporated | Nitride trench fill process for increasing shallow trench isolation (STI) robustness |
US6093619A (en) * | 1998-06-18 | 2000-07-25 | Taiwan Semiconductor Manufaturing Company | Method to form trench-free buried contact in process with STI technology |
US6541382B1 (en) * | 2000-04-17 | 2003-04-01 | Taiwan Semiconductor Manufacturing Company | Lining and corner rounding method for shallow trench isolation |
US6355539B1 (en) * | 2001-05-07 | 2002-03-12 | Macronix International Co., Ltd. | Method for forming shallow trench isolation |
CN1392604A (en) * | 2001-06-18 | 2003-01-22 | 矽统科技股份有限公司 | Method for elimianting leakage current of shallow channel isolation area |
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