CN1312769C - 直接连结式芯片封装结构 - Google Patents

直接连结式芯片封装结构 Download PDF

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Publication number
CN1312769C
CN1312769C CNB2004100660953A CN200410066095A CN1312769C CN 1312769 C CN1312769 C CN 1312769C CN B2004100660953 A CNB2004100660953 A CN B2004100660953A CN 200410066095 A CN200410066095 A CN 200410066095A CN 1312769 C CN1312769 C CN 1312769C
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China
Prior art keywords
chip
lead frame
terminal pin
present
packaging structure
Prior art date
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CNB2004100660953A
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English (en)
Chinese (zh)
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CN1635635A (zh
Inventor
梁志忠
刘道明
周正伟
茅礼卿
闻荣福
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Changdian Technology Management Co ltd
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Jiangsu Changjiang Electronics Technology Co Ltd
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Priority to CNB2004100660953A priority Critical patent/CN1312769C/zh
Publication of CN1635635A publication Critical patent/CN1635635A/zh
Application granted granted Critical
Publication of CN1312769C publication Critical patent/CN1312769C/zh
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
CNB2004100660953A 2004-12-17 2004-12-17 直接连结式芯片封装结构 Active CN1312769C (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB2004100660953A CN1312769C (zh) 2004-12-17 2004-12-17 直接连结式芯片封装结构

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB2004100660953A CN1312769C (zh) 2004-12-17 2004-12-17 直接连结式芯片封装结构

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CN 200710007838 Division CN1992253A (zh) 2004-12-17 2004-12-17 直接连结式芯片封装用引线框

Publications (2)

Publication Number Publication Date
CN1635635A CN1635635A (zh) 2005-07-06
CN1312769C true CN1312769C (zh) 2007-04-25

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Country Status (1)

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CN (1) CN1312769C (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101958303B (zh) * 2010-09-04 2012-09-05 江苏长电科技股份有限公司 双面图形芯片正装单颗封装结构及其封装方法
CN101958305B (zh) * 2010-09-04 2012-09-19 江苏长电科技股份有限公司 双面图形芯片正装模组封装结构及其封装方法
CN101927669B (zh) * 2010-09-19 2012-08-15 广东省粤晶高科股份有限公司 一种轮胎压力监测装置的封装工艺

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07297320A (ja) * 1994-04-25 1995-11-10 Hitachi Cable Ltd Ｂｇａ型半導体装置
CN1162841A (zh) * 1996-03-22 1997-10-22 株式会社日立制作所 半导体集成电路器件及其制造方法
CN1303520A (zh) * 1998-05-29 2001-07-11 罗姆股份有限公司 半导体器件
CN2758976Y (zh) * 2004-12-17 2006-02-15 江苏长电科技股份有限公司 直接连结式芯片封装结构

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07297320A (ja) * 1994-04-25 1995-11-10 Hitachi Cable Ltd Ｂｇａ型半導体装置
CN1162841A (zh) * 1996-03-22 1997-10-22 株式会社日立制作所 半导体集成电路器件及其制造方法
CN1303520A (zh) * 1998-05-29 2001-07-11 罗姆股份有限公司 半导体器件
CN2758976Y (zh) * 2004-12-17 2006-02-15 江苏长电科技股份有限公司 直接连结式芯片封装结构

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Effective date of registration: 20221115

Address after: 201201 room 111, building 1, No. 200, Jichuang Road, Pudong New Area, Shanghai

Patentee after: Changdian Technology Management Co.,Ltd.

Address before: 214431 No. 275 middle Binjiang Road, Jiangsu, Jiangyin

Patentee before: JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY Co.,Ltd.