CN1438544A - Method for deep etching multi-layer high depth-width-ratio silicon stairs - Google Patents
Method for deep etching multi-layer high depth-width-ratio silicon stairs Download PDFInfo
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- CN1438544A CN1438544A CN 03104780 CN03104780A CN1438544A CN 1438544 A CN1438544 A CN 1438544A CN 03104780 CN03104780 CN 03104780 CN 03104780 A CN03104780 A CN 03104780A CN 1438544 A CN1438544 A CN 1438544A
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Abstract
Preparing masks for each etching is completed before deep etchings. With one layer of masks being removed, the next deep eetching in multiple layers deesidesteps etching is carried out. Thus, 3D technique for manufacturing structure of micro silicon is realized. That means not only the graphic structures can be made on the surface (X-Y) of silicon chips, but also the controllable polygonal line can be made along the Z direction. Comparing with the prior art, the invention realizes the structure of multiple layers deep sidesteps so as to provide the new processing means of MEMS technique. The invented technique is compatible to the existed silicon technique.
Description
Technical field: the present invention relates to a kind of microelectron-mechanical field, relate in particular to the job operation of a kind of microelectron mechanical structure or device.
Background technology: along with the lsi technology development of technology, its working ability no longer is confined to silicon chip surface, beginning is expanded the working ability that has formed MIniature machinery structure or device to the depth direction of silicon chip, has developed into microelectron-mechanical (MEMS) technology based on silicon technology thus.The silicon deep etching technology is the critical process in the MEMS technology.
Belong to emerging processing technique field in the silicon MEMS technology, its job operation and ability and the research of various microdevice and the demand of making also have no small gap, and the breakthrough of each process technology all plays very big impetus to the development of MEMS technology.
The realization of silicon deep etching technology has made the bulk silicon micro mechanic technology that very big expansion has been arranged; But the initial surface of deep erosion back silicon chip is bigger with the difference in height distance that is etched between the surface, district, has the surface of high aspect ratio structure can't carry out photoetching (uniform gluing, exposure and development) more this.Owing to can not on the silicon chip of deep erosion back, carry out photoetching, also just can't carry out the once more deeply erosion different with former etching figure.This means that the deep erosion of silicon can only carry out straight line processing in vertical direction, comparing this with traditional machining mode is a significantly shortcoming.
Summary of the invention:
The objective of the invention is to provides a kind of method that can realize the dark step etching of multilayer silicon at above-mentioned defective.
Multilayer high-aspect-ratio silicon bench deep etching method of the present invention comprises:
1, preparation layered mask material:
1-1) ground floor mask material preparation, the photoetching of ground floor mask pattern, corrosion;
1-2) second layer mask material preparation, the photoetching of second layer mask pattern, corrosion;
……
1-n) n layer mask material preparation, the photoetching of n layer mask pattern, corrosion;
2, repeatedly erosion deeply:
2-1) for the first time silicon loses deeply, n layer mask material remove;
2-2) silicon loses deeply for the second time, and n-1 layer mask material removed;
……;
2-n) the n time silicon loses deeply, and the ground floor mask material is removed.
Above-mentioned mask material can be many materials, also can be homogenous material.
This invention is on silicon of high aspect ratio lithographic technique basis, the demand of job operation has been proposed the process program of the dark ledge structure etching of multilayer silicon according to the research of MEMS device.
The invention has the advantages that:
Once, proposed before deep erosion, the preparation of the deep erosion of each time mask to be finished, whenever carry out once removing after the deep erosion one deck mask and carry out the dark step etching technics of the multilayer thought of next time losing deeply again, broken through the obstacle that can not carry out photoetching again after the deep erosion.
Two, designed and adopt different materials to prepare the dark step etching of silicon with the multilayer high-aspect-ratio silicon bench etching technics scheme of compound step mask and the multilayer high-aspect-ratio silicon bench etching technics scheme of employing homogenous material step mask.
The present invention makes silicon micromachining technology make different graphic structures in silicon chip surface (X-Y two dimensional surface), also can realize controlled broken line processing, (seeing Fig. 1 and Fig. 2) in (Z axle) direction perpendicular to silicon chip surface.We can say that also this is a kind of three-dimensional process technology of little silicon structure.Break through the restriction that deep in the past erosion can only carve the vertical sidewall deep trouth, realized the multilayer ledge structure on the vertical direction.This new technology is extended silicon micromechanical structure processing and has been pushed real 3 D stereoization to from simple planar graph three-dimensional, for the development of MEMS technology provides a kind of brand-new manufacturing process.
In addition, the individual event technology and the existing silicon technology that use in this invention be compatible fully, therefore has very strong practicality.
Description of drawings:
Fig. 1 traditional silicon is lost synoptic diagram deeply
Fig. 2 silicon of the present invention loses synoptic diagram deeply
The dark step etch process flow of the three floor height depth-to-width ratio silicon figure of the compound step mask of Fig. 3
The 1-silicon chip, 2-monox, 3-photoresist, 4-silicon nitride, 5-aluminium
Fig. 3 a thermal oxide, photoetching for the first time
Fig. 3 b silica erosion
Fig. 3 c silicon nitride deposition, photoetching for the second time
Fig. 3 d silicon nitride etch, silica erosion
The deposit of Fig. 3 e aluminium, photoetching for the third time, corrosion aluminium
Fig. 3 f silicon for the first time loses deeply
Fig. 3 g removes aluminium
Fig. 3 h silicon for the second time loses deeply
Fig. 3 i removes silicon nitride, silicon loses deeply for the third time
Fig. 3 j three floor height depth-to-width ratio silicon etching results' Electronic Speculum (SEM) photo
The dark step etch process flow of the three floor height depth-to-width ratio silicon figure of Fig. 4 homogenous material step mask
Fig. 4 a: silicon oxide deposition, photoetching for the first time
Fig. 4 b silica erosion
Fig. 4 c photoetching for the second time, silica erosion
Fig. 4 d photoetching for the third time, silica erosion
Fig. 4 e silicon first time loses deeply, the corrosion of ground floor monox step
Fig. 4 f silicon second time loses deeply, the corrosion of second layer monox step
Figure g silicon for the third time loses deeply
Fig. 4 h three floor height depth-to-width ratio silicon etching results' Electronic Speculum (SEM) photo
Embodiment:
Be that example is further detailed the present invention with multiple material and homogenous material respectively below, but be not construed as limiting the invention.
Embodiment 1: use the dark step etch process flow of three floor height depth-to-width ratio silicon of the compound step mask of multiple material, as shown in Figure 3
1, thermal oxide (ground floor mask, thickness is determined by etching depth)
2, for the first time photoetching, silica erosion, remove photoresist
3, silicon nitride deposition (second layer mask, thickness is determined by etching depth)
4, for the second time photoetching, silicon nitride etch, remove photoresist
5, aluminium deposit (tri-layer masking, thickness is determined by etching depth)
6, photoetching for the third time, the corrosion aluminium, remove photoresist
7, silicon loses deeply for the first time
8, remove aluminium (tri-layer masking removal)
9, silicon loses deeply for the second time
10, silicon nitride etch (removal of second layer mask)
11, silicon loses deeply for the third time
12, silica erosion (tri-layer masking removal)
Embodiment 2: use the dark step etch process flow of three floor height depth-to-width ratio silicon of homogenous material step mask, as shown in Figure 4
1, silicon oxide deposition (mask material, thickness is determined by total etching depth)
2, photoetching for the first time
3, ground floor monox step corrodes (corrosion depth is determined by etching depth), removes photoresist
4, photoetching for the second time
5, second layer monox step corrodes (corrosion depth is determined by etching depth), removes photoresist
6, photoetching for the third time
7, the 3rd layer of monox step corrodes (corrosion depth is determined by etching depth), removes photoresist
8, silicon loses deeply for the first time
9, silica erosion (the 3rd layer of monox step mask removed)
10, silicon loses deeply for the second time
11, silicon nitride etch (removal of second layer monox step mask)
12, silicon loses deeply for the third time
13, silica erosion (the 3rd layer of monox step mask removed)
The present invention can use in the process technology research of MEMS devices such as photoswitch, accelerometer, micro-nozzle, biochip, becomes the gordian technique in the MEMS standardization technology of studying.
Claims (4)
1, a kind of multilayer high-aspect-ratio silicon bench deep etching method, its step comprises:
1) preparation layered mask material:
1-1) ground floor mask material preparation, the photoetching of ground floor mask pattern, corrosion;
1-2) second layer mask material preparation, the photoetching of second layer mask pattern, corrosion;
……
1-n) n layer mask material preparation, the photoetching of n layer mask pattern, corrosion;
2) repeatedly erosion deeply:
2-1) for the first time silicon loses deeply, n layer mask material remove;
2-2) silicon loses deeply for the second time, and n-1 layer mask material removed;
……;
2-n) the n time silicon loses deeply, and the ground floor mask material is removed.
2, multilayer high-aspect-ratio silicon bench deep etching method as claimed in claim 1 is characterized in that described mask material can be many materials, also can be homogenous material.
3, multilayer high-aspect-ratio silicon bench deep etching method as claimed in claim 1 is characterized in that using the compound step mask of multiple material to carry out the dark step etching of three floor height depth-to-width ratio silicon, and its step is
1) thermal oxide forms the ground floor mask, and thickness is determined by etching depth;
2) for the first time photoetching, silica erosion, remove photoresist;
3) silicon nitride deposition forms second layer mask, and thickness is determined by etching depth;
4) for the second time photoetching, silicon nitride etch, remove photoresist;
5) the aluminium deposit forms tri-layer masking, and thickness is determined by etching depth;
6) photoetching for the third time, the corrosion aluminium, remove photoresist;
7) silicon loses deeply for the first time;
8) remove aluminium, remove tri-layer masking;
9) silicon loses deeply for the second time;
10) silicon nitride etch is removed second layer mask;
11) silicon loses deeply for the third time
12) silica erosion is removed tri-layer masking.
4, multilayer high-aspect-ratio silicon bench deep etching method as claimed in claim 1 is characterized in that using homogenous material step mask to carry out the dark step etching of three floor height depth-to-width ratio silicon, and its step is
1) silicon oxide deposition mask material, thickness is determined by total etching depth;
2) photoetching for the first time;
3) ground floor monox step corrosion, corrosion depth is determined by etching depth, removes photoresist;
4) photoetching for the second time;
5) second layer monox step corrosion, corrosion depth is determined by etching depth, removes photoresist;
6) photoetching for the third time;
7) the 3rd layer of monox step corrosion, corrosion depth is determined by etching depth, removes photoresist;
8) silicon loses deeply for the first time;
9) silica erosion is removed the 3rd layer of monox step mask;
10) silicon loses deeply for the second time;
11) silicon nitride etch is removed second layer monox step mask;
12) silicon loses deeply for the third time;
13) silica erosion is removed the 3rd layer of monox step mask.
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Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
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CN100347612C (en) * | 2003-09-18 | 2007-11-07 | Nec液晶技术株式会社 | Method for processing substrate and medicinal liquid used therefor |
CN101648695B (en) * | 2009-09-07 | 2012-05-30 | 北京时代民芯科技有限公司 | MEMS bulk silicon technological method for transferring mask layer three-dimensional structure |
CN102543682A (en) * | 2012-02-17 | 2012-07-04 | 上海先进半导体制造股份有限公司 | Method for forming multistage deep step |
CN103907173A (en) * | 2011-09-02 | 2014-07-02 | 莫克斯泰克公司 | Fine pitch wire grid polarizer |
CN104445051A (en) * | 2014-12-02 | 2015-03-25 | 中国科学院半导体研究所 | Method for preparing multi-stage steps on substrate |
US9348076B2 (en) | 2013-10-24 | 2016-05-24 | Moxtek, Inc. | Polarizer with variable inter-wire distance |
CN107861338A (en) * | 2017-11-28 | 2018-03-30 | 华中科技大学 | A kind of method that three-dimension curved surface exposure and etching are realized using grayscale mask version |
CN108417529A (en) * | 2018-02-09 | 2018-08-17 | 武汉新芯集成电路制造有限公司 | A kind of lithographic method of contact hole |
CN111403391A (en) * | 2020-03-25 | 2020-07-10 | 长江存储科技有限责任公司 | Method for forming step region, semiconductor device and 3D NAND |
CN111620297A (en) * | 2020-05-27 | 2020-09-04 | 瑞声声学科技(深圳)有限公司 | Deep cavity etching method |
CN112408314A (en) * | 2020-11-05 | 2021-02-26 | 中国航空工业集团公司西安飞行自动控制研究所 | Multi-layer mask step-by-step etching method |
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2003
- 2003-02-28 CN CN 03104780 patent/CN1438544A/en active Pending
Cited By (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100347612C (en) * | 2003-09-18 | 2007-11-07 | Nec液晶技术株式会社 | Method for processing substrate and medicinal liquid used therefor |
CN101648695B (en) * | 2009-09-07 | 2012-05-30 | 北京时代民芯科技有限公司 | MEMS bulk silicon technological method for transferring mask layer three-dimensional structure |
CN103907173A (en) * | 2011-09-02 | 2014-07-02 | 莫克斯泰克公司 | Fine pitch wire grid polarizer |
CN103907173B (en) * | 2011-09-02 | 2015-06-03 | 莫克斯泰克公司 | Fine pitch wire grid polarizer |
CN102543682A (en) * | 2012-02-17 | 2012-07-04 | 上海先进半导体制造股份有限公司 | Method for forming multistage deep step |
US9632223B2 (en) | 2013-10-24 | 2017-04-25 | Moxtek, Inc. | Wire grid polarizer with side region |
US9348076B2 (en) | 2013-10-24 | 2016-05-24 | Moxtek, Inc. | Polarizer with variable inter-wire distance |
US9354374B2 (en) | 2013-10-24 | 2016-05-31 | Moxtek, Inc. | Polarizer with wire pair over rib |
CN104445051A (en) * | 2014-12-02 | 2015-03-25 | 中国科学院半导体研究所 | Method for preparing multi-stage steps on substrate |
CN107861338A (en) * | 2017-11-28 | 2018-03-30 | 华中科技大学 | A kind of method that three-dimension curved surface exposure and etching are realized using grayscale mask version |
CN108417529A (en) * | 2018-02-09 | 2018-08-17 | 武汉新芯集成电路制造有限公司 | A kind of lithographic method of contact hole |
CN108417529B (en) * | 2018-02-09 | 2021-08-27 | 武汉新芯集成电路制造有限公司 | Etching method of contact hole |
CN111403391A (en) * | 2020-03-25 | 2020-07-10 | 长江存储科技有限责任公司 | Method for forming step region, semiconductor device and 3D NAND |
CN111403391B (en) * | 2020-03-25 | 2022-11-01 | 长江存储科技有限责任公司 | Method for forming step region, semiconductor device and 3D NAND |
CN111620297A (en) * | 2020-05-27 | 2020-09-04 | 瑞声声学科技(深圳)有限公司 | Deep cavity etching method |
CN111620297B (en) * | 2020-05-27 | 2023-02-28 | 瑞声声学科技(深圳)有限公司 | Deep cavity etching method |
CN112408314A (en) * | 2020-11-05 | 2021-02-26 | 中国航空工业集团公司西安飞行自动控制研究所 | Multi-layer mask step-by-step etching method |
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