CN1445821A - ZnO膜和ZnO半导体层的形成方法、半导体元件及其制造方法 - Google Patents
ZnO膜和ZnO半导体层的形成方法、半导体元件及其制造方法 Download PDFInfo
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Abstract
一种ZnO半导体层的形成方法,在基板上形成导电率低于1×10-9S/cm的ZnO缓冲层、或者是形成通过X射线衍射法得到的晶面的衍射峰中具有除(002)和(004)以外的峰的ZnO缓冲层,然后在上述ZnO缓冲层上形成ZnO半导体层。在溅射气体中的氧气流量比小于形成ZnO缓冲层时的条件下,形成ZnO半导体层。本发明还提供了ZnO膜的形成方法、半导体元件的制造方法及半导体元件。
Description
技术领域
本发明涉及ZnO(氧化锌)膜的形成方法、ZnO半导体层的形成方法、具有ZnO半导体层的发光元件、受光元件或薄膜晶体管(TFT)等半导体元件的制造方法以及具有ZnO半导体层的半导体元件。
背景技术
因为ZnO半导体具有直接迁移、禁带宽度大(~3.4Ev)的特点,所以人们探讨了ZnO半导体在发出或接受从蓝色至紫外区的光的发光/受光元件或TFT等半导体元件中的应用。
作为形成ZnO半导体层的方法,已知的有MBE法、溅射法、激光加工(abrasion)法等,近年,为了提高ZnO半导体层的结晶性,探讨了通过缓冲层,形成ZnO半导体层的方法。
在特开2000-244014号公报中记载,如果通过包含Al、Mg等杂质的ZnO缓冲层形成ZnO发光层,将能够形成具有良好结晶性的ZnO发光层。另外,在特开2001-287998号公报中记载,如果通过在比形成半导体层时的温度低的温度下形成的ZnO缓冲层,形成ZnO半导体层,则能够形成具有良好结晶性的ZnO半导体层。
但是,采用含有上述杂质的缓冲层的以往技术中,需要另准备Al、Mg等杂质源,由此产生制造费用增加的问题。另外,通过溅射法形成含有杂质的缓冲层时,将在形成室内的壁面等处也形成含杂质的ZnO膜。因此,如果在同一个形成室中形成缓冲层和ZnO发光层,则Al、Mg等杂质将从ZnO发光层形成时附着在壁面等的ZnO膜,排放到形成室内,并这些不需要的杂质有可能进入ZnO发光层中。并且在缓冲层中含有的上述杂质向ZnO发光层扩散,这样杂质有可能进入到ZnO发光层中。这些不想需要杂质的进入,容易使发光层的发光特性降低。并且,如果为了抑制上述不想需要杂质的进入,而分别设置缓冲层形成用的形成室和发光层形成用的形成室,则导致装置费用升高,随之制造费用也上升。
另外,使用在低温下形成的缓冲层的以往技术,虽然能够抑制不想需要杂质的进入,但是缓冲层形成时的温度和半导体形成时的温度不相同。因此,如果在同一形成室中要形成ZnO缓冲层和ZnO半导体层,则因为在缓冲层形成结束后至开始形成半导体层期间,需要基板升温的时间,所以存在所需时间长,导致制造费用上升的问题。另外,为了提高生产率,可以分别设置缓冲层形成用的形成室和半导体层形成用的形成室,但是在这种情况下,也同样使装置费用增大,随之制造费用也上升。
TFT、发光元件、压电体等电子设备是将绝缘膜、半导体膜或导电膜等导电率不同的薄膜层叠而构成。ZnO是为了形成绝缘膜、半导体膜或导电膜等而使用的。使用ZnO构成电子设备时,上述电子设备是通过层叠ZnO膜和由导电率不同于ZnO的物质构成的膜或者是层叠各自导电率不同的多个ZnO膜而形成。由溅射法形成导电率不同的多个ZnO膜时,应调整各ZnO膜中的载流子密度,并使用所掺杂的杂质(Al、Ga)含量不同的ZnO靶,形成各ZnO膜。
但是,用以往的形成方法形成导电率不同的薄膜时,因为需要准备多种物质(ZnO和导电率不同于ZnO的物质),或者需要准备杂质含量不同的多个ZnO靶,所以出现使材料费用上升或者使制造工序数增加等电子设备成本上升的问题。
发明内容
本发明是鉴于以上问题而提出的,其目的在于提供一种能够廉价地形成结晶性良好的ZnO半导体层的方法。
本发明的另一目的在于,提供一种能够以廉价地制造出具备结晶性良好的ZnO半导体层的半导体元件的制造方法。
本发明的另一目的在于,提供一种具备结晶性良好的ZnO半导体层的半导体元件。
本发明的另一目的在于,提供一种降低材料成本,并能够容易地形成导电率不同的多个ZnO膜的形成方法。
本发明的另一目的在于,提供一种能够容易地制造出具有导电率从基板侧向膜厚方向连续变化的ZnO膜的半导体元件的制造方法。
本发明之1的ZnO半导体层的方法是,在基板上形成导电率低于1×10-9S/cm的ZnO缓冲层,然后在ZnO缓冲层上形成ZnO半导体层,或者在基板上形成通过X射线衍射法得到的晶面的衍射峰中具有(002)和(004)以外的峰,具体地具有(103)或(112)峰的ZnO缓冲层,然后在ZnO缓冲层上形成ZnO半导体层。
本发明之1的ZnO半导体层的方法中,因为在基板上形成导电率低于1×10-9S/cm的ZnO缓冲层或者形成具有(002)和(004)以外峰的ZnO缓冲层,然后在ZnO缓冲层上形成ZnO半导体层,所以能够形成具有良好的结晶性,且迁移率提高的ZnO半导体层。其理由如下。
在导电率低于1×10-9S/cm的ZnO缓冲层中,或者在具有除(002)和(004)以外的峰的ZnO缓冲层中,存在大粒径的晶粒并且每个大粒径晶粒,相隔一定距离,分散存在。另外,ZnO半导体层是以ZnO缓冲层中的大直径晶粒作为晶核,进行晶体成长,这时,在ZnO缓冲层中因为上述大直径晶粒相隔一定距离分散存在,所以晶体成长时,很少发生相邻的晶粒之间相互碰撞,而阻止相互的晶体生长的现象,所以生长成为晶体粒径大的ZnO半导体。另外,因为ZnO缓冲层是不含Al、Mg等不想需要杂质的无掺杂物物层,所以不会发生由于进入不想需要的杂质而导致ZnO半导体层的特性的降低的问题。另外,因为缓冲层的材料和半导体层的材料相同,所以缓冲层和半导体层之间的接合是同性接合,从而得到良好的晶格匹配。其结果,能够形成具有良好的结晶性、迁移率提高的ZnO半导体层。
本发明之2的ZnO半导体层的方法是,在基板上用溅射法形成ZnO半导体层的方法,使用含氧气的溅射气体,在基板上形成ZnO缓冲层,然后在溅射气体中的氧气流量比小于形成ZnO缓冲层时的条件下,在ZnO缓冲层上形成ZnO半导体层。
在本发明之2的ZnO半导体层的形成方法中,因为在溅射气体中的氧气流量比大的条件下,在基板上形成ZnO半导体层,所以在ZnO缓冲层中形成大粒径晶粒,并且大直径的晶粒不会相互挨着,而是相隔一定的距离分散存在。另外,因为在溅射气体中的氧气流量比小于形成ZnO缓冲层时的条件下形成,所以能够形成导电率大于ZnO缓冲层且起到半导体功能的ZnO半导体层。另外,ZnO半导体层是将ZnO缓冲层中的大直径的晶粒作为晶核而使晶体生长,这时,因为这些大直径的晶粒相隔一定的距离分散存在,所以不会发生晶体生长时相邻的晶粒之间相撞而防碍互相的晶体生长的问题,从而生长成为晶粒径大的ZnO半导体。另外因为ZnO缓冲层是不含Al,Mg等不想需要杂质的无掺杂物层,所以不会由不想需要杂质的进入而导致ZnO半导体层的特性降低的问题。另外,因为缓冲层的材料和半导体层的材料相同,所以缓冲层和半导体层之间的接合是同性接合,从而能够得到良好的晶格匹配。其结果,能够形成具有良好的结晶性、迁移率提高的ZnO半导体层。
在本发明之2中,理想的是调整溅射气体中的氧气流量比形成ZnO缓冲层,使得导电率小于1×10-9S/cm或者通过X射线衍射法得到的晶面的衍射峰中具有除(002)和(004)以外的峰、具体地具有(103)或(112)峰。由此,因为能够形成具有直径更大的晶粒、并且相邻的晶粒之间相隔充分的距离分散存在的ZnO缓冲层,所以能够有效地提高ZnO半导体层的结晶性,迁移率。这时,理想的是使氧气流量比大于20%而形成ZnO缓冲层。如上述通过使氧气流量比大于20%,能够形成导电率小于1×10-9S/cm的ZnO缓冲层或者是具有除(002)和(004)以外的峰的ZnO缓冲层,所以能够形成具有良好的结晶性、迁移率高的ZnO半导体层。另外,ZnO缓冲层的膜厚大于500nm是理想的。通过使膜厚大于500nm,因为能够充分发挥作为缓冲层的功能,所以能够形成结晶性良好、迁移率高的ZnO半导体层。并且连续地形成ZnO缓冲层和ZnO半导体层是理想的。通过这样的结构,能够缩短形成时间,所以可以减少制造成本。另外,这时,边逐渐减少溅射气体中的氧气流量比,边形成是理想的。通过这样的结构,能够谋求缩短形成时间,所以可以减少制造成本。另外,在同一形成室内形成ZnO缓冲层和ZnO半导体层是理想的。根据这样的结构,因为能够减少形成室的数量,所以能够缩短形成时间、减少制造费用,降低制造成本。
本发明之3的半导体元件的制造方法,具有在基板上形成导电率小于1×10-9S/cm的ZnO缓冲层的工序和在ZnO层上形成ZnO半导体层的工序,或者具有在基板上形成通过X射线衍射法得到的晶面的衍射峰中具有除(002)和(004)以外的、具体地具有(103)或(112)的峰的ZnO缓冲层的工序和在ZnO缓冲层上形成ZnO半导体层的工序。
本发明之3的半导体元件的制造方法中,因为在基板上形成导电率小于1×10-9S/cm的ZnO缓冲层、或者形成具有除(002)和(004)以外的峰的ZnO缓冲层,然后在ZnO缓冲层上形成ZnO半导体层,所以如在本发明之1中所述,能够形成结晶性良好、迁移率提高的ZnO半导体层,从而能够制造出设有具有以上优异特性的ZnO半导体层的半导体元件。
本发明之4的半导体元件的制造方法是,具有由溅射法形成的ZnO半导体层的半导体元件的方法,具有使用含氧气的溅射气体,在基板上形成ZnO缓冲层的工序和在溅射气体中的氧气流量比小于形成ZnO缓冲层时的条件下,在ZnO缓冲层上形成ZnO半导体层的工序。
本发明之4的半导体元件的制造方法中,如在本发明之2中所述,因为能够形成结晶性良好、迁移率提高的ZnO半导体层,所以能够廉价地制造出设有具有以上优异特性的ZnO半导体层的半导体元件。
在本发明之4中,理想的是调整溅射气体中的氧气流量比,使导电率小于1×10-9S/cm或者通过X射线衍射法的晶面的衍射峰中具有除(002)和(004)以外的峰、具体地具有(103)或(112)峰地形成ZnO缓冲层。由此,因为能够形成具有直径更大的晶粒,并且相邻的晶粒之间相隔充分的距离分散存在的ZnO缓冲层,所以能够有效地制造出具有结晶性、迁移率更加提高的ZnO半导体层的半导体元件。这时,理想的是在溅射气体中的氧气流量比大于20%的条件下形成ZnO缓冲层。如上述通过使氧气流量比大于20%以上,能够形成导电率小于1×10-9S/cm的ZnO缓冲层或具有除(002)和(004)以外的峰的ZnO缓冲层,所以能够制造出具有结晶性良好、迁移率高的ZnO半导体层的半导体元件。另外,ZnO缓冲层的膜厚大于500nm是理想的。通过使膜厚大于500nm,因为能够充分发挥作为缓冲层的功能,所以能够制造出具有良好的结晶性、迁移率高的ZnO半导体层的半导体元件。
本发明之5的半导体元件具备基板、在基板上形成的导电率小于1×10-9S/cm的ZnO缓冲层、在ZnO缓冲层上形成的ZnO半导体层,或者具备基板、形成在基板上,并通过X射线衍射法得到的晶面的衍射峰中具有除(002)和(004)以外的峰、具体地具有(103)或(112)峰的ZnO缓冲层、在ZnO缓冲层上形成的ZnO半导体层。
本发明之5的半导体元件中,因为具有在导电率低于1×10-9S/cm的ZnO缓冲层上或者在具有除(002)和(004)以外的峰的ZnO缓冲层上形成的ZnO半导体层,所以如在上述本发明之1的说明,具有良好的结晶性,且迁移率提高的ZnO半导体层,从而能够提供元件特性优异的半导体元件。
本发明之6的ZnO膜形成方法是,通过溅射法形成ZnO膜的方法中,作为靶,使用无掺杂物物的ZnO,作为溅射气体,使用惰性气体、氧气、或惰性气体和氧气的混合气体,并在成膜过程中增加或减少氧气流量比。
本发明之6的ZnO膜形成方法中,因为随着形成ZnO膜时的溅射气体中的氧气流量比,形成的ZnO膜的导电率发生变化,所以作为靶材料仅使用无掺杂物物的ZnO,通过改变氧气流量比,能够调整ZnO膜内的导电率。即因为仅使用ZnO,所以能够降低材料成本,并且因为没有必要交换靶,所以能够减少制造工序数量,因为通过改变氧气流量比而能够调整导电率,所以能够容易地制造出导电率不同的多个ZnO膜。因此,能够防止用ZnO膜构成的电子设备的高成本化,并且能够提高设计电子设备时的自由度。另外,溅射气体中的氧气流量比为100%时,溅射气体仅是由氧气构成,而把氧气流量比作为0%时,溅射气体仅是由惰性气体构成。
本发明之6中,连续地增加或减少氧气流量比。当连续地增加形成ZnO膜时的溅射气体中的氧气流量比时,形成的ZnO膜的导电率连续地减少,而连续地减少氧气流量比时,因为形成的ZnO膜的导电率连续地增加,所以能够容易地制造出导电率沿膜厚方向连续变化的ZnO膜。因此,能够以低成本容易地制造出例如具有LDD(Lightly Doped Drain)/半导体膜(活性层)结构的叠层膜。
在本发明之6中,交替地增加/减少氧气流量比。例如,提高溅射气体中的氧气流量比而形成第1ZnO膜,接着降低氧气流量比而在第1ZnO膜上形成第2ZnO膜。这时,第1ZnO膜的导电率低于第2ZnO膜。由此能够容易地将导电率高的ZnO膜和导电率低的ZnO膜交替层叠,所以能够容易地以低成本地形成导电率不同的多个ZnO膜的叠层结构。
本发明之7的半导体元件的制造方法是,在基板上通过溅射法层叠ZnO膜,并设置源极、漏电极以及栅电极,其中作为靶,使用无掺杂物物的ZnO,作为溅射气体,使用惰性气体、氧气或惰性气体和氧气的混合气体。首先作为溅射气体使用氧气或混合气体,通过溅射法,开始形成第1ZnO膜,接着,边连续地减少溅射气体中的氧气流量比,边通过溅射法,形成第2ZnO膜,然后形成分割第2ZnO膜的槽部,接着隔着绝缘层在槽部之上设置栅电极,并夹住槽部,在第2ZnO膜上设置源极和漏电极。
在本发明之7的半导体元件的制造方法中,因为形成第1ZnO膜后,边连续地减少氧气流量边形成第2ZnO膜,所以第2ZnO膜的导电率将从基板侧向膜厚方向连续地增大。因此,导电率高的第2ZnO膜的源极和漏电极侧的区能够起到源区和漏区的作用,能够使比该区导电率低的第2ZnO膜的第1ZnO膜侧区起到LDD区的作用。
下面,根据附图更加详细地说明本发明。
附图说明图1是用于说明本发明的ZnO半导体层的形成方法的结构剖视图。图2是表示ZnO膜(膜厚:200nm)的导电率和氧气流量比之间关系的特性图。图3是表示ZnO膜(膜厚:500nm)的导电率和氧气流量比之间关系的特性图。图4是表示ZnO膜(膜厚:1000nm)的导电率和氧气流量比之间关系的特性图。图5是表示ZnO膜(膜厚:200nm)的X射线衍射的评价结果的特性图。图6是表示ZnO膜(膜厚:500nm)的X射线衍射的评价结果的特性图。图7是表示ZnO膜(膜厚:1000nm)的X射线衍射的评价结果的特性图。图8是表示ZnO膜(氧气流量比:0%)的SEM像的相片图9是表示ZnO膜(氧气流量比:25%)的SEM像的相片图10是表示ZnO膜(氧气流量比:100%)的SEM像的相片图11是ZnO膜表面SEM照片的模式图。图12是表示通过X射线衍射,评价ZnO膜的结晶性的结果的特性图。图13是表示玻璃/ZnO缓冲层/ZnO半导体层的层叠膜的X射线衍射评价结果的特性图。图14是表示玻璃/ZnO缓冲层/ZnO半导体层的层叠膜的SEM像的照片。图15是表示本发明的晶体生长状态的模式图。图16是表示比较例的晶体生长状态的模式图。图17是表示玻璃/ZnO缓冲层/ZnO半导体层的层叠膜的迁移率和ZnO缓冲层膜厚之间关系的特性图。图18是表示玻璃/ZnO缓冲层/ZnO半导体层的层叠膜中的载流子密度和ZnO缓冲层膜厚之间关系的特性图。图19是本发明的半导体元件(FET)的制造方法的工序图。图20是本发明的半导体元件(发光二极管)的制造方法的工序图。图21是用于说明本发明的ZnO膜制造方法的结构剖视图。图22是本发明的多层ZnO膜的模式图。图23是本发明的半导体元件(FET)的制造方法的工序图。图24是本发明的半导体元件(FET)的制造方法的工序图。
具体实施方式
下面,根据附图详细说明本发明的实施方式。
(实施方式1)
图1是用于说明本发明实施方式1的ZnO半导体层的形成方法的结构剖视图。参照图1,1为基板,可以使用玻璃基板、蓝宝石基板、水晶基板、硅基板、熔融石英基板等,但并不限定在这些。2是ZnO缓冲层,3是ZnO半导体层。在本实施方式中,ZnO缓冲层2是通过溅射法,在氧气流量比大的条件下形成,ZnO半导体层3是通过溅射法,在氧气流量比小的条件下形成。
这里,下面详述溅射气体中的氧气流量比对ZnO膜的结晶性的影响。
图2、图3、图4是表示各种各样地改变溅射气体中氧气的流量比,而在玻璃基板上形成的厚度为200nm、500nm、1000nm的ZnO膜的导电率和氧气流量比之间关系的特性图。形成条件如图表1所示,作为溅射气体使用了Ar气体和O2气体的混合气体。另外,形成ZnO膜时使用RF磁控管溅射装置。
表1
靶 | 没有掺杂物的ZnO |
基板温度 | 300℃ |
RF电力 | 100W |
压力 | 0.6Pa |
溅射气体 | Ar:0~15sccm |
O2:0~15sccm(控制Ar流量和O2流量,使它们的总量为15sccm) |
由图2~4可知,所形成的ZnO膜的导电率受溅射气体中的氧气流量比的影响很大,氧气流量比越大,导电率越小,而成为电阻高的ZnO膜。这是因为在ZnO膜中含有大量氧气时,由氧气缺乏产生的施主减少,而导电率下降的缘故。另外,厚度为200nm的ZnO膜中,即使把氧气流量比加大到何种程度,导电率不会小于1×10-9S/cm(图2),而在厚度为500nm的ZnO膜中,当氧气流量比大于20%(图3),在厚度为1000nm的ZnO膜中,当氧气流量比大于10%(图4)时,能够使导电率小于1×10-9S/cm。另外,在本发明中,ZnO半导体层是指具有n型或p型导电性的ZnO半导体层,例如导电率约大于1×10-9S/cm的ZnO半导体层。这样的ZnO半导体层可以在溅射气体中的氧气流量比极小的条件下形成。另外,由霍尔效果测定结果可知,在氧气流量比小的条件下形成的导电率高的膜具有n型的导电性。
图5、图6、图7是对于上述的厚度为200nm、500nm、1000nm的ZnO膜,通过X射线衍射(XRD),评价分别在0%、25%、100%氧气流量比下形成的膜的结晶性后得到的结果的特性图,表示XRD的测定光谱。
对于厚度为500nm和1000nm的ZnO膜,通过提高氧气流量比(25%、100%),由XRD评价的ZnO晶面的衍射峰中,除了(002)和(004)之外,还具有(103)或(112)的峰。
另外,图8、图9、图10是表示ZnO膜的表面和截面的SEM像(2次电子像)的照片。另外,图11是表示在0%、25%、100%的氧气流量比下形成的ZnO膜的SEM照片的结果的模式图。在图11中,用A表示的区表示粒径大于400nm的大粒径的结晶区,用B表示的区表示微小粒径(粒径小于20nm)的集合区。当氧气流量比小时,粒径小的结晶相互邻近,存在许多,当氧气流量比小时,粒径大的结晶相隔一定的距离分散存在。
图12是表示通过XRD评价在图2中表示的膜厚为200nm的ZnO膜的结晶性的结果的特性图,表示XRD的测定谱。另外,图中在各峰的旁边所表示的值表示膜形成时溅射气体中的氧气流量比。由图12可知,在所有的ZnO膜中观察到由(002)面产生的峰,氧气流量比越大,其峰高度越高,特别是氧气流量比大于50%时,峰高大幅度地增大,结晶性提高。
在表2中总结了改变氧气流量比得到的在图12中所示的各ZnO膜的结晶性和晶粒径大小的评价结果。另外,结晶性的评价是,将氧气流量比为100%时,得到的ZnO膜(002)面的峰高度作为100,用相对值来表示各样品的(002)面的峰高度。另外,晶粒径是由SEM相片得到。
表2
氧气流量比(%) | 0 | 10 | 25 | 35 | 50 | 75 | 100 |
(002)面强度比(%) | 20 | 17 | 18 | 19 | 31 | 69 | 100 |
粒径(nm) | 40 | 40 | 67 | 67 | 70 | 75 | 80 |
如上所述,当使用溅射法形成ZnO膜时,溅射气体中的氧气流量比越大,晶粒径越大,另外,通过使上述氧气流量比大,能够得到膜的X射线衍射图案中,除(002)和(004)以外,在(103)或(112)具有峰的膜,另外,上述氧气流量比越大,能够得到(002)面的峰高值越大的膜。
作为缓冲层,理想的是使用晶粒径大且晶粒分散存在的膜。即通过使用晶粒存在的缓冲层,能够以缓冲层中的晶粒为核,使半导体层晶体生长。这时,通过使用晶粒相隔一定距离分散存在的缓冲层,能够防止晶体生长时相邻的结晶之间碰撞而防碍晶体生长的现象,能够生长为具有粒径大的晶粒的半导体层。另外,如果缓冲层中的晶粒大量地密接存在,则晶体生长时相邻的结晶之间碰撞,而阻碍晶体生长,难以长成大粒径的晶体。另外,作为晶核的晶粒的粒径越大,将上述作为核而生长的结晶的粒径能够越大。
另外,作为缓冲层,通过使用与半导体层相同材料的ZnO,不会发生不想需要的杂质从缓冲层的扩散等的问题,从而能够形成具有良好特性的ZnO半导体层。
从以上的情况可以认为,将加大溅射气体中的氧气流量比而形成的、大粒径的晶粒相隔一定的距离分散存在的ZnO膜作为缓冲层使用,并在其之上形成ZnO半导体层,由此能够得到大粒径且结晶性优异的ZnO半导体层。
作为上述大粒径的晶粒分散存在的ZnO缓冲层,具体地以导电率为1×10-9S/cm以下的ZnO膜,或者在通过X射线衍射法测定的晶面的衍射峰中,具有除(002)和(004)以外的峰[例如(103)或(112)的峰]的ZnO膜为理想。
如图12所示,导电率为1×10-9S/cm以下的ZnO膜,其结晶性高,并且如图11所示,粒径大的晶粒相隔一定的间隔分散存在。另外,由图5~图10的结果可知,具有除(002)和(004)以外的峰[例如(103)或(112)的峰]的ZnO膜与只具有(002)和(004)峰的ZnO膜相比,膜中存在的残留应力大,粒径大的晶粒相隔一定的间隔分散存在
因此,导电率为1×10-9S/cm以下的ZnO膜或者具有除(002)和(004)以外的峰的ZnO膜,作为缓冲层是理想的。导电率为1×10-9S/cm以下的ZnO膜,例如可以使用溅射法,在氧气流量比为20%以上的条件下形成。另外,如上述调整氧气流量比而形成的ZnO溅射层的导电率下限是在氧气流量比为100%时,为1×10-12S/cm左右。另外,具有除(002)和(004)以外的峰[例如(103)或(112)的峰]的ZnO膜,例如可以使用溅射法,在氧气流量比为25%以上的条件下形成。但是,具有上述结构的ZnO缓冲层并不限于这些,可以通过控制接通电力、压力等其它条件,或者通过组合这些条件而形成。(实施例1)
作为实施例1,在玻璃制的基板上,使用表3中所示的条件,通过溅射法形成ZnO缓冲层2、ZnO半导体层3。
表3
*形成缓冲层时Ar流量+O2流量=15sccm
基板温度(℃) | RF电力(W) | 压力(Pa) | Ar流量(sccm) | O2流量(sccm) | 膜厚(nm) | |
缓冲层 | 300 | 100 | 0.6 | 0~15 | 0~15 | 500或800 |
半导体层 | 300 | 100 | 0.6 | 15 | 0 | 200 |
在同一溅射室内,固定基板温度为300℃,不停止放电而变换溅射气体,连续地形成ZnO缓冲层2和ZnO半导体层3。另外,形成ZnO缓冲层2时,作为溅射气体使用Ar气体和O2气体的混合气体,并固定溅射气体的总流量在15sccm,改变氧气流量比,分别为25%、50%、100%,同时改变膜厚,分别为500nm、800nm,而形成多种类的ZnO缓冲层2。另外,在相同的条件下(氧气流量比:0%、膜厚200nm),在上述多种类型的ZnO缓冲层2上形成ZnO半导体层3。
另外,作为比较例,没有设置ZnO缓冲层2,而与表3相同的条件下,在基板1上直接形成ZnO半导体层3。
在图13和图14表示了,对于如上述制作的本发明的样品1(氧气流量比:25%、膜厚800nm)和样品2(氧气流量比:100%、膜厚500nm),进行的结晶性的评价结果以及表示表面和截面的SEM像的照片。另外,在图13中一并表示了上述比较例的结晶性的评价结果。
另外,对于本发明的样品3(氧气流量比:25%、膜厚500nm)、样品4(氧气流量比:50%、膜厚500nm)和样品5(氧气流量比:100%、膜厚500nm)和上述比较例,测定电子迁移率,并在表4中表示了其结果。另外,ZnO半导体层3因为成为n型,所以测定了电子迁移率。
表4
比较例 | 样品3 | 样品4 | 样品5 | |
迁 移 率(cm2/Vs) | 5 | 35 | 72 | 80 |
由表4可看出,根据本发明的样品,能够得到高于比较例的电子迁移率。另外,特别是根据使氧气流量比作为50%以上而形成ZnO缓冲层的样品4和样品5,能够得到72cm2/Vs以上的高的电子迁移率。因此,形成ZnO缓冲层时更理想的是氧气流量比大于50%。
如上述本发明的样品能够得到比比较例高的电子迁移率的原因是,本发明样品的ZnO半导体层3因为将ZnO缓冲层2中存在的晶粒作为晶核生长,所以与比较例相比晶粒径大。
图15是表示本发明的晶体生长的状态的模式图,图16是表示比较例的晶体生长的状态的模式图。比较例中,晶体生长为柱状,其粒径也小。在本发明中,将相隔一定距离分散在ZnO缓冲层2中的大晶粒C作为核,大直径的结晶D生长,形成ZnO半导体层3。
另外,根据加大氧气流量比而形成的ZnO缓冲层2,如上述的图12中所示,结晶性良好,ZnO缓冲层2中的晶粒的直径大,并且各晶粒隔着充分的距离分散存在。或者在氧气流量比为20%以上的条件下形成时,能够得到导电率为1×10-9S/cm的ZnO缓冲层2,而在氧气流量比为25%以上的条件下形成时,能够得到具有除(002)和(004)以外的峰的ZnO缓冲层2。这样的ZnO缓冲层2中的晶粒的直径大,并且各晶粒隔着充分的距离分散存在。另外,在上述ZnO缓冲层2上形成ZnO半导体层3时,能够抑制晶体生长时相邻的晶粒之间碰撞,而阻碍相互之间晶体生长的问题,并且因为大粒径的晶体生长,所以能够得到高的电子迁移率。
另外,作为缓冲层,因为使用了不含不想需要杂质的、没有掺杂物的ZnO,所以不会在形成室内的壁面等处形成含有不想需要杂质的ZnO膜。因此,附着在壁面等的ZnO膜或ZnO缓冲层2的杂质不会混入到ZnO半导体层3中,从而能够得到高质量的ZnO半导体层3。
另外,因为作为缓冲层,如上述使用了没有掺杂物的ZnO,所以能够使用同样的溅射形成室形成ZnO缓冲层2和ZnO半导体层3。因此,由于没有必要分别设置用于形成缓冲层的形成室和用于形成半导体层的形成室,所以能够降低装置成本,降低制造成本。并且因为能够在不改变基板温度的基础上连续地形成ZnO缓冲层2和ZnO半导体层3,所以能够缩短制造时间,谋求降低制造成本。(实施例2)
下面,作为实施例2,利用表5中所示的条件,在玻璃基板1上通过溅射法形成ZnO缓冲层2、ZnO半导体层3,并通过霍尔效应测定,求出得到的叠层膜的迁移率和载流子密度。
表5
基板温度(℃) | RF电力(W) | 压力(Pa) | Ar流量(sccm) | O2流量(sccm) | 膜厚(nm) | |
缓冲层 | 300 | 100 | 0.6 | 0 | 15 | 100~2000 |
半导体层 | 300 | 100 | 0.6 | 15 | 0 | 200 |
实施例2和实施例1相比,不同之处在于,将形成ZnO缓冲层2时的溅射气体中的氧气流量比固定为100%,同时改变ZnO缓冲层2的膜厚,使其变化范围在100nm~2000nm。在图17中表示出,得到的ZnO缓冲层2/ZnO半导体层3的叠层膜的迁移率和ZnO缓冲层2的膜厚之间的关系,在图18中表示出,上述叠层膜中的载流子密度和ZnO缓冲层2的膜厚之间的关系。另外,在本实施例中,因为ZnO半导体层3成为n型,所以测定电子迁移率。
如在图17中所示,ZnO缓冲层2的膜厚大于500nm时,能够使叠层膜的电子迁移率为70cm2/Vs以上。另外,ZnO缓冲层2的膜厚大于1000nm时,能够使叠层膜的电子迁移率提高为80cm2/Vs以上。
另外,如图18所示,叠层膜中的载流子密度不依赖于ZnO缓冲层2的膜厚,恒定在约5×1017cm-3左右。
由该结果,认为ZnO缓冲层2的膜厚大于500nm是理想的,更理想的是大于1000nm。原因在于,当ZnO缓冲层2的膜厚大于500nm,理想的是大于1000nm时,ZnO缓冲层2中的晶粒的直径非常大,其结果将这些晶粒作为晶核而生长的ZnO半导体层3中的晶粒变大。
另外,如果ZnO缓冲层2的膜厚超过5000nm,则在ZnO缓冲层2的表面上产生凹凸,失去平坦性。如果在具有这样的表面形状的ZnO缓冲层2上形成ZnO半导体层3,则同样在ZnO半导体层3的表面上产生凹凸,其结果,形成半导体元件时装置特性降低。因此,为了控制上述装置特性的下降,理想的是ZnO缓冲层2的膜厚小于5000nm。(实施方式2)
下面说明本发明的半导体元件的制造方法的实施方式。
图19是用于说明实施方式2的半导体元件的制造方法的工序图。另外,在本实施例中说明作为半导体元件,制造TFT的情况。
首先,在预先洗净的玻璃基板11上利用溅射法,在氧气流量比为20%以上的条件下形成膜厚为500nm以上的ZnO缓冲层12,作为溅射气体仅使用了Ar气体,并连续地形成膜厚为200nm左右的ZnO半导体层13。这时,ZnO缓冲层12和ZnO半导体层13的形成是在同一基板温度下进行。这时可以不停止放电,变换溅射气体而连续地形成ZnO缓冲层12和ZnO半导体层13,或者也可以是形成ZnO缓冲层12后,暂停止放电,变换溅射气体,形成ZnO半导体层13。另外,在同一溅射形成室内形成ZnO缓冲层12和ZnO半导体层13。然后,通过光刻法,将ZnO缓冲层12和ZnO半导体层13的叠层膜进行图形蚀刻,加工成为岛状(图19(a))。
接着,通过RF等离子CVD法,作为栅(极)绝缘膜,形成膜厚约为500nm的SiN膜14(图19(b))。然后,蚀刻除去SiN膜14的ZnO半导体层13的源极,漏电极区上的部分。最后,使用蒸镀法形成由Al构成的源极、漏电极以及栅电极15S、15D、以及15G而制造出本实施方式中的TFT[图19(d)]。
如上所述,根据本实施方式的半导体元件的制造方法,具有:在溅射气体中的氧气流量比多的条件下,在基板11上形成ZnO缓冲层12,接着,在比形成上述ZnO缓冲层12时氧气流量小的条件下,在ZnO缓冲层12上形成ZnO半导体层13的工序。
如上所述,在氧气流量比大于20%的条件下形成ZnO缓冲层12时,ZnO缓冲层12中的晶粒的直径变大,并且相邻的晶粒不会邻接,而是相隔一定的距离分散存在。如上述使氧气流量比大于20%时,因为能够形成导电率小于1×10-9S/cm的ZnO缓冲层12,或者能够形成具有(002)和(004)以外的峰的ZnO缓冲层12,所以ZnO缓冲层12中的晶粒的直径变大,并且相邻的晶粒不会邻接而相隔一定的距离分散存在。
另外,上述晶粒起晶核的作用,而使ZnO半导体层13的晶体生长,这时因为ZnO缓冲层12中的晶粒相隔一定距离分散存在,所以不会发生晶体生长时相邻的晶粒之间碰撞而阻碍相互的晶体生长的问题,其结果,生长为晶粒径大的ZnO半导体层13。另外,因为用与ZnO半导体层13相同的材料形成ZnO缓冲层12,所以ZnO缓冲层12和ZnO半导体层13之间的接合是同性接合,从而得到良好的晶格匹配。其结果,能够制造出具有结晶性良好、并且迁移率提高的ZnO半导体层13的半导体元件(TFT)。
另外,因为作为ZnO缓冲层12,使用了不含不想需要杂质的没有掺杂物的ZnO,所以不会在形成室内的壁面等处形成含有不想需要杂质的ZnO膜。因此,不会发生附着在壁面等的ZnO膜或ZnO缓冲层12的杂质混入到ZnO半导体层13中的情况,能够得到高质量的ZnO半导体层13。
另外,因为作为ZnO缓冲层12,如上述使用了没有掺杂物的ZnO,所以能够使用相同的溅射室形成ZnO缓冲层和ZnO半导体层13。因此,由于没有必要分别设置ZnO缓冲层和ZnO半导体层,从而能够降低装置费用,降低制造成本。
并且因为能够在不改变基板温度的基础上连续地形成ZnO缓冲层12和ZnO半导体层13,所以能够缩短制造时间,降低制造成本。
如上所述,根据本实施方式,能够制造出将结晶性良好且具有高迁移率的ZnO半导体层13作为通道(channel)的TFT,能够得到特性良好的TFT。
(实施例3)
作为本实施方式的实施例,使用表6中所示的条件,形成ZnO缓冲层12和ZnO半导体层13,而制得TFT。在本实施例中,作为形成装置,使用RF磁控管溅射装置,在同一形成室内,在相同的基板温度(300℃)下形成ZnO缓冲层12和ZnO半导体层13。另外,作为溅射气体,使用Ar气体和O2气体的混合气体,形成ZnO缓冲层12时使氧气流量比为100%,形成ZnO半导体层13时,使氧气流量比0%。另外,作为比较例,除了不具有ZnO缓冲层12以外,在与实施例相同的条件下制造TFT。
表6
基板温度(℃) | RF电力(W) | 压力(Pa) | Ar流量(sccm) | O2流量(sccm) | 膜厚(m) | |
缓冲层 | 300 | 100 | 0.6 | 0 | 15 | 1000 |
半导体层 | 300 | 100 | 0.6 | 15 | 0 | 200 |
其结果,根据实施例的TFT,能够得到约2cm2/V·s的场效应迁移率,而比较例的TFT,只能够得到约0.2cm2/V·s的场效应迁移率,这是因为如上述,本实施例的ZnO半导体层比比较例的ZnO半导体层,结晶性良好的缘故。(实施方式3)
下面说明本发明的半导体元件制造方法的另一实施方式。
图20是用于说明本实施方式的半导体元件的制造方法的工序图。另外,在本实施例中说明作为半导体元件,制造发光二极管的情况。
首先,在预先洗净的蓝宝石基板21上利用溅射法,在氧气流量比为20%以上的条件下形成膜厚为1μm的ZnO缓冲层22。接着,作为溅射气体仅使用了Ar气体,连续地形成膜厚为1μm的ZnO半导体层23[图20(a)]。这时,ZnO半导体层23成为如上述的n型。
另外,在同一溅射形成室内形成ZnO缓冲层22和ZnO半导体层23。这时,ZnO缓冲层22和ZnO半导体层23的形成,可以是在固定基板温度的条件下不停止放电,仅转换溅射气体而连续地形成,也可以是形成ZnO缓冲层22后,暂停止放电,转换溅射气体,形成ZnO半导体层13。
然后,在n型的ZnO半导体层23上形成厚度约为0.2μm的ZnO活性层24。形成ZnO活性层24时,利用MBE法,形成掺杂有Ga的ZnO活性层24。这时,ZnO活性层24中的Ga的掺杂量在1×1017cm-3~1×1015cm-3的范围是理想的。另外,可以替代Ga,而掺杂Al等其它13族元素。接着,使用MBE法,在ZnO活性层24上形成掺杂有N的p型ZnO层25[图20(b)]。
然后蚀刻除去p型ZnO层25和ZnO活性层24的一部分,使n型ZnO层23的一部分露出,而形成n电极形成区23A[图20(c)]。最后,在n型ZnO层23的n电极形成区23A上和p型ZnO层25上,利用蒸镀法,形成由Al构成的电极26,制得发光二极管。[图20(d)]。
在本实施例中,具有:在溅射气体中的氧气流量比多的条件下,在基板21上形成ZnO缓冲层22,接着在比形成ZnO缓冲层22时氧气流量比小的条件下,在ZnO缓冲层22上形成ZnO半导体层23的工序。
如上所述,在氧气流量比大于20%的条件下形成ZnO缓冲层22时,ZnO缓冲层22中的晶粒的直径大,并且相邻的晶粒不会邻接,而相隔一定的距离分散存在。如上述,因为在氧气流量比大于20%的条件下,能够形成导电率小于1×10-9S/cm的ZnO缓冲层22,或者是能够形成具有(002)和(004)以外的峰的ZnO缓冲层22,所以ZnO缓冲层22中的晶粒的直径变大,并且相邻的晶粒不会邻接而相隔一定的距离分散存在。
另外,上述晶粒起晶核的作用,而使ZnO半导体层23的晶体生长,这时因为ZnO缓冲层22中的晶粒相隔一定距离分散存在,所以不会发生晶体生长时相邻的晶粒之间碰撞而阻碍相互的晶体生长的问题,其结果生长为晶粒径大的ZnO半导体层23。另外,用与ZnO半导体层23相同的材料形成ZnO缓冲层22时,ZnO缓冲层22和ZnO半导体层23之间的接合是同性接合,从而得到良好的晶格匹配。其结果,粒径提高的ZnO半导体层23生长。最终,能够制造出具有结晶性良好、且迁移率提高的ZnO半导体层23的半导体元件(发光二极管)。
另外,因为作为ZnO缓冲层22,使用了不含不想需要杂质的没有掺杂物的ZnO,所以不会在形成室内的壁面等形成含有不想需要杂质的ZnO膜。因此,不会出现杂质由附着在壁面等的ZnO膜或ZnO缓冲层22,混入到ZnO半导体层23中的情况,从而能够得到高质量的ZnO半导体层23。
如上所述,因为在粒径大且没有混进不想需要杂质的n型的ZnO半导体层23上形成ZnO活性层24、p型ZnO半导体层25,所以这些ZnO活性层24和p型ZnO半导体层25的特性提高。因此,根据本实施方式,能够提供元件特性优异的发光二极管。
另外,因为作为ZnO缓冲层22,如上述使用了没有掺杂物的ZnO,所以能够使用相同的溅射室形成ZnO缓冲层22和ZnO半导体层23。因此,因为没有必要分别设置ZnO缓冲层的形成室和ZnO半导体层的形成室,从而能够降低装置费用,降低制造成本。并且,因为不改变基板温度而连续地形成ZnO缓冲层22和ZnO半导体层23,所以能够缩短制造时间并降低制造成本。
下面说明实施方式4、5,这两种方式均利用了使用没有掺杂物的ZnO靶,改变溅射气体中的氧气流量比时,能够容易且广泛并高精度地改变形成的ZnO膜的导电率(参照图2~图4)。在该实施方式4、5中,使用公知地RF溅射装置在玻璃基板上形成ZnO膜。作为靶,使用无掺杂物物的ZnO(99.99%),作为溅射气体,使用Ar气体和O2气体。ZnO膜的形成条件是,在基板温度300℃、压力0.5Pa、RF功率密度10W/cm2。(实施方式4)
图21是使用本发明实施方式4的ZnO膜形成方法来形成导电率不同的ZnO膜多层膜时的说明图。
使溅射气体中的氧气流量比为100%,在玻璃基板31的一面上形成膜厚为100埃的第1ZnO膜32[图21(a)]。接着,断开放电,将氧气流量比减少至0%,然后再开启放电,在第1ZnO膜32上层叠膜厚为100埃的第2ZnO膜33[图21(b)]。同样地,交叉层叠第1ZnO膜32和第2ZnO膜33[图21(c)]。
通过以上方法形成的多层ZnO膜是由高电阻的第1ZnO膜32和低电阻的第2ZnO膜33构成的层叠物。因此,第2ZnO膜33,33…分别是由第1ZnO膜32,32…被绝缘。
图22是如上述形成的多层ZnO膜的模式图。图中30是有助于导电的电子。电子30,在电子30所处的第2ZnO膜33的内部移动,不会发生通过第1ZnO膜32,而向另一第2ZnO膜33移动的情况。即,能够把电子30,30…封闭在各2ZnO膜33内,能够防止由杂质的扩散,而使迁移率降低的问题。因此,该多层膜具有高电子迁移率。
即,本实施方式的ZnO膜的形成方法是,因为具备导电率不同的多层膜,所以能够以低成本、容易地制造出具有高的电子迁移率的电子设备(例如TFT)。(实施方式5)
图23和图24是本发明的实施方式5的半导体元件(LDD/具有半导体膜结构的叠层膜的FET)的制造方法的工序图。
使溅射气体中的氧气流量比为3%,在玻璃基板41的一面上,形成膜厚为200nm的ZnO半导体膜42[图23(a)]。接着,不断开放电,将氧气流量比从3%连续地减少至0%,而在ZnO半导体膜42上形成膜厚为10nm的LDD/源极·漏极膜43[图23(b)]。然后,使用稀盐酸,进行蚀刻,除去LDD/源极·漏极膜43的一部分,而形成槽部43a[图23(c)]。
在LDD/源极·漏极膜43上以及槽部43a内,通过等离子CVD法,堆积SiN,形成膜厚为500nm的绝缘膜50[图24(a)]然后通过蚀刻,仅除去LDD/源极·漏极膜43上的绝缘膜50,而形成将槽部43a作为底部的绝缘层44[图24(b)]。最后,通过在LDD/源极·漏极膜43上和绝缘层44上形成Al膜,从而在LDD/源极·漏极膜43上形成源极45和漏电极46,在绝缘层44上形成栅电极47[图24(c)]。
根据以上的成膜方法,在n-型的ZnO半导体膜42上,连续地将氧气流量比从3%减少至0%,而形成ZnO半导体膜,所以能够容易地层叠从n-型连续地向n+型变化的LDD/源极·漏极膜43。
另外,因为将氧气流量比连续地减少而成膜,所以LDD/源极·漏极膜43的导电率将从基板侧向膜厚方向连续地增大。因此,LDD/源极·漏极膜43的源极45和漏电极46侧的区,导电率高,而起到源极区和漏极区的作用,并且LDD/源极·漏极膜43的ZnO半导体膜侧区的导电率比源极区和漏极区导电率低,作为LDD区起作用。即,能够以低成本且容易地制造出具有LDD/半导体膜结构的叠层膜的FET。
在以上形成的FET,通过其LDD/半导体膜结构,能够缓和漏电极附近的电场,并能够防止由热电子引起的FET的性能老化(被加速成高速度的载流子被注入到绝缘层44中,成为固定电荷)。
另外,在上述实施方式中,使用RF溅射装置,另外作为溅射气体,使用O2气体和Ar气体,但也可以使用DC溅射装置、ECR溅射装置、或螺旋等离子波溅射装置,而作为溅射气体,可以使用O2气体和He气体、Ne气体或Kr气体等惰性气体。
另外,作为半导体元件的例子,说明了TFT和二极管,但本发明的半导体元件并不限于这些,也可以适当使用于光传感器等其它半导体元件。
如上所述,根据本发明的ZnO半导体层的形成方法,能够形成粒径大、迁移率提高的ZnO半导体层,同时能够降低制造成本。
另外,根据本发明的半导体元件的制造方法,因为能够制造具有粒径大、迁移率提高的ZnO半导体层的半导体元件,所以能够提高元件特性。并且能够降低其制造成本。
另外,根据本发明的半导体元件,因为具备粒径大、迁移率提高的ZnO半导体层,所以能够提供元件特性提高的半导体元件。
另外,根据本发明的ZnO膜的形成方法,能够降低材料成本、容易地形成电导率不同的多个ZnO膜。另外,能够形成导电率沿膜厚度方向连续变化的ZnO膜。并且能够交替层叠导电率低的ZnO膜和高的ZnO膜。
另外,根据本发明的半导体元件的制造方法,能够降低材料成本,容易地制造出具有导电率沿膜厚度方向连续变化的ZnO膜的半导体元件。
因为本发明包括多种没有脱离本发明必要技术特性的形态,所以上述的具体实施方式只是作为用于作说明的,而并不限定本发明的范围,因为本发明的范围是由权利要求来限定的,而不是先前的叙述,所以属于本发明权利要求边缘和范围的所有改变均包含在权利要求中。
Claims (34)
1、一种ZnO半导体层的形成方法,包括:在基板上形成导电率低于1×10-9S/cm的ZnO缓冲层的工序和在上述ZnO缓冲层上形成ZnO半导体层的工序。
2、一种ZnO半导体层的形成方法,包括:在基板上形成通过X射线衍射法得到的晶面的衍射峰中具有除(002)和(004)以外的峰的ZnO缓冲层的工序和在上述ZnO缓冲层上形成ZnO半导体层的工序。
3、根据权利要求2所述的ZnO半导体层的形成方法,其中,上述(002)和(004)以外的峰包括(103)或(112)峰。
4、一种ZnO半导体层的形成方法,是通过溅射法,在基板上形成ZnO半导体层,包括:使用含氧气的溅射气体,在上述基板上形成ZnO缓冲层,然后在溅射气体中的氧气流量比小于形成上述ZnO缓冲层时的条件下,在上述ZnO缓冲层上形成ZnO半导体层。
5、根据权利要求4所述的ZnO半导体层的形成方法,其中调整溅射气体中的氧气流量比,形成ZnO缓冲层,以使导电率小于1×10-9S/cm。
6、根据权利要求4所述的ZnO半导体层的形成方法,其中调整溅射气体中的氧气流量比,形成上述ZnO缓冲层,以使通过X射线衍射法得到的晶面的衍射峰中具有除(002)和(004)以外的峰。
7、根据权利要求6所述的ZnO半导体层的形成方法,其中上述(002)和(004)以外的峰包括(103)或(112)峰。
8、根据权利要求4所述的ZnO半导体层的形成方法,其中氧气流量比在20%以上的条件下形成上述ZnO缓冲层。
9、根据权利要求1所述的ZnO半导体层的形成方法,其中上述ZnO缓冲层膜的厚度大于500nm。
10、根据权利要求2所述的ZnO半导体层的形成方法,其中上述ZnO缓冲层膜的厚度大于500nm。
11、根据权利要求4所述的ZnO半导体层的形成方法,其中上述ZnO缓冲层膜的厚度大于500nm。
12、根据权利要求1所述的ZnO半导体层的形成方法,其中连续地形成上述ZnO缓冲层和上述ZnO半导体层。
13、根据权利要求2所述的ZnO半导体层的形成方法,其中连续地形成上述ZnO缓冲层和上述ZnO半导体层。
14、根据权利要求4所述的ZnO半导体层的形成方法,其中连续地形成上述ZnO缓冲层和上述ZnO半导体层。
15、根据权利要求4所述的ZnO半导体层的形成方法,其中边逐渐减少溅射气体中的氧气流量比,边连续地形成上述ZnO缓冲层和上述ZnO半导体层。
16、根据权利要求4所述的ZnO半导体层的形成方法,其中在同一形成室内形成上述ZnO缓冲层和上述ZnO半导体层。
17、一种半导体元件的制造方法,包括:在基板上形成导电率低于1×10-9S/cm的ZnO缓冲层的工序和在上述ZnO缓冲层上形成ZnO半导体层的工序。
18、一种半导体元件的制造方法,包括:在基板上形成通过X射线衍射法得到的晶面的衍射峰中具有除(002)和(004)以外的峰的ZnO缓冲层的工序和在上述ZnO缓冲层上形成ZnO半导体层的工序。
19、根据权利要求18所述的半导体元件的制造方法,其中,上述(002)和(004)以外的峰包括(103)或(112)峰。
20、一种半导体元件的制造方法,其中半导体元件具有通过溅射法形成的ZnO半导体层,该方法包括:利用含氧气的溅射气体,在上述基板上形成ZnO缓冲层的工序和在溅射气体中的氧气流量比小于形成上述ZnO缓冲层时的条件下,在上述ZnO缓冲层上形成ZnO半导体层的工序。
21、根据权利要求20所述的半导体元件的制造方法,其中调整氧气流量比,形成上述ZnO缓冲层,以使导电率小于1×10-9S/cm。
22、根据权利要求20所述的半导体元件的制造方法,其中调整氧气流量比,形成上述ZnO缓冲层,以使通过X射线衍射法得到的晶面的衍射峰中具有除(002)和(004)以外的峰。
23、根据权利要求22所述的半导体元件的制造方法,其中,上述(002)和(004)以外的峰包括(103)或(112)峰。
24、根据权利要求20所述的半导体元件的制造方法,其中氧气流量比在20%以上的条件下形成上述ZnO缓冲层。
25、根据权利要求17所述的半导体元件的制造方法,其中上述ZnO缓冲层膜的厚度大500nm。
26、根据权利要求18所述的半导体元件的制造方法,其中上述ZnO缓冲层膜的厚度大于500nm。
27、根据权利要求20所述的半导体元件的制造方法,其中上述ZnO缓冲膜的厚度大于500nm。
28、一种半导体元件,包括:基板、在上述基板上形成的导电率小于1×10-9S/cm的ZnO缓冲层、在上述ZnO缓冲层上形成的ZnO半导体层。
29、一种半导体元件,包括:基板、在基板上形成的通过X射线衍射法得到的晶面的衍射峰中具有除(002)和(004)以外的峰的ZnO缓冲层以及在ZnO缓冲层上形成的ZnO半导体层。
30、根据权利要求29所述的半导体元件,其中,上述(002)和(004)以外的峰包括(103)或(112)峰。
31、一种由溅射法形成ZnO膜的方法,其中,作为靶,使用没有掺杂物的ZnO,作为溅射气体,使用惰性气体、氧气、或惰性气体和氧气的混合气体,成膜过程中增加或减少氧气流量比。
32、根据权利要求31所述的ZnO膜的形成方法,连续地增加或减少氧气流量比。
33、根据权利要求31所述的ZnO膜的形成方法,交替地增加或减少氧气流量比。
34、一种半导体元件的制造方法,包括:作为靶,使用无掺杂物物的ZnO,并使用含氧气的溅射气体,通过溅射法在基板上形成第1ZnO膜;接着,边连续地减少上述溅射气体中的氧气流量比,边通过溅射法,在上述第1ZnO膜上形成第2ZnO膜;然后形成分割上述第2ZnO膜的槽部,接着通过绝缘层在上述槽部上设置栅电极,最后夹住槽部,在第2ZnO膜上设置源极和漏电极。
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