CN1476636A - 模块部件 - Google Patents

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CN1476636A
CN1476636A CNA028031830A CN02803183A CN1476636A CN 1476636 A CN1476636 A CN 1476636A CN A028031830 A CNA028031830 A CN A028031830A CN 02803183 A CN02803183 A CN 02803183A CN 1476636 A CN1476636 A CN 1476636A
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pattern
modular unit
coil pattern
coil
insulating resin
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CN100382309C (zh
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Ҷɽ����
叶山雅昭
־
东谷比吕志
安保武雄
胜又雅昭
֮
半田浩之
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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Abstract

一种模块部件,具有:设置在绝缘树脂层上的布线电路图案;设置于绝缘树脂层内的用于将布线电路图案彼此之间进行电连接的连接导体;在布线电路图案上进行电连接的有源部件和无源部件;及形成于层叠体内的线圈。线圈是在绝缘树脂层上利用由导体形成的线圈图案形成的,设置于其上下的绝缘树脂层的磁性材料夹持线圈图案。

Description

模块部件
技术领域
本发明涉及电路部件内置模块,特别涉及在绝缘基板内部内置有电路部件的多层布线基板的模块部件。
背景技术
近年来,伴随电子设备的小型化、高性能化的要求,进一步要求提高电路部件的密度和性能。为此,要求与电路部件的高密度化、高性能化相对应的布线基板。
作为提高布线基板的密度的一个方法,已知有形成多层基板的装配(build-up)方法。在该方法中,在通过铜箔的蚀刻等的方式形成布线的两面铜包面玻璃环氧树脂等所形成的芯体基板的表面上,涂敷感光性树脂,进行曝光显影,形成具有通孔的绝缘层。然后,对该表面进行无电解式镀铜处理,在其上依次进行抗蚀剂涂敷、蚀刻、抗蚀剂去除。这样,形成通孔导体和布线电路层,另外,在通孔内形成镀层,连接层间的布线电路层。
但是,在使基板为多层从而提高布线电路的密度的上述方法中,在将各种电路部件装载于布线基板上形成模块时,将电路部件安装于布线基板的表层。由此,要利用电路部件的投影面积确定模块部件的大小,难以小型化。
特别是要求高电感值的模块部件需要装载将铜线缠绕于铁氧体绕线管上而确保电特性的固定电感器等。由此,存在外观形状、安装面积变大、难以将模块小型化的问题。
发明内容
本发明涉及一种在将多个绝缘树脂层层叠为多层的层叠体内内置有源部件和无源部件的模块部件,其中:
具有:设置在绝缘树脂层上的布线电路图案;为了将布线电路图案彼此之间进行电连接而设置于绝缘树脂层内的连接导体;在布线电路图案上进行电连接的有源部件和无源部件;及形成于层叠体内的线圈;
线圈是在绝缘树脂层上利用由导体形成的线圈图案形成的,线圈图案由设置于其上下的绝缘树脂层的磁性材料所夹持。
附图说明
图1是表示本发明的一个实施方式的模块部件的构成的剖视图。
图2A是图1的电绝缘基板3的主视图。
图2B是图2A中的A-A’线的剖视图。
图2C是图1的电绝缘基板3的背面图。
图3A是图1的电绝缘基板5的主视图。
图3B是图3A中的B-B’线的剖视图。
图3C是图1的电绝缘基板5的背面图。
图4是图1的模块部件的分解立体图。
具体实施方式
下面参照附图,对本发明的实施方式进行说明。
图1是表示本实施方式的模块部件的构成的剖视图。
在图1中,电绝缘基板1~7,由混合有无机填料的环氧树脂等的绝缘树脂形成,层叠为多层,形成层叠体。即,将绝缘树脂层层叠为多层,形成层叠体。
半导体裸芯片8为IC、LSI等的有源部件,通过焊锡凸部21与布线电路图案1A电连接,该布线电路图案1A由包括形成于电绝缘基板3上的铜(在后面也记为Cu)或银(在后面也记为Ag)的导体形成。在半导体裸芯片8与电绝缘基板3的间隙中,注入由环氧树脂等的绝缘树脂形成的密封(underfil)树脂22,并使其固化。
芯片部件9为包括电阻器、电容器、电感器等的无源部件,其通过焊锡24与形成于电绝缘基板5上的布线电路图案15D电连接。而且,在芯片部件9与电绝缘基板5的间隙中注入密封树脂22,并使其固化。
大容量电容器10安装于电绝缘基板1上。如果假定该模块用作作为例如将直流电源转换为不同的电压的直流电源的装置的DC/DC转换器时,则大容量电容器10用于使电压变动稳定化。由环氧树脂、酚醛树脂形成的电绝缘树脂16覆盖大容量电容器10。就大容量电容器10来说,采用薄膜电容器、陶瓷电容器。
外部连接电极25形成于电绝缘基板7上,以便作为模块部件而与外部连接。另外,各电绝缘基板1~7通过通路孔导体27而进行电连接。通路孔导体12、14、18、27形成用于使电路之间电连接的连接导体。
线圈部26由螺旋线圈图案11A~11D和磁性材料13A和13B构成,该螺旋线圈图案11A~11D形成于电绝缘基板3、5的两面上,该磁性材料13A和13B,通过环氧树脂或硅酮树脂等粘接剂20与电绝缘基板2、6的单面接合,其由夹持螺旋线圈图案11A~11D的铁氧体形成。
采用图1、图2A、图2B、图2C、图3A、图3B、图3C,对上述那样构成的模块部件的线圈部26进行具体说明。
图2A是电绝缘基板3的主视图,图2B是电绝缘基板3的A-A’线的剖视图,图2C是电绝缘基板3的背面图,图3A是电绝缘基板5的主视图,图3B是电绝缘基板5中的B-B’线的剖视图,图3C是电绝缘基板5的背面图。在这些附图中,螺旋线圈图案11A~11D由包括Cu或Ag的导体形成,它们分别形成于电绝缘基板3、5的两面上。为了电连接相应的螺旋线圈图案11A~11D,在螺旋线圈图案11A~11D的端部形成电极17A~17G。
另外,利用设置于电绝缘基板3、4、5上的通路孔导体12、14、18,分别连接电极17A与电极17C、电极17D与电极17E、电极17F与17G,由此,利用这四个螺旋线圈图案,形成一个线圈。
此时,按照螺旋线圈图案11A~11D的缠绕方向经常保持同一方向的方式进行连接,由此,可确保一定的磁通量。而且,在多个电绝缘基板上形成螺旋线圈图案11A~11D,其相应的各端部通过通路孔导体连接,由此,可形成具有更大的磁通量的线圈部。
另外,这些螺旋线圈图案11A~11D通过由铁氧体等形成的磁性材料13A和13B所夹持,由此,可增加透磁率,确保规定的电感值。
将外观形状、安装面积较大的线圈部件、有源部件、无源部件等安装于受限的电路基板面积上构成规定的电路的情况下,目前为了将构成部件与基板表层连接,难以小型化。另外,由于仅进行表层的布线转来转去无法实现布线连接,所以通过形成多层的基板可进行布线连接。但因此,布线长度变长,产生寄生的电容、电阻和电感,也难以确保所需的电路特性。
在本发明中,在安装有设置于多个绝缘树脂层上的有源部件、无源部件的布线电路图案的一部分上,形成线圈图案,将它们层叠起来,通过电连接各绝缘树脂层连接,在层叠体内形成线圈部件。这样,可小型化。而且,可实现下述这样的模块部件,通过在布线图案的一部分上形成线圈图案,可将有源部件、无源部件等的布线长度缩为最短距离,不会产生阻碍电路特性的寄生电容、电阻和电感,并且密度较高,性能较高。
下面参照图1~图4,对上述那样构成的模块部件的制造方法进行说明。
将通过搅拌混合机而将环氧树脂和填料(0.1μm~100μm的SiO2的粉末)和固化剂混炼形成的膏状的混合物,通过流涎成型法,在厚度为75μm的聚对苯二甲酸乙二醇酯薄膜上涂敷规定厚度后,对其进行干燥,形成处于未固化状态(B阶段)的厚度为80μm的绝缘片。然后,按照规定尺寸将其切断,采用二氧化碳气体激光器,形成用于连接通路孔的贯通孔(直径为0.15mm)。
另外,除了二氧化碳气体激光器以外,也可采用YAG、准分子激光器等各种激光器、或者,采用穿孔机形成贯通孔。
在该贯通孔,通过丝网印刷法填充导电性树脂膏,形成通路孔导体12、14、18。
接着,将70μm的铜箔作为载体转印铜箔,在该载体的单面上,通过以铬(在下面记为Cr)为主成分的剥离层,形成9μm的铜箔。此时,对9μm铜箔中的与剥离层相反一侧的面进行粗糙处理。通过光刻工序和蚀刻工序对该铜载体转印铜箔(商品名:古河电工ピ一ラブル铜箔)的9μm的铜箔进行蚀刻处理,形成螺旋线圈图案11A、11B、11C、11D和布线电路图案15A、15B、15C。
然后,绝缘片的两面与形成于布线电路图案上的铜载体转印铜箔的图案面,通过对位热压机在压力温度为120℃、压力为10kg/cm2的条件下,进行加热加压5分钟。由于该压力温度为比固化温度低的温度,故绝缘片中的热固性树脂软化,布线电路图案埋入到绝缘片中,然后,将铜载体从绝缘片上剥离开,形成电绝缘基板1~7。
接着,在电绝缘基板1~7的各个布线电路图案15A~15C上装载规定的电路部件,并进行电连接。
在连接半导体裸芯片8的情况下,进行例如作为裸芯片安装的焊锡凸部的安装。通过光学和电子图象处理,使该半导体裸芯片8上的电极坐标和相应的电绝缘基板3上的布线电路图案15A的坐标的位置对准,在电绝缘基板3上装载半导体裸芯片8,对其进行加压加热,并进行电连接。
然后,将由环氧类树脂形成的密封树脂22注入到半导体裸芯片8与电绝缘基板3的间隙中,使其固化。作为密封树脂22来说,在环氧类树脂中适量地混合二氧化硅等的无机填料,缓和因半导体裸芯片8和电绝缘基板3的热膨胀率之差而产生的应力,使可靠性提高。
另外,裸芯片的安装不限于焊锡凸部21,也可采用使用各向导电性树脂片的ACF安装等方式。
在此情况下,在布线电路图案15A上设置各向导电性树脂,在半导体裸芯片8的电极上形成金凸部,以代替焊锡凸部21,利用加压加热进行电连接,与焊锡凸部连接相反,不需要在半导体裸芯片8和电绝缘基板3的间隙中注入密封树脂22。
此外,芯片部件的安装不限于焊锡膏的焊接安装,也可以采用导电性粘接剂进行电连接。
这样,在将部件装载于各个电绝缘基板3、5上后,如图1所示,使各个电绝缘基板1~7重合,使加热温度上升,在175℃、150kg/cm2的条件下,对其进行加压加热120分钟。而且,使绝缘片和导电性膏固化,布线电路图案和绝缘片以机械方式牢固地连接。同时,埋入导电性树脂膏的通路孔导体12、14、18与布线电路图案15A、15B、15C进行电连接,构成层叠体。
还有,在装载有部件的电绝缘基板3、5上所装载的电绝缘基板2、6中,如图4所示,形成有与各个部件的投影面积相对应的贯通孔28。
在该场合,通过设置贯通孔28,可减小在层叠时在各个部件中产生的压缩应力,可防止电特性的退化。而且,在电绝缘基板2、6上形成通路孔导体27、电极、布线电路图案等的情况下,具有下述优点,即,通过形成贯通孔28,在层叠时,不会产生电绝缘基板2、6软化,通路孔导体27、电极、布线电路图案的坐标偏离,叠层之间的连接和电路部件等的连接无法实现等的不利情况。
在磁性材料13A、13B与半导体裸芯片8或芯片部件9的同一面上的安装后的高度不同的场合,采用多个开设有与各自的投影面积相对应的贯通孔28的电绝缘基板,按照电绝缘基板的厚度可为各个安装厚度的5%左右的方式将这些电绝缘基板层叠。
由此,在层叠时不对电路部件施加局部的压力,可防止在层叠后在电路部件的周边积聚空气,可提高可靠性。
接着,通过焊锡24将大容量的电容器10电连接于层叠体的最上层。在焊接后,在大容量电容器10和电绝缘基板1之间的间隙中,涂敷粘接剂20。由此,当对大容量电容器10和电绝缘树脂进行涂敷时,可防止在上述间隙中混入空气的情况。
最后,按照覆盖大容量电容器10的方式,平坦地涂敷电绝缘树脂16。
通过确保平坦性,在向母基板上装载时,安装机等的安装设备的搬运容易,不会产生因搬运时的冲击造成的电容器破损,可靠性提高。
另外,在上面说明中所述的各数值是一个实例,本发明不限于这些值。
如以上所述,本发明的电路部件内置模块包括:将多个绝缘树脂层层叠为多层的层叠体;设置于层叠体内的布线电路图案;用于将布线电路图案彼此之间电连接的连接通路孔导体;与布线电路图案电连接并内置于层叠体内的IC芯片和芯片部件;形成于层叠体的任意部分的线圈。线圈在层叠体内具有导体图案连续形成的线圈图案,并且具有利用铁氧体层夹持该线圈图案的结构。可以将目前安装于表面上的IC芯片、芯片部件内置于层叠体内,并且可在层叠体内形成外观形状、安装面积较大的线圈部,因此,可实现小型/高密度的模块部件。
另外,具有多层形成于同一层叠体上的线圈图案,并具有各线圈图案的一端与其它层的线圈图案的一端进行电连接的结构。由此,可在层叠体内部形成较薄的线圈,可实现模块的薄型化和小型化。
此外,线圈部的各线圈图案的一端与其它层的线圈图案的一端通过通路孔导体进行电连接,可在任意的位置形成连接部。其结果是,可实现模块部件的薄型化和小型化。
还有,在层叠体的最表层上形成布线电路图案,设置大容量电容器,由此可获得更高性能且高密度的模块部件。
再有,线圈图案由含有Cu和Ag的导体图案构成,电阻较低,可实现更低电阻的模块部件。
另外,大容量电容器具有由薄膜电容器或陶瓷电容器形成的结构。薄膜电容器的每单位体积的电容提高,可实现模块的小型化和薄型化。陶瓷电容器的ESR较低,可实现降低模块的耗电量的模块部件。
此外,具有由绝缘树脂覆盖大容量电容器的一部分或全部的结构,可成为将层叠体安装于母基板上时的吸附面,可实现安装性优良的模块部件。
还有,可以将目前在多层的布线基板上只安装在表面上的有源部件(半导体元件、LSI、IC等)、无源部件(电容器元件、电阻元件、滤波元件、振荡元件、线圈等)的电子元件进行内置,可以提供小型且高密度电路部件内置的模块部件。
产业上的可利用性
本发明的模块部件,可将IC芯片、芯片部件内置于层叠体内。另外,可在层叠体内形成外观形状、安装面积较大的线圈部件,可以实现小型且高密度的模块部件。

Claims (7)

1.一种在将多个绝缘树脂层层叠为多层的层叠体内内置有源部件和无源部件的模块部件,其特征在于:
具有:设置在所述绝缘树脂层上的布线电路图案;为了将所述布线电路图案彼此之间进行电连接而设置于所述绝缘树脂层内的连接导体;在所述布线电路图案上进行电连接的有源部件和无源部件;及形成于所述层叠体内的线圈;
所述线圈是在所述绝缘树脂层上利用由导体形成的线圈图案形成的,所述线圈图案由设置于其上下的绝缘树脂层的磁性材料所夹持。
2.根据权利要求1所述的模块部件,其特征在于:具有多个形成有所述线圈图案的所述绝缘树脂层,所述线圈图案的一端与其它层的所述线圈图案的一端进行电连接。
3.根据权利要求2所述的模块部件,其特征在于:所述线圈图案的一端与其它层的所述线圈图案的一端通过通路孔导体进行电连接。
4.根据权利要求1所述的模块部件,其特征在于:在所述层叠体的最表层形成布线电路图案并配置电容器。
5.根据权利要求1所述的模块部件,其特征在于:所述线圈图案由含有Cu和Ag的导体图案形成。
6.根据权利要求4所述的模块部件,其特征在于:所述电容器由薄膜电容器或陶瓷电容器构成。
7.根据权利要求4所述的模块部件,其特征在于:用绝缘树脂覆盖所述电容器的一部分或全部。
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