CN1602588B - 降低通信系统中解码复杂度的编码和解码方法及其装置 - Google Patents

降低通信系统中解码复杂度的编码和解码方法及其装置 Download PDF

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CN1602588B
CN1602588B CN028233255A CN02823325A CN1602588B CN 1602588 B CN1602588 B CN 1602588B CN 028233255 A CN028233255 A CN 028233255A CN 02823325 A CN02823325 A CN 02823325A CN 1602588 B CN1602588 B CN 1602588B
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CN1602588A (zh
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陈道
P·E·本德
P·A·阿加西
R·雷扎法尔
R·K·潘卡
魏永斌
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Qualcomm Inc
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H03M13/2909—Product codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H03M13/2927—Decoding strategies
    • H03M13/293—Decoding strategies with erasure setting
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2933—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using a block and a convolutional code
    • H03M13/2936—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using a block and a convolutional code comprising an outer Reed-Solomon code and an inner convolutional code
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H04L1/0066—Parallel concatenated codes

Abstract

描述了用于在广播服务通信系统中使用外部解码器的方法和系统。要发送的信息被提供给多个发送缓冲器的系统部分，并且由与发送缓冲器通信耦合的外部解码器进行编码。所产生的冗余比特被提供给各个发送缓冲器的奇偶部分。内部解码器对发送缓冲器的内容进行多路复用和编码，从而通过增加冗余而改进保护。接收站通过反向过程恢复所发送的信息。由于解码复杂度取决于发送缓冲器系统部分的大小，因此系统部分大小和发送缓冲器数目之间的合理折衷产生降低了的解码复杂度。

Description

降低通信系统中解码复杂度的编码和解码方法及其装置
背景 
领域 
本发明涉及通信系统，尤其涉及用于降低通信系统中解码复杂度的系统和方法。 
背景 
已经研发了通信系统来允许信息信号从始发站到物理上不同的目标站的传输。在通信信道上从始发站发出信息信号时，信息信号首先被转换成适用于在通信信道上有效传输的形式。信息信号的转换(即调制)包括：按照信息信号改变载波参数，这种改变是以所产生的已调载波频谱被限定在通信信道带宽内的方式进行的。在目标站处，从通信信道上接收到的已调载波复制出始发信息信号。这种复制一般通过使用与始发站采用的调制过程相反的过程来实现。 
调制也便于公共通信信道上对几个信号的多址访问，即，同时发送和/或接收。多址通信系统通常包括多个订户单元，它们要求相对短持续时间的间歇服务，而不是连续地访问公共通信信道。本领域已知几种多址技术，譬如时分多址(TDMA)、频分多址(FDMA)、调幅多址(AM)。另一类多址技术是码分多址(CDMA)扩频系统，该系统遵从“双模宽带扩频蜂窝系统的TIA/EIA/IS-95移动站-基站兼容性标准(TIA/EIA/IS-95Mobile Station-Base Station Compatibility Standard forDual-Mode Wide-Band Spread Spectrum Cellular System)”，下面称为IS-95标准。多址通信系统中CDMA技术的使用在美国专利号4901307和美国专利号5103459中公开，前者题为“SPREAD SPECTRUM MULTIPLE-ACCESS COMMUNICATIONSYSTEM USING SATELLITE OR TERRESTRIAL REPEATERS”，后者题为“SYSTEM AND METHOD FOR GENERATING WAVEFORMS IN A CDMA CELLULAR TELEPHONE SYSTEM”，这两个专利都被转让给本发明的受让人。 
多址通信系统可能是无线或有线的，且可能传递语音和/或数据。能传递语音和数据两者的通信系统一例是符合IS-95标准的系统，该标准规定了在通信信道上发送语音和数据。美国专利号5504773中详细描述了在固定大小的编码信道帧内发送数据的方法，该专利题为“METHOD AND APPARATUS FOR THE FORMATTING OF DATAFOR TRANSMISSION”，并且被转让给本发明的受让人。按照IS-95标准，数据或语音被分成若干编码信道帧，这些帧为20毫秒宽，数据率高达14.4Kbps。能传递语音和数据两者的通信系统的其它例子包括遵照以下标准的通信系统：“第三代合伙人计划(3GPP)”，该计划包含在一组文献内，文献包括文献号3G TS 25.211，3GTS 25.212，3G TS 25.213以及3G TS 25.214(W-CDMA标准)；以及“cdma2000扩频系统的TR-45.5物理层标准(TR-45.5 Physical Layer Standard for cdma2000Spread Spectrum Systems)”(IS-2000标准)。 
仅有数据的通信系统一例是高数据速率(HDR)通信系统，它符合TIA/EIA/IS-856工业标准，下文中称为IS-856标准。HDR系统是基于共同待批申请序列号08/963386中公开的通信系统，该申请题为“METHOD AND APPARATUS FOR HIGH RATEPACKET DATA TRANSMISSION”，于1997年11月3日提交，被转让给本发明的受让人。HDR通信系统定义了一组数据率，从38.4kbps到2.4Mbps的范围内，在这些速率下接入点(AP)可能向订户站(接入终端，AT)发送数据。由于AP与基站相似，因此关于小区和扇区的术语和关于语音系统的术语相同。 
在多址通信系统中，通过一个或多个基站实施用户间的通信。一个订户站上的第一用户通过在反向链路上把数据发送到基站而向第二订户站上的第二用户传递数据。基站接收数据并且可以把数据路由到另一基站。数据在同一基站、或其它基站的前向链路上被发送到第二订户站。前向链路是指从基站到订户站的传输，反向链路是指从订户站到基站的传输。同样，可以在一移动订户站上的第一用户和地面有线站上的第二用户之间实施通信。基站在反向链路上从用户接收数据，并且通过公共交换电话网(PSTN)把数据路由至第二用户。在许多通信系统中，如，IS-95、W-CDMA、IS-2000，前向链路和反向链路被分配以不同的频率。 
上述无线通信服务是点对点通信服务的一个例子。相反，广播服务提供点对多点的通信服务。广播系统的基本模型由一个或多个中央站所服务的用户广播网，中央站向用户发送具有一定内容的信息，内容比如新闻、电影、体育比赛等等。各广播网用户的订户站监视一公共广播前向链路信号。由于中央站固定地确定内容，因此用户一般不往回通信。广播服务通信系统通常使用的例子有TV广播、无线电广播等等。这种通信系统一般是高度专用构造的通信系统。随着近来无线蜂窝电话系统中的发展，注意到为广播服务主要使用点对点的蜂窝电话系统的现有基础结 构。(这里所使用的术语“蜂窝”系统包括使用蜂窝和PCS频率两者的通信系统。) 
要在通信系统中的终端间交换的信息信号通常被组织成多个分组。为了本说明书，一个分组是被排列成特定格式的一组字节，包括数据(负载)和控制元素。控制元素包括例如先导序列和品质度量。品质度量包括例如循环冗余校验(CRC)、奇偶比特、以及本领域技术人员已知的其它度量类型。然后按照通信信道结构格式化分组以适合一帧。经适当调制的帧在始发终端和目标终端间传播，其受到通信信道特性所影响，例如信噪比、衰落、时差以及其它这样的特性。这种特性在不同的通信信道中不同地影响已调信号。因而，与已调信号在有线型的通信信道(例如同轴电缆或光缆)上的传输相比，已调信号在无线通信信道上的传输要求不同的考虑因素。除了选择适用于特定通信信道的调制以外，也设计了其它用于保护信息信号的方法。这种方法包括例如：编码、码元重复、交织、以及本领域普通技术人员已知的其它方法。然而，这些方法增加了开销。因此，必须作出信息信号交付的可靠性以及开销量之间的工程折衷。即使有了上面讨论的信息信号的保护，通信信道的条件也可能降级到目标站不能对某些分组进行解码(擦除)的地步。在允许从目标终端向始发终端传递反馈的仅有数据的通信系统中，一种解决方式是使用目标站到始发站作出的自动重发请求(ARQ)来重发未经解码的分组。然而，在某些条件下，ARQ会使通信系统过载。而且，如关于广播通信系统所讨论的，订户不会向基站回过头传递。因而，期望其它用于信息保护的手段。 
待批申请序列号为09/933912的申请详细讨论了广播系统中外部解码器的使用，该申请题为“METHOD AND SYSTEM FOR UTILIZATION OF AN OUTER DECODER INBROADCAST SERVICES COMMUNICATION SYSTEM”，于2001年8月20日提交，并被转让给本发明的受让人。如待批申请序列号为09/933912的申请中所描述的，要被发送的信息比特流首先被外部解码器编码，然后经编码的流被内部编码器所编码。如图1所示，要被发送的信息比特流102始发自较高层，并被提供给发送缓冲器104。发送缓冲器在图2中详述。参照图2，比特从左至右逐行地填充(图1的)发送缓冲器104的系统部分204(1)。系统部分204(1)包括长度为L的k行208。回过头参照图1，一旦(图2的)系统部分204(4)已满，就激活外部块编码器106对(图2的)系统部分204(1)中的比特进行列方向的编码，以产生(图2的)(n-k)个附加行210的奇偶比特。该列方向的操作对于二进制外部编码逐列执行，即m＝1。对于非二进制的编码而言，即m＞1，一行中的每m个相邻列都被视为一个m位的码元。外部编码器读取上面k行的m位码元以产生n-k个m位码元，这些码元填充这些列的 相应下面n-k行。 
外部编码器包括例如系统的Reed-Solomon(R-S)编码器。回过头参照图1，发送缓冲器104的内容接着被提供给物理层108。在物理层108处，单独帧由内部编码器(未示出)进行编码，产生经编码的帧。内部解码器的结构是本领域普通技术人员已知的。缓冲器的系统行和奇偶列可以在传输期间交织，以降低当内部编码擦除总数超过外部编码的纠错能力时擦除大量系统行的机会。帧进一步按照所选的调制方案被处理，调制方案有cdma2000、WCDMA、UMTS以及本领域普通技术人员已知的其它调制方案。经处理的帧然后在通信信道110上被发送。 
所发送的帧在目标站处被接收并被提供给物理层112。在物理层112处，单独帧被解调并被提供给内部解码器(未示出)。内部解码器对各帧进行解码，如果解码成功，则输出正确解码的帧；否则如果解码不成功，则宣布一次擦除。解码的成功或失败必须用高准确度来确定，例如通过在外部编码后和内部编码之前在帧内包括一长的(例如16位)循环冗余校验(CRC)而实现。从经解码的帧获得的所包括的CRC与从经解码的帧的比特计算的CRC相比较，如果两个CRC相同，则宣布解码成功。 
如果内部解码器不能对帧进行解码，解码器就宣布一次擦除，并且向外部块解码器116提供一指示，表明该帧丢失。该过程继续，直到与被擦除的系统帧有相同数量的奇偶帧被正确接收并被传递到接收缓冲器114的奇偶部分114(2)为止。接收机停止任何其余帧的接收，激活外部解码器(未示出)以恢复被擦除的系统帧。经恢复的系统帧被传递到较上层。 
本领域中公知的是，随着发送缓冲器104中行数的值增加，解码/纠错计算复杂度也增加。由于解码/纠错计算复杂度影响接收终端处的硬件复杂度以及功耗，因此本领域中需要这样一种方法和系统。 
概述 
这里公开的实施例通过提供一种方法和系统解决了上述需求，所述系统通过以下执行所述方法：用一外部编码对多个缓冲器的每一个中的系统比特进行编码；对多个缓冲器的内容进行多路复用；以及用内部编码对所述经多路复用的内容进行编码以提供一组帧。 
在本发明另一方面，由内部解码器对接收到的该组帧进行解码；经正确解码的帧被多路分解到多个缓冲器；各个缓冲器的内容进一步被处理。如果缓冲器的系统部分已经被正确解码，处理就包括向较高层提供系统部分的内容。或者，如果确 定由外部解码器对缓冲器内容进行的解码恢复了系统部分，则激活外部解码器，并且把系统部分经恢复的内容以及正确接收到的内容提供给较高层。 
附图简述 
图1说明了现有技术的物理层处理； 
图2说明了一发送缓冲器； 
图3说明了按照本发明一实施例的物理层处理； 
详细描述 
定义 
这里使用单词“示例性”意指“充当示例、实例或说明”。这里描述为“示例性”的任何实施例都不必被理解为比其它实施例更为优选或有利。 
这里使用术语“点对点”意指在专用通信信道上的两个订户站之间的通信。 
这里使用术语“广播通信”或“点对多点通信”意指一种通信，其中多个订户站从一个源接收通信。 
这里使用术语“分组”意指被排列为特定格式的一组比特，包括数据(负载)和控制元素。控制元素包括例如先导序列、品质度量、以及本领域技术人员已知的其它元素。品质度量包括例如循环冗余校验(CRC)、奇偶比特、以及本领域技术人员已知的其它度量。 
这里使用术语“接入网络”意指基站(BS)以及一个或多个基站控制器的集合。接入网络在多个订户站之间传输数据分组。接入网络还可连接到接入网络外部的其它网络，比如企业内联网或因特网，并且可以在各个接入终端和这种外部网络之间传输数据分组。 
这里使用术语“基站”意指订户站与之通信的硬件。小区是指硬件或地理覆盖区域，取决于使用该术语的环境。扇区是小区的一部分。由于扇区具有小区的属性，因此这里关于小区描述的原理也容易地扩展到扇区。 
这里使用术语“订户站”意指接入网络与之通信的硬件。订户站可以是移动的或静止的。订户站可以是通过无线信道或通过有线信道进行通信的任何数据设备，例如使用光纤或同轴电缆。订户站还可以是许多设备类型的任一种，包括但不限于：PC卡、微型闪存、外部或内部调制解调器、或者无线或有线电话。处在与基站建立活动话务信道连接过程中的订户站被称为是处在连接设立状态。已经与基 站建立活动话务信道连接的订户站被称为是处在话务状态。 
这里使用术语“物理信道”意指一通信路由，其上用调制特性和编码来描述信号传播。 
这里使用术语“逻辑信道”意指基站或订户站的协议层内的通信路由。 
这里使用术语“通信信道/链路”意指按照上下文的物理信道或逻辑信道。 
这里使用术语“反向信道/链路”意指订户站向基站发送信号所通过的通信信道/链路。 
这里使用术语“前向信道/链路”意指基站向订户站发送信号所通过的通信信道/链路。 
这里使用术语“软切换”意指订户站以及两个或多个扇区间的通信，其中各扇区属于不同的小区。反向链路通信被两个扇区都接收到，前向链路通信同时在两个或多个扇区的前向链路上实现。 
这里使用术语“较软切换”意指订户站以及两个或多个扇区间的通信，其中各扇区属于相同的小区。反向链路通信被两个扇区都接收到，前向链路通信在两个或多个扇区的前向链路之一上同时实现。 
这里使用术语“擦除”意指未能识别一消息。 
这里使用术语“专用信道”意指由对于个体订户站特定的信息所调制的信道。 
这里使用术语“公共信道”意指由在所有订户站间共享的信息所调制的信道。 
这里专门使用术语“物理层”意指始发终端和目标终端之间负责传输数据接收的该部分通信协议。物理层对应于开放式系统互连的国际标准组织模型中的第1层。 
这里专门使用术语“较高层”意指始发终端和目标终端之间高于物理层的该部分通信协议。较高层对应于开放式系统互连的国际标准组织模型中的第2层到第7层。 
描述 
按照本发明一实施例，如图3所示，始发自较高层的要被发送的信息比特流302被多路分解并被提供给发送缓冲器304(i)。这些比特从左到右逐行地填充发送缓冲器304(1)的系统部分306(1)。系统部分306(1)包括长度为L的k行。在一实施例中，缓冲器的长度与没有开销(例如帮助内部解码器的CRC以及内部编码器的尾部比特)的无线电帧长度一致。一旦发送缓冲器304(1)的系统部分306(1)已满， 就为其余的发送缓冲器302(2)-304(p)重复该过程。一旦发送缓冲器304(i)的系统部分306(i)已满，就激活外部块编码器310(i)对系统部分306(i)内的比特进行列方向的编码，以产生另外(n-k)行的奇偶比特308(i)。这个列方向的操作对于二进制外部编码(即m＝1)是逐列执行的。对于非二进制编码而言，即m＞1，一行中的每m个相邻列都被视为一个m位的码元。外部编码器读取上面k行的m位码元以产生n-k个m位码元，这些码元填充这些列的下面n-k行。 
在另一实施例中，缓冲器的长度L等于没有开销的无线电帧的比特数除以m，m是外部编码器编码的大小。在该实施例中，发送缓冲器304(i)的前m行在第一无线电帧内被发送，其次m行比特在第二无线电帧内被发送，直到发送了全部缓冲器为止。一旦发送缓冲器304(1)的系统部分306(1)已满，就为其余的发送缓冲器304(2)-304(p)重复该过程。一旦发送缓冲器304(i)的系统部分306(i)已满，就激活外部块编码器310(i)对系统部分304(i)内的比特进行列方向的编码，以产生另外m(n-k)行的奇偶比特308(i)。这个列方向的操作对于二进制外部编码(即m＝1)是逐列执行的。对于非二进制的编码(即m＞1)而言，一列的每m行形成一个m位码元。外部编码器读取该列内上面km行的k个码元以产生(n-k)个m位码元，这些码元填充该列的下面m(n-k)行。 
在一实施例中，外部编码器310(i)包括一系统的Reed-Solomon(R-S)编码器。发送缓冲器304(i)的内容接着被提供给多路复用器312。多路复用器312通过发送缓冲器304(1)-304(p)循环，在已经从前面的缓冲器304(i-1)发送了包含预定比特数的比特块以后，选择相继的发送缓冲器304(i)。在一实施例中，一块中的预定比特数等于L。这个策略打算在缓冲器304(i)间均匀地分配由于物理信道316的距离造成的数据破坏。然而，本领域的普通技术人员会理解，其它多路复用策略也可等价地应用，并且可以使用而不背离本发明的精神或范围。经多路复用的比特块被提供给始发终端的物理层314。在物理层314处，向每一个比特块添加附加的开销比特(例如CRC校验)，所产生的结构由内部编码器(未示出)所编码，这产生经编码的帧。外部和内部编码器以及多路复用器的结构可以为如图3的结构。这些帧按照所选的调制方案被进一步处理。在一实施例中，处理按照IS-2000标准执行。经处理的帧结合总则通信信道316上被发送。 
所发送的帧在目标站(未示出)被接收，并被提供给目标站处的物理层318。在物理层318处，单独帧被解调并被提供给内部解码器(未示出)。在一实施例中，内部解码器对各帧进行解码，如果解码成功，则输出正确解码的帧；否则如果解码不 成功，则宣布一次擦除。解码的成功或失败必须用高准确度来确定。在一实施例中，如上所述，通过在外部编码后并且在内部编码以前在帧内包括长的(例如16位)循环冗余校验(CRC)而实现准确度。然而，本领域的普通技术人员认识到，可以使用用于帧品质指示的其它机制。从经解码的帧获得的所包括的CRC与从经解码的帧的比特中计算的CRC相比较，如果两个CRC相同，则宣布解码成功。物理层处进一步的处理按照内部解码器判决的结果进行。 
经正确解码的帧被提供给多路分解器320，后者将经正确解码的帧分布在接收缓冲器322(i)中间，使用与多路复用所用方法相反的方法。如果特定接收缓冲器322(i)的内部解码器正确解码了所有系统k帧，就向较高层提供接收缓冲器322(i)的系统部分324(i)。 
如果内部解码器不能对该帧进行解码，解码器就宣布一次擦除，并且向多路分解器324提供一指示，表明该帧丢失。多路分解器324把信息提供给与接收缓冲器322(i)通信耦合的外部块解码器328(i)，该帧属于接收缓冲器322(i)。该过程继续，直到接收缓冲器322(i)的系统部分324(i)和奇偶部分326(i)中累加了足够的系统帧和经正确接收的奇偶帧为止，或者直到接收缓冲器322(i)已满为止。然后激活外部解码器(未示出)来恢复被擦除的系统帧。经恢复的系统帧被提供给较高层。 
如果接收缓冲器322(i)中经正确接收的帧的总数小于k，按照一实施例就不激活外部解码器，因为不能保证解码会成功。经正确接收的系统帧以及丢失比特的标识一起被提供给较高层。在另一实施例中，接收机使用来自内部解码器的经解码的比特(被失败的CRC校验指示为不可靠)来为系统比特恢复比特。按照一实施例，接收机对来自内部解码器的不可靠比特进行解码，并且找到最可能的码字。在另一实施例中，接收机使用缓冲器中被擦除帧的信号品质度量，选择具有最高信噪比的足够错误接收的帧来形成具有k行的辅助缓冲器。然后，接收机进行比特翻转(每次在每一列处，把比特值0改变为比特值1，反之亦然)，并且检验码字中是否产生比特翻转。在一实施例中，首先对最不可靠的比特执行比特翻转，然后以比特可靠性增加的顺序对其余比特执行翻转。比特可靠性可以按照内部解码度量来确定，例如帧期间的信号对噪声和干扰比、类Yamamoto度量、经重编码的码元差错率、经重编码的能量度量、以及本领域普通技术人员已知的其它度量、或者度量的组合。如果未找到码字，则对于所有不可靠行的所有其余列继续比特翻转。如果未找到码字，则继续比特反转，所翻转的比特数增加(也就是，一次改变2比特，然后3比 特，直到最大比特数)，直到找到码字或者耗尽了所有组合为止。在另一实施例中，使用来自不可靠行的CRC来检验该情况下解码的总成功。只有当所有行的CRC相同时才把帧提供给较高层；否则仅把来自可靠行的比特提供给较高层。 
为了改进解码的可靠性，在另一实施例中，对缓冲器中多于k个正确接收的帧执行解调和内部解码。按照还有一实施例，对于缓冲器中的所有帧执行解调和内部解码。在上述两个实施例中，对具有最高品质的k(或km)行执行外部解码。品质可以按照内部解码度量来确定，例如帧期间的信号对噪声和干扰比、类Yamamoto度量、经重编码的码元差错率、经重编码的能量度量、以及本领域普通技术人员已知的其它度量、或者度量的组合。使用品质度量用于品质估计在以下美国专利中详细公开：美国专利号5751725，题为“METHOD AND APPARATUS FOR DETERMINING THERATE OF RECEIVED DATA IN A VARIABLE RATE COMMUNICATIONS SYSTEM”、以及美国专利号5774496，题为“METHOD AND APPARATUS FOR DETERMINING DATA RATE OFTRANSMITTED VARIABLE RATE DATA IN A COMMUNICATIONS RECEIVER”，这两个专利都被转让给本发明的受让人。 
本领域的技术人员会理解，发送缓冲器304以及接收缓冲器322的数目是处理开销和潜在数据损失量之间的折衷。小的k值使更多的发送/接收缓冲器增加处理开销。另一方面，大的k值使较少的发送/接收缓冲器引起发送缓冲器尺寸增加，这导致如果由于有不止(n-k)行擦除而不能恢复发送缓冲器的内容，则丢弃一大数据块。大的发送缓冲器尺寸也增加了目标终端处的存储器要求。 
本领域的技术人员可以理解，信息和信号可以用多种不同技术和工艺中的任一种来表示。例如，上述说明中可能涉及的数据、指令、命令、信息、信号、比特、码元和码片可以用电压、电流、电磁波、磁场或其粒子、光场或其粒子或它们的任意组合来表示。 
本领域的技术人员能进一步理解，结合这里所公开的实施例所描述的各种说明性的逻辑块、模块和算法步骤可以作为电子硬件、计算机软件或两者的组合来实现。为了清楚说明硬件和软件间的互换性，各种说明性的组件、框图、模块、电路和步骤一般按照其功能性进行了阐述。这些功能性究竟作为硬件或软件来实现取决于整个系统所采用的特定的应用程序和设计。技术人员可以认识到在这些情况下硬件和软件的交互性，以及怎样最好地实现每个特定应用程序的所述功能。技术人员可能以对于每个特定应用不同的方式来实现所述功能，但这种实现决定不应被解释为造成背离本发明的范围。 
结合这里所描述的实施例来描述的各种说明性的逻辑块、模块和算法步骤的实现或执行可以用：通用处理器、数字信号处理器(DSP)、专用集成电路(ASIC)、场可编程门阵列(FPGA)或其它可编程逻辑器件、离散门或晶体管逻辑、离散硬件组件或者为执行这里所述功能而设计的任意组合。通用处理器可能是微处理器，然而或者，处理器可以是任何常规的处理器、控制器、微控制器或状态机。处理器也可能用计算设备的组合来实现，如，DSP和微处理器的组合、多个微处理器、结合DSP内核的一个或多个微处理器或者任意其它这种配置。 
结合这里所公开实施例描述的方法或算法的步骤可能直接包含在硬件中、由处理器执行的软件模块中或在两者当中。软件模块可能驻留在RAM存储器、闪存、ROM存储器、EPROM存储器、EEPROM存储器、寄存器、硬盘、可移动盘、CD-ROM或本领域中已知的任何其它形式的存储媒质中。示例性存储媒质与处理器耦合，使得处理器可以从存储媒质读取信息，或把信息写入存储媒质。或者，存储媒质可以与处理器整合。处理器和存储媒质可能驻留在ASIC中。ASIC可能驻留在订户单元中。或者，处理器和存储媒质可能作为离散组件驻留在用户终端中。 
上述优选实施例的描述使本领域的技术人员能制造或使用本发明。这些实施例的各种修改对于本领域的技术人员来说是显而易见的，这里定义的一般原理可以被应用于其它实施例中而不使用创造能力。因此，本发明并不限于这里示出的实施例，而要符合与这里揭示的原理和新颖特征一致的最宽泛的范围。 
该申请文档的一部分公开内容包含受版权保护的材料。版权所有者不反对由本申请文档或申请公开内容进行传真复制，它出现在美国专利和商标局的专利文件或记录中，但无论如何仍保留所有的版权。 

Claims (41)

1.一种用于降低解码复杂度的编码方法，所述方法包括以下步骤：
用第一编码对多个缓冲器的每一个中存储的系统比特进行编码，以产生奇偶比特；
对所述多个缓冲器中的内容进行多路复用；以及
用第二编码对所述经多路复用的内容进行编码，以提供一组帧，
其中，所述多个缓冲器中的每一个都包括系统缓冲器，用于在对系统比特进行编码之前，存储所述系统比特，作为未编码数据；以及奇偶缓冲器，用于存储所述奇偶比特，以便直接对所述多个缓冲器中的所述内容进行多路复用。
2.如权利要求1所述的方法，其特征在于，用第一编码对多个缓冲器的每一个中的系统比特进行编码的所述步骤包括：
用块编码对所述多个缓冲器的每一个中的系统比特进行编码。
3.如权利要求2所述的方法，其特征在于，用块编码对所述多个缓冲器的每一个中的系统比特进行编码的所述步骤包括：
用Reed-Solomon编码对多个缓冲器的每一个中的系统比特进行编码。
4.如权利要求1所述的方法，其特征在于，对所述多个缓冲器的内容进行多路复用的所述步骤包括：
连续地从所述多个缓冲器的每一个中提供比特块。
5.如权利要求4所述的方法，其特征在于，连续地从所述多个缓冲器的每一个中提供比特块的所述步骤包括：
提供一比特块，所述比特块包括所述多个缓冲器的每一个中的一行。
6.如权利要求1所述的方法，其特征在于，用第二编码对所述经多路复用的内容进行编码以提供一组帧的所述步骤包括以下步骤：
标识要被编码的比特块；以及
用第二编码对所述比特块进行编码。
7.如权利要求6所述的方法，其特征在于，用于标识要被编码的比特块的所述步骤包括：
标识从缓冲器接收到的比特块。
8.一种用于降低解码复杂度的方法，所述方法包括以下步骤：
用第一编码对多个发送缓冲器的每一个中存储的系统比特进行编码，以产生奇偶比特；
对所述多个发送缓冲器中的内容进行多路复用；
用第二编码对所述经多路复用的内容进行编码，以提供一组帧；
发送该组帧；
用第二解码器对接收到的帧进行解码；
把经正确解码的帧多路分解到多个接收缓冲器；以及
处理所述多个接收缓冲器的每一个中的内容，每个接收缓冲器中的所述内容包括系统部分和奇偶部分，
其中，所述多个发送缓冲器中的每一个都包括系统缓冲器，用于在对系统比特进行编码之前，存储所述系统比特，作为未编码数据；以及奇偶缓冲器，用于存储所述奇偶比特，以便直接对所述多个发送缓冲器中的所述内容进行多路复用。
9.如权利要求8所述的方法，其特征在于，用第一编码对多个发送缓冲器的每一个中的系统比特进行编码的所述步骤包括：
用块编码对多个缓冲器的每一个中的系统比特进行编码。
10.如权利要求9所述的方法，其特征在于，用块编码对多个缓冲器的每一个中的系统比特进行编码的所述步骤包括：
用Reed-Solomon编码对多个缓冲器的每一个中的系统比特进行编码。
11.如权利要求8所述的方法，其特征在于，对所述多个发送缓冲器的内容进行多路复用所述步骤包括：
连续地从每个缓冲器中提供比特块。
12.如权利要求11所述的方法，其特征在于，用于连续地从每个缓冲器中提供比特块的所述步骤包括：提供一比特块，所述比特块包括所述发送缓冲器的一行。
13.如权利要求8所述的方法，其特征在于，用第二编码对所述经多路复用的内容进行编码以提供一组帧的所述步骤包括：
标识要被编码的比特块；以及
用第二编码对所述比特块进行编码。
14.如权利要求13所述的方法，其特征在于，用于标识要被编码的比特块的所述步骤包括：
把所述比特块标识为从一缓冲器接收到的比特块。
15.如权利要求8所述的方法，其特征在于，把经正确解码的帧多路分解到多个接收缓冲器的所述步骤包括：
标识属于一缓冲器的比特块；以及
把所述比特块提供给所述缓冲器。
16.如权利要求15所述的方法，其特征在于，用于标识属于一缓冲器的比特块的所述步骤包括：
把比特块标识为包括由第二解码器所解码的帧的比特块。
17.如权利要求8所述的方法，其特征在于，用于处理每个接收缓冲器的内容的所述步骤包括：
把每个接收缓冲器的所述系统部分提供给高于物理层的层。
18.如权利要求8所述的方法，其特征在于，还包括：
如果所述帧未能正确解码，则向第一解码器提供擦除指示，其中所述第一解码器与将接收经正确解码的帧的所述接收缓冲器通信耦合。
19.如权利要求18所述的方法，其特征在于，用于处理每个接收缓冲器的内容的所述步骤包括：
当所述系统部分可恢复时，由第一解码器对所述接收缓冲器的系统部分进行解码；以及
把经解码的所述接收缓冲器的系统部分提供给高于物理层的层。
20.一种用于降低解码复杂度的编码装置，包括：
多个缓冲器；
多个编码器，所述多个编码器的每一个都与所述多个缓冲器之一通信耦合，用于对存储在相应缓冲器中的系统比特进行编码，以产生奇偶比特；
多路复用器，其与所述多个缓冲器通信耦合，用于对所述多个缓冲器中的内容进行多路复用；以及
内部编码器，其与所述多路复用器通信耦合，用于对所述经多路复用的内容进行编码，
其中，所述多个缓冲器中的每个缓冲器都包括系统缓冲器，用于在对系统比特进行编码之前，存储所述系统比特，作为未编码数据；以及奇偶缓冲器，用于存储所述奇偶比特，以便直接对所述多个缓冲器中的所述内容进行多路复用。
21.如权利要求20所述的装置，其特征在于，所述多个缓冲器的每一个都被构造成用于：
保存系统比特和奇偶比特。
22.如权利要求20所述的装置，其特征在于，所述多个编码器的每一个都被构造成用于：
对系统比特进行编码，以提供奇偶比特。
23.如权利要求22所述的装置，其特征在于，所述多个编码器的每一个都被构造成用于：
用块编码对所述系统比特进行编码。
24.如权利要求20所述的装置，其特征在于，所述多个编码器的每一个都被构造成用于：
用Reed-Solomon编码对所述系统比特进行编码。
25.如权利要求20所述的装置，其特征在于，所述多个多路复用器被构造成用于：
连续地从所述多个缓冲器的每一个向所述内部编码器提供比特块。
26.如权利要求25所述的装置，其特征在于，所述比特块包括所述缓冲器的一行。
27.如权利要求20所述的装置，其特征在于，所述内部编码器被构造成用于：
标识要被编码的比特块；以及
用内部编码对所述比特块进行编码。
28.如权利要求27所述的装置，其特征在于，所述要被编码的比特块包括；
从所述多路复用器接收到的比特块。
29.一种用于降低解码复杂度的装置，包括：
多个发送缓冲器；
多个编码器，所述多个编码器的每一个都与所述多个发送缓冲器之一通信耦合，用于对存储在相应发送缓冲器中的系统比特进行编码，以产生奇偶比特；
多路复用器，其与所述多个发送缓冲器通信耦合，用于对所述多个发送缓冲器中的内容多路复用；
内部编码器，其与所述多路复用器通信耦合，用于对所述经多路复用的内容进行编码；
第一解码器；
与所述第一解码器通信耦合的多路分解器；
与所述多路分解器通信耦合的多个接收缓冲器，其中每个接收缓冲器中的所述内容包括系统部分和奇偶部分；以及
多个解码器，所述多个解码器的每一个都与所述多个接收缓冲器之一通信耦合，
其中，所述多个发送缓冲器中的每一个都包括系统缓冲器，用于在对系统比特进行编码之前，存储所述系统比特，作为未编码数据；以及奇偶缓冲器，用于存储所述奇偶比特，以便直接对所述多个发送缓冲器中的所述内容进行多路复用。
30.如权利要求29所述的装置，其特征在于，所述多个发送缓冲器的每一个都被构造成用于：
保存系统比特和奇偶比特。
31.如权利要求29所述的装置，其特征在于，所述多个编码器的每一个都被构造成用于：
对系统比特进行编码，以提供奇偶比特。
32.如权利要求31所述的装置，其特征在于，所述多个编码器的每一个都被构造成用于：
用块编码对所述系统比特进行编码。
33.如权利要求29所述的装置，其特征在于，所述多个编码器的每一个都被构造成用于：
用Reed-Solomon编码对所述系统比特进行编码。
34.如权利要求29所述的装置，其特征在于，所述多路复用器被构造成用于：
连续地从所述多个发送缓冲器的每一个向所述内部编码器提供比特块。
35.如权利要求34所述的装置，其特征在于，所述比特块包括所述发送缓冲器的一行。
36.如权利要求29所述的装置，其特征在于，所述内部编码器被构造成用于：
标识要被编码的比特块；以及
用内部编码对所述比特块进行编码。
37.如权利要求36所述的装置，其特征在于，所述要被编码的比特块包括：
从所述多路复用器接收到的比特块。
38.如权利要求29所述的装置，其特征在于，所述第一解码器被构造成用于：
对接收到的帧进行解码；
提供经正确解码的帧；以及
如果所述接收到的帧未能正确解码，则提供擦除指示。
39.如权利要求29所述的装置，其特征在于，所述多路分解器被构造成用于：
标识属于一接收缓冲器的比特块；以及
把所述比特块提供给所述接收缓冲器。
40.如权利要求39所述的装置，其特征在于，所述属于一接收缓冲器的比特块包括：
包括由所述第一解码器解码的帧的比特块。
41.如权利要求29所述的装置，其特征在于，所述多个解码器的每一个都被构造成用于：
当所述系统部分可恢复时，用外部解码器对所述接收缓冲器的系统部分进行解码，并且
把经解码的所述接收缓冲器的系统部分提供给高于物理层的层。
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