CN1695225A - 从单晶体表面清除非晶体氧化物 - Google Patents
从单晶体表面清除非晶体氧化物 Download PDFInfo
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Abstract
提供了从单晶体衬底(22)的表面清除非晶体氧化物(24)的方法。该方法包含将钝化材料(26)沉积在非晶体氧化物之上。然后将单晶体衬底加热,使得非晶体氧化物层分解成至少一种从该表面释放出来的易失性物质。
Description
技术领域
本发明一般性地涉及准备用于在其上沉积单晶体氧化物的单晶体表面的方法,尤其涉及从单晶体表面清除非晶体氧化物的方法。
背景技术
例如像钙钛矿这样的单晶体氧化物,由于它们简单的晶体结构和独特的铁电特性、电介质特性和光学特性,使它们成为非常吸引人的材料。在诸如硅的单晶体衬底上单晶体氧化物的高质量外延生长对于许多器件应用,例如光学波导、铁电器件、非易失高密度存储器件、MOS器件及类似器件是期望得到的。
多年来,因为在置于充满氧气的环境的衬底表面上易形成非晶体氧化层,因此在单晶体衬底上生长出单晶体氧化物的尝试已经被证明是很难的事情。这种非晶体氧化层妨碍了单晶体衬底上单晶体氧化物的高质量生长。因为需要规则和稳定的衬底表面来帮助高质量单晶体氧化层的生长,因此在沉积单晶体氧化物层之前,希望清除衬底表面的非晶体氧化层。
因此,需要一种从单晶体衬底清除非晶体氧化层的方法。此外,需要一种在单晶体衬底上形成规则和稳定的表面以利于后面单晶体氧化层的生长的方法。
附图说明
在附图中,本发明将通过举例和非限定性的方式进行举例说明,其中类似附图标记表示类似的单元,其中:
图1举例说明的是具有单晶体衬底和其上自然形成的非晶体氧化物的半导体结构的横截面图;
图2举例说明的是在图1的半导体结构的原生非晶体氧化层上形成的钝化材料层的横截面图;
图3举例说明的是图2的其中已经在原生非晶体氧化层中形成空隙的半导体结构的横截面图;
图4举例说明的是图3的半导体结构的横截面图,其中钝化层的材料已经钝化了单晶体衬底的暴露部分;
图5举例说明的是图4的半导体结构的横截面图,其中已经清除了原生非晶体氧化层,并且已经由钝化层钝化了单晶体衬底;
图6举例说明的是图5的半导体结构的横截面图,其中在单晶体衬底之上已经生长单晶体氧化物。
本领域的技术人员会理解,为了简洁和清楚起见,对图中的元件进行的举例说明没有必要按照原来尺寸比例画出。例如,为了利于增进对本发明实施例的理解,图中某些元件的尺寸也许相对于其它元件的尺寸进行了夸大性描述。
具体实施方式
从单晶体衬底清除非晶体氧化物和在该衬底上产生规则的表面以利于后来单晶体氧化物生长的方法在图1至图6中进行了举例说明。图1示意性地举例说明了包含具有非晶体氧化层24的单晶体衬底22的半导体结构20一部分的横截面图。在这个上下文中,术语“单晶体”将具有半导体工业通常所使用的意思。该术语是指单晶或基本上单晶的材料,它应包含那些具有相对较少缺陷的材料,所述缺陷例如是在硅或锗,或硅和锗的混合物的衬底上通常发现的错位和类似缺陷,该材料还应包含半导体工业中通常见到的材料的外延层。
根据本发明的实施例,衬底22是单晶体半导体或化合物半导体材料,例如周期表的IV族中的材料。IV族半导体材料的例子包含硅、锗、硅和锗的混合物、硅和碳的混合物、硅、锗和碳的混合物、以及类似的物质。衬底22较适宜是含有硅或锗的晶片,最好是正如在半导体工业中使用的具有(100)取向的高质量单晶硅晶片。该衬底取向在轴上,或至多大约偏离轴6°。
半导体衬底22的至少一部分具有裸露的表面,尽管该衬底的其它部分也许还包含着其它的结构。在本文中术语“裸露”意味着该衬底部分的表面已经经过了清洁以清除任何氧化物、污染物或其它异质材料。众所周知,例如硅这样的裸露衬底可能很容易起反应并且可能很容易形成原生非晶体氧化物层24。术语“裸露”试图还包含这样的原生氧化物层。薄氧化物也可以有意生长在半导体衬底上,尽管这样生长的氧化物不是本发明的处理过程所必需的。为了在单晶体衬底上外延生长单晶体氧化物层,必须首先清除原生非晶体氧化物层24以暴露出下部衬底的晶体结构。
尽管本发明也可使用其它的外延处理过程,然而最好使用超高真空(UHV)分子束外延附生(MBE)技术进行下面的处理过程。在本发明的一个示例性实施例中,单晶体衬底22被放置在UHV MBE的处理室内。因此单晶体衬底22可以被加热到低于非晶体氧化物层24的升华温度的温度,最好加热至大约500℃的温度,尽管可以理解,在处理过程中单晶体衬底22被加热到这样的温度不是本发明所必需的。参照图2,钝化材料层26通过MBE方法被沉积在非晶体氧化物层24上。钝化材料层26可以包括碱或碱土金属、碱和/或碱土金属化合物、碱或碱土金属的氧化物、或碱和/或碱土金属氧化物的混合物。适宜作为钝化材料层26的材料的例子包含锶、氧化锶、钡、氧化钡,锶和钡的化合物以及类似的物质。通过打开MBE设备的闸门以使一个或多个钝化材料源暴露出来,启动MBE处理过程,从而使钝化材料熔化(flux)。钝化材料的熔化可以依据钝化材料的熔点和气压进行设置。通常,钝化材料的熔化在大约1埃/分钟至大约10埃/分钟的范围内。在本发明的优选实施例中,当钝化材料层26已经生长到期望的厚度时,就可以终止钝化材料的熔化。可选地,在处理期间,可以提供钝化材料的连续熔化。如果在处理期间提供钝化材料的连续熔化,可能希望提供钝化材料层26的厚度的现场监视,例如通过反射高能电子衍射(RHEED)晶体振荡厚度监视器,使得钝化材料层26的厚度达不到妨碍或不利影响非晶体氧化物层24的清除的厚度。最好是钝化材料层26的大约1至5个单层,更好的是钝化材料层26的大约1至2个单层被沉积在非晶体氧化层24上,尽管能够理解,钝化材料层26可以是适宜促进清除非晶体氧化物层24的任何厚度。
于是该衬底被加热到大约700℃至大约900℃的范围内的温度。图3举例说明的是被加热到大约700℃或更高温度时结构20的横截面图。在这种温度下,非晶体氧化物24的分子从单晶体衬底22的表面中释放出来,在非晶体氧化物层24中形成空隙28。在非晶体氧化物层24上的钝化材料层26促进了非晶体氧化物层从单晶体衬底22表面的释放,因此增加了非晶体氧化物层的清除速度。钝化材料作为催化剂,促使电子从钝化材料和非晶体氧化物中排出。这产生了钝化材料和非晶体氧化物之间的偶极子场,其使得非晶体氧化物处于活化状态。因此,非晶体氧化物更容易地分解成从单晶体衬底表面释放出来的易失性物质。此外,在空隙28的形成过程期间暴露的单晶体衬底22的部分被钝化材料层26的钝化材料钝化,如图4所例举的那样。如果没有来自钝化材料层26的钝化材料,空隙将继续长入单晶体衬底22,从而在单晶体衬底22中形成凹坑。随着处理的进行,非晶体氧化物层24继续从单晶体衬底22的表面释放,该表面则继续被钝化材料层26的钝化材料钝化。图5举例说明的是经过上述的处理过程得到的结构30的横截面图。处理过程结束时,所有的非晶体氧化层24基本上从单晶体衬底22释放出来,并且钝化材料层26在单晶体衬底22上提供规则和稳定的表面。
在从该衬底表面清除非晶体氧化物24之后,可以将该衬底冷却到大约200-800℃范围内的温度,最好冷却到350-450℃范围内的温度,并且正如图6举例说明的那样,单晶体氧化物层42可以在钝化材料层26上进行外延生长以形成结构40。单晶体氧化物层42最好选择成与下面的单晶体衬底22晶体兼容。适宜用于单晶体氧化物42的材料包含例如碱土金属钛酸盐、碱土金属锆酸盐、碱土金属铪酸盐、碱土金属钽酸盐、碱土金属钌酸盐、碱土金属铌酸盐、碱土金属钒酸盐、碱土金属锡基钙钛矿、镧铝酸盐、镧钪氧化物、钆氧化物这样的金属氧化物。这些材料大部分是绝缘体,尽管例如锶钌酸盐(strontiumruthenate)这样的材料是导体。通常,这些材料是金属氧化物或金属氮化物,更特别的是这些金属氧化物或氮化物通常包含至少两种不同的金属元素。
结构40可以还包含非晶体界面层44,最好是在单晶体氧化物层42的生长期间或之后通过衬底22表面的氧化过程形成的氧化物。层44的厚度可以足以减轻由于单晶体衬底22和单晶体氧化物层42之间的晶格常数失配而引起的应力。通常,层44的厚度在大约0.5-5nm的范围间。
下面的例子根据本发明的一个实施例说明了制备如图6所述的半导体结构的过程。该过程从提供包括硅或锗的单晶体半导体衬底开始。根据本发明的优选实施例,该半导体衬底是具有(100)晶体取向的硅晶片。该衬底的取向在轴上,或至多与轴偏离大约6°。至少一部分硅衬底具有原生非晶体硅氧化物层。为了在单晶硅衬底上外延生长单晶体氧化物层,必须首先清除原生非晶体硅氧化物层以暴露下面的硅衬底的晶体结构。该处理过程最好在UHV MBE设备中进行,尽管本发明可以同样使用其它的外延处理过程。硅衬底被放置在UHV MBE单元的处理室内,并且被加热到低于硅氧化物的升华温度的温度,最好加热到大约500℃。接着MBE设备中的闸门打开以暴露出一个或多个锶源,从而产生最好在大约1埃/分钟至大约10埃/分钟的范围内的锶熔化,并且更好的是大约4埃/分钟。接着锶的一个至两个单层被沉积在原生非晶体氧化物层上。可选地,锶氧化物的三个至四个单层可以通过在氧分压处于大约1×10-8托至1×10-7托的范围内的环境中暴露一个或多个锶源而被沉积在硅衬底表面上。
然后硅衬底被加热到至少为720℃的温度。锶(或锶氧化物)作为增加从硅衬底表面清除硅氧化物的速度的催化剂。锶促使电子从锶层和氧化硅层之一或全部中排出。这就在锶层和氧化硅层之间产生了偶极子场。偶极子场减弱了氧化硅层的Si-O键合,使得氧化硅层处于活化状态。因此,硅氧化物根据下列反应式更容易地分解成从单晶硅衬底表面释放的易失性物质:
随着氧化硅从硅衬底表面中被释放出来,开始在原生的非晶体硅氧化物层中形成例如图3中举例说明的空隙28的空隙。如果没有硅氧化物层上的锶(或锶氧化物),空隙会继续长入硅衬底中,从而在硅表面产生凹陷。然而,锶用于钝化所暴露的硅衬底表面,使得减少甚至消除硅衬底的进一步刻蚀。因此,就导致了具有规则的2×1结构的锶终结的硅(100)衬底。如果在这个处理阶段没有获得规则的(2×1)结构,可以将该结构暴露给额外的锶,直至获得规则的(2×1)结构。如果氧化锶用于钝化硅衬底表面,可以继续该过程,使得锶氧化物与硅衬底进行反应以形成易失性的SiO,从而留下锶终结的硅衬底。这个锶层形成用于随后的规则氧化物层的生长的模板。
根据本发明的一个实施例,在从硅衬底表面清除非晶体硅氧化物之后,该衬底被冷却到大约200至800℃范围内的温度,最好在350至450℃范围内,并且钛酸锶单晶体氧化物层通过MBE技术生长在模板层上。通过打开MBE设备的闸门以暴露锶、钛和氧源来启动MBE处理过程。锶与钛的比值近似为1∶1。氧分压起初设置在最小值,以每分钟大约0.1-0.8nm的生长速度生长化学计量的钛酸锶,最好大约为每分钟0.3-0.5nm。在启动钛酸锶的生长后,氧分压被增加到最初的最小值之上。钛酸锶的化学计量能够在生长期间通过监视RHEED模式并调整熔化来控制。氧的过压引起在下面的衬底和钛酸锶层之间的界面上非晶体硅氧化物层的生长。这个步骤可在SrTiO3层的生长期间或之后发生。硅氧化物界面层的生长是由于氧通过钛酸锶层扩散到界面而造成的,在界面中,氧与下面的衬底的表面上的硅进行反应。钛酸锶生长为具有相对下面的硅衬底被旋转45°的(100)晶体取向的规则(100)单晶体。在非晶体硅氧化物界面层中减轻了否则会因为硅衬底和生长晶体之间的较小晶格常数失配而在钛酸锶层中产生的应力。
上述的方法举例说明的是这样一种方法,其用于通过分子束外延附生处理从硅衬底清除非晶体硅氧化物,并形成包含硅衬底和包括钛酸锶的上部单晶体氧化物层的半导体结构。也可以通过化学气相沉积法(CVD)、金属有机化学气相沉积法(MOCVD)、迁移增强型外延附生法(MEE)、原子层外延附生法(ALE)、物理气相沉积法(PVD)、化学溶剂沉积法(CSD)、脉冲激光沉积法(PLD)或类似的方法进行该过程。而且,通过类似的过程,可以从例如锗、硅和锗的混合物、硅和碳的混合物、锗和碳的混合物、硅锗和碳的混合物以及类似物的其它单晶体衬底中清除原生的非晶体氧化物。此外,通过类似的过程,也能够生长出例如碱土金属钛酸盐、锆酸盐、铪酸盐、钽酸盐、钒酸盐、钌酸盐和铌酸盐,碱土金属锡基钙钛矿、铝酸镧、镧钪氧化物和钆氧化物的其它单晶体氧化物层。
在前述的详细说明中,本发明已经参照特殊的实施例进行了描述。不过,本领域的普通技术人员明白,在不背离本发明下面的权利要求书中提出的范围的前提下,可以进行各种各样的修正和变化。因此,详细说明书和附图被认为是举例说明性的而不是限制性的,所有这样的修正试图包含在本发明的范围之内。
前面已经针对具体实施例描述了本发明的益处、其它优点和问题解决方案。然而,上述益处、优点、问题解决方案和目的是使任何益处、优点或解决方案付诸实现和易于理解的任何要素,均不得被解释成任何或所有权利要求的关键、必需或必要特征或要素。这里,术语″包括″或其任何其他表达方式均被用来覆盖非排它性的内含,使得包括一系列要素的过程、方法、项目或装置不仅仅包含那些要素,而是可以包含其它没有明确列出或所述过程、方法、项目或装置所固有的要素。
Claims (15)
1.一种从单晶体衬底的表面清除非晶体氧化物的方法,该方法包括:
将钝化材料沉积在所述非晶体氧化物之上;以及
将所述表面加热,使得所述非晶体氧化物层分解成至少一种从所述表面释放出来的易失性物质。
2.如权利要求1中所述的方法,其中所述加热步骤在所述沉积步骤之后进行。
3.如权利要求1中所述的方法,其中所述加热步骤在所述沉积步骤期间进行。
4.如权利要求1中所述的方法,进一步包括在所述单晶体衬底的所述表面上外延生长单晶体氧化物层的步骤。
5.如权利要求4中所述的方法,进一步包括在所述单晶体衬底之上和所述单晶体氧化物层之下形成非晶体氧化物界面的步骤。
6.如权利要求1中所述的方法,进一步包括在所述沉积步骤之前,加热所述单晶体衬底到低于所述非晶体氧化物层的升华温度的温度的步骤。
7.如权利要求1中所述的方法,其中所述单晶体衬底包括硅,锗,硅和锗的化合物,硅和碳的化合物,硅、锗和碳的化合物中的一种。
8.如权利要求1中所述的方法,其中所述钝化材料包括碱土金属、碱土金属氧化物、碱土金属、碱土金属氧化物中的至少一种。
9.如权利要求8中所述的方法,其中所述钝化材料包括锶和氧化锶中的一种。
10.如权利要求4中所述的方法,其中所述单晶体氧化物包括碱土金属钛酸盐、碱土金属锆酸盐、碱土金属铪酸盐、碱土金属钽酸盐、碱土金属钌酸盐、碱土金属铌酸盐、碱土金属钒酸盐、碱土金属锡基钙钛矿、铝酸镧、镧钪氧化物、氧化钆中的至少一种。
11.如权利要求1中所述的方法,其中所述加热步骤包括加热到从大约700℃至大约900℃的范围内的温度的步骤。
12.如权利要求1中所述的方法,进一步包括加热所述表面,使得所述钝化材料对所述单晶体衬底进行钝化并在其上形成规则层的步骤。
13.如权利要求1中所述的方法,其中通过超高真空分子束外延附生的处理进行所述沉积。
14.一种利用具有在其上形成的非晶体氧化物的单晶体衬底制备半导体结构的方法,该方法包括:
将钝化材料沉积在所述衬底和所述非晶体氧化物之上;
加热所述单晶体衬底,使得所述非晶体氧化物层分解成至少一种从所述单晶体衬底中释放出来的易失性物质;以及
将单晶体氧化物沉积在所述单晶体衬底上。
15.一种从单晶体衬底清除非晶体氧化物的方法,该方法包括:
将钝化材料沉积在所述单晶体表面上;以及
加热所述单晶体衬底,
其中所述钝化材料促使电子从钝化材料和非晶体氧化物中的至少一种中排出,所述电子的排出在所述钝化材料和非晶体氧化物之间产生偶极子场,从而促进非晶体氧化物分解成易失性物质,并通过钝化材料产生单晶体衬底的钝化。
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-
2001
- 2001-10-26 US US09/983,854 patent/US6693033B2/en not_active Expired - Lifetime
-
2002
- 2002-10-10 EP EP02802442A patent/EP1451857A2/en not_active Withdrawn
- 2002-10-10 AU AU2002356551A patent/AU2002356551A1/en not_active Abandoned
- 2002-10-10 JP JP2003541031A patent/JP2005533364A/ja active Pending
- 2002-10-10 KR KR1020047006191A patent/KR20050035170A/ko not_active Application Discontinuation
- 2002-10-10 CN CNA028225759A patent/CN1695225A/zh active Pending
- 2002-10-10 WO PCT/US2002/032344 patent/WO2003038873A2/en not_active Application Discontinuation
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US6693033B2 (en) | 2004-02-17 |
EP1451857A2 (en) | 2004-09-01 |
US20020072253A1 (en) | 2002-06-13 |
WO2003038873A3 (en) | 2003-11-13 |
JP2005533364A (ja) | 2005-11-04 |
WO2003038873A2 (en) | 2003-05-08 |
KR20050035170A (ko) | 2005-04-15 |
AU2002356551A1 (en) | 2003-05-12 |
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