CN1789110A - 微机电系统到有源电路的晶片接合 - Google Patents
微机电系统到有源电路的晶片接合 Download PDFInfo
- Publication number
- CN1789110A CN1789110A CNA200510117764XA CN200510117764A CN1789110A CN 1789110 A CN1789110 A CN 1789110A CN A200510117764X A CNA200510117764X A CN A200510117764XA CN 200510117764 A CN200510117764 A CN 200510117764A CN 1789110 A CN1789110 A CN 1789110A
- Authority
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- China
- Prior art keywords
- wafer
- mems
- active device
- via hole
- package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- 238000007789 sealing Methods 0.000 claims description 37
- 238000005538 encapsulation Methods 0.000 claims description 16
- 230000008878 coupling Effects 0.000 claims description 9
- 238000010168 coupling process Methods 0.000 claims description 9
- 238000005859 coupling reaction Methods 0.000 claims description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 7
- 239000010949 copper Substances 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 238000002161 passivation Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 claims 11
- 238000009434 installation Methods 0.000 claims 3
- 235000012431 wafers Nutrition 0.000 description 353
- 238000004519 manufacturing process Methods 0.000 description 18
- 230000004907 flux Effects 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
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- 239000000758 substrate Substances 0.000 description 4
- 238000007747 plating Methods 0.000 description 3
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- 238000003466 welding Methods 0.000 description 3
- 238000012856 packing Methods 0.000 description 2
- 238000010897 surface acoustic wave method Methods 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000011435 rock Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Images
Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/007—Interconnections between the MEMS and external electrical signals
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00222—Integrating an electronic processing unit with a micromechanical structure
- B81C1/0023—Packaging together an electronic processing unit die and a micromechanical structure die
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00865—Multistep processes for the separation of wafers into individual elements
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2203/00—Forming microstructural systems
- B81C2203/01—Packaging MEMS
- B81C2203/0118—Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0237—Disposition of the redistribution layers
- H01L2224/02377—Fan-in arrangement
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/0557—Disposition the external layer being disposed on a via connection of the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1302—Disposition
- H01L2224/13025—Disposition the bump connector being disposed on a via connection of the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/0538—Constructional combinations of supports or holders with electromechanical or other electronic elements
- H03H9/0547—Constructional combinations of supports or holders with electromechanical or other electronic elements consisting of a vertical arrangement
Abstract
Description
Claims (25)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/012,589 US7202560B2 (en) | 2004-12-15 | 2004-12-15 | Wafer bonding of micro-electro mechanical systems to active circuitry |
US11/012,589 | 2004-12-15 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1789110A true CN1789110A (zh) | 2006-06-21 |
CN1789110B CN1789110B (zh) | 2010-10-27 |
Family
ID=35516316
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200510117764XA Expired - Fee Related CN1789110B (zh) | 2004-12-15 | 2005-11-10 | 微机电系统到有源电路的晶片接合 |
Country Status (4)
Country | Link |
---|---|
US (2) | US7202560B2 (zh) |
JP (1) | JP2006173598A (zh) |
CN (1) | CN1789110B (zh) |
GB (1) | GB2421356B (zh) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102001614A (zh) * | 2009-08-28 | 2011-04-06 | 美商明锐光电股份有限公司 | 微机电装置与其制造方法 |
CN101519183B (zh) * | 2008-01-31 | 2011-09-21 | 台湾积体电路制造股份有限公司 | 具有集成电路管芯的微机电系统封装 |
CN105731354A (zh) * | 2014-12-24 | 2016-07-06 | 意法半导体(马耳他)有限公司 | 用于mems传感器器件的晶片级封装及对应制造工艺 |
CN109470367A (zh) * | 2018-11-12 | 2019-03-15 | 中国科学院长春光学精密机械与物理研究所 | 一种基于fbar的宽波段非制冷红外探测器的制备方法 |
CN112039491A (zh) * | 2020-03-31 | 2020-12-04 | 中芯集成电路(宁波)有限公司 | 一种薄膜压电声波滤波器及其制造方法 |
Families Citing this family (46)
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US7202560B2 (en) * | 2004-12-15 | 2007-04-10 | Avago Technologies Wireless Ip (Singapore) Pte. Ltd. | Wafer bonding of micro-electro mechanical systems to active circuitry |
KR100661350B1 (ko) * | 2004-12-27 | 2006-12-27 | 삼성전자주식회사 | Mems 소자 패키지 및 그 제조방법 |
US20070007983A1 (en) * | 2005-01-06 | 2007-01-11 | Salmon Peter C | Semiconductor wafer tester |
US7407826B2 (en) * | 2005-03-21 | 2008-08-05 | Honeywell International Inc. | Vacuum packaged single crystal silicon device |
US20060211233A1 (en) * | 2005-03-21 | 2006-09-21 | Skyworks Solutions, Inc. | Method for fabricating a wafer level package having through wafer vias for external package connectivity and related structure |
US7406761B2 (en) * | 2005-03-21 | 2008-08-05 | Honeywell International Inc. | Method of manufacturing vibrating micromechanical structures |
US7576426B2 (en) * | 2005-04-01 | 2009-08-18 | Skyworks Solutions, Inc. | Wafer level package including a device wafer integrated with a passive component |
US20070004079A1 (en) * | 2005-06-30 | 2007-01-04 | Geefay Frank S | Method for making contact through via contact to an offset contactor inside a cap for the wafer level packaging of FBAR chips |
US8217473B2 (en) * | 2005-07-29 | 2012-07-10 | Hewlett-Packard Development Company, L.P. | Micro electro-mechanical system packaging and interconnect |
US20070023923A1 (en) * | 2005-08-01 | 2007-02-01 | Salmon Peter C | Flip chip interface including a mixed array of heat bumps and signal bumps |
US20070023889A1 (en) * | 2005-08-01 | 2007-02-01 | Salmon Peter C | Copper substrate with feedthroughs and interconnection circuits |
US7586747B2 (en) * | 2005-08-01 | 2009-09-08 | Salmon Technologies, Llc. | Scalable subsystem architecture having integrated cooling channels |
US20070093229A1 (en) * | 2005-10-20 | 2007-04-26 | Takehiko Yamakawa | Complex RF device and method for manufacturing the same |
US7635606B2 (en) * | 2006-08-02 | 2009-12-22 | Skyworks Solutions, Inc. | Wafer level package with cavities for active devices |
WO2008070669A2 (en) * | 2006-12-05 | 2008-06-12 | Miradia Inc. | Method and apparatus for mems oscillator |
KR100833508B1 (ko) * | 2006-12-07 | 2008-05-29 | 한국전자통신연구원 | 멤즈 패키지 및 그 방법 |
US20080144863A1 (en) * | 2006-12-15 | 2008-06-19 | Fazzio R Shane | Microcap packaging of micromachined acoustic devices |
US7875942B2 (en) * | 2007-01-04 | 2011-01-25 | Stmicroelectronics, S.R.L. | Electronic device including MEMS devices and holed substrates, in particular of the LGA or BGA type |
EP1959568A1 (en) * | 2007-02-19 | 2008-08-20 | Consejo Superior de Investigaciones Cientificas | Thin-film bulk acoustic ware resonator and method for performing heterogeneous integration of the same with complementary-metal-oxide-semiconductor integrated circuit |
US20080217708A1 (en) * | 2007-03-09 | 2008-09-11 | Skyworks Solutions, Inc. | Integrated passive cap in a system-in-package |
US20080283944A1 (en) * | 2007-05-18 | 2008-11-20 | Geefay Frank S | PHOTOSTRUCTURABLE GLASS MICROELECTROMECHANICAL (MEMs) DEVICES AND METHODS OF MANUFACTURE |
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US8350382B2 (en) | 2007-09-21 | 2013-01-08 | Infineon Technologies Ag | Semiconductor device including electronic component coupled to a backside of a chip |
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US8900931B2 (en) | 2007-12-26 | 2014-12-02 | Skyworks Solutions, Inc. | In-situ cavity integrated circuit package |
TWI380456B (en) * | 2008-04-30 | 2012-12-21 | Pixart Imaging Inc | Micro-electro-mechanical device and method for making same |
US9164404B2 (en) | 2008-09-19 | 2015-10-20 | Intel Corporation | System and process for fabricating semiconductor packages |
US9165841B2 (en) | 2008-09-19 | 2015-10-20 | Intel Corporation | System and process for fabricating semiconductor packages |
US8291559B2 (en) * | 2009-02-24 | 2012-10-23 | Epcos Ag | Process for adapting resonance frequency of a BAW resonator |
SG179006A1 (en) * | 2009-09-25 | 2012-04-27 | Agency Science Tech & Res | A wafer level package and a method of forming a wafer level package |
US8466543B2 (en) * | 2010-05-27 | 2013-06-18 | International Business Machines Corporation | Three dimensional stacked package structure |
US8836449B2 (en) | 2010-08-27 | 2014-09-16 | Wei Pang | Vertically integrated module in a wafer level package |
KR20120119845A (ko) * | 2011-04-22 | 2012-10-31 | 삼성전기주식회사 | 관성센서 및 그의 제조방법 |
US9212051B1 (en) | 2011-08-04 | 2015-12-15 | Western Digital (Fremont), Llc | Systems and methods for forming MEMS assemblies incorporating getters |
CN103137567B (zh) * | 2011-11-30 | 2016-05-25 | 和舰科技(苏州)有限公司 | 一种减轻晶圆切割应力破坏的晶圆结构及版图设计方法 |
US9040355B2 (en) * | 2012-07-11 | 2015-05-26 | Freescale Semiconductor, Inc. | Sensor package and method of forming same |
TWI512938B (zh) | 2013-01-28 | 2015-12-11 | Asia Pacific Microsystems Inc | 整合式微機電元件及其製造方法 |
GB2516079A (en) | 2013-07-10 | 2015-01-14 | Melexis Technologies Nv | Method for hermetically sealing with reduced stress |
DE112014006008B4 (de) * | 2013-12-25 | 2022-07-28 | Murata Manufacturing Co., Ltd. | Elektronikkomponentenmodul |
WO2015153938A1 (en) * | 2014-04-04 | 2015-10-08 | Robert Bosch Gmbh | Membrane-based sensor and method for robust manufacture of a membrane-based sensor |
US9257834B1 (en) | 2015-02-13 | 2016-02-09 | The Silanna Group Pty Ltd. | Single-laminate galvanic isolator assemblies |
US10790332B2 (en) * | 2015-12-24 | 2020-09-29 | Intel Corporation | Techniques for integrating three-dimensional islands for radio frequency (RF) circuits |
CN107140598B (zh) * | 2017-03-24 | 2018-12-07 | 苏州敏芯微电子技术股份有限公司 | 一种微机电系统及其制备方法 |
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- 2005-11-10 CN CN200510117764XA patent/CN1789110B/zh not_active Expired - Fee Related
- 2005-11-28 JP JP2005341710A patent/JP2006173598A/ja active Pending
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2007
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Also Published As
Publication number | Publication date |
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GB0522505D0 (en) | 2005-12-14 |
US20060128058A1 (en) | 2006-06-15 |
US8143082B2 (en) | 2012-03-27 |
GB2421356A (en) | 2006-06-21 |
GB2421356B (en) | 2010-11-24 |
US7202560B2 (en) | 2007-04-10 |
JP2006173598A (ja) | 2006-06-29 |
CN1789110B (zh) | 2010-10-27 |
US20100267182A1 (en) | 2010-10-21 |
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