CN1798999A - 用于液晶显示器的替换薄膜晶体管 - Google Patents

用于液晶显示器的替换薄膜晶体管 Download PDF

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CN1798999A
CN1798999A CNA2004800148925A CN200480014892A CN1798999A CN 1798999 A CN1798999 A CN 1798999A CN A2004800148925 A CNA2004800148925 A CN A2004800148925A CN 200480014892 A CN200480014892 A CN 200480014892A CN 1798999 A CN1798999 A CN 1798999A
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CN100472302C (zh
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坎迪丝·海伦·勃朗·埃利奥特
汤玛斯·劳埃得·克莱戴尔
马修·奥斯朋·施莱格尔
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Samsung Display Co Ltd
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate

Abstract

揭示了用于液晶显示器的替换薄膜晶体管(502和504)。这些替换薄膜晶体管(502和504)可用于显示器的显示屏,例如液晶显示器的显示屏,特别是具有交替变换子像素排列的显示屏。这些晶体管(502和504),可以使用不同的,非传统的结构,定向在液晶显示器的显示屏上,以处理不匹配和寄生电容。

Description

用于液晶显示器的替换薄膜晶体管
背景技术
薄膜晶体管的不匹配和寄生电容会使电子设备,例如液晶显示器的质量和性能下降。在颁发给Katayama等人的美国第5,191,451号专利(‘451专利)中,可以找到校正薄膜晶体管的未对准以及任何关联的寄生电容增加的一种已知的尝试。图1A对第‘451号专利的“双薄膜晶体管”结构100进行了描述。源极传输线104通过源电极106与薄膜晶体管相连接。两个栅电极1708连接到栅传输线102。两个漏电极110连接到像素,并这样形成,使得两个栅电极在激活时能够实现从源电极至漏电极的电传导。注意到连接到薄膜晶体管上的有两个交叠区域112,它们可以在栅与源极之间产生附加寄生电容。如在第‘451号专利中所讨论的,其中所论及的该双薄膜晶体管布局,对薄膜晶体管在垂直方向的未对准可作一定程度的校正。
减少薄膜晶体管未对准的不利效应的另一种方式,示于颁发给Nakazawa的美国第5,097,297号专利(‘297专利)中。图4对按照‘297号专利所教导的方式而制成的薄膜晶体管400作了描述。如在图2中所可见到的,栅传输线402发出栅信号给栅电极408。源极传输线404把图像数据发送到源电极406。当栅电极激活时,图像数据经过漏电极410传递给像素。注意到这个薄膜晶体管实施例只含有一个栅交叠412,这有助于减少寄生电容。
进一步地,以前的LCD使用相同方向在显示器的像素区域排列晶体管。然而,对于交替变换的像素排列,晶体管可能需要位于像素区域的非传统位置,以处理非对准和寄生电容。
附图说明
构成本说明书的一部分而结合在本说明书内的附图,是用来解说本发明典型的具体实施方案和实施例,并且这些附图连同有关叙述用来解释本发明的原理。
图1示出具有双源极/漏极结构的现有技术薄膜晶体管。
图2和3示出具有双源极/漏极结构的替换薄膜晶体管。
图4示出一种带有双栅结构的现有技术薄膜晶体管。
图5示出分别处于正常方向和相反方向的薄膜晶体管结构。
图6示出正常方向和相反方向的薄膜晶体管结构,该正常方向结构内带有一个附加栅交叠,以对该相反方向结构内所发现的任何寄生电容进行平衡。
图7示出正常方向和相反方向的薄膜晶体管结构,该相反方向结构中带有一个较少栅交叠,以便匹配正常方向结构的任何寄生电容。
图8示出一种新型像素元件设计,有一个角隅从该像素去除,以平衡寄生电容。
图9示出另一种新型像素元件设计,有多个角隅从该像素去除,以平衡寄生电容。
图10示出另一种新型像素结构,于该结构中附加有至少一根附加传输线,以使得像素元件屏蔽寄生效应。
具体实施方式
现在将对在附图中所示例说明的那些具体实施方案和实施例作详细的参考。在可能的地方,将在所有附图中采用相同的参考号码来称谓相同或类似的部件。
以下的具体实施方案和实施例,揭示了用于液晶显示器的替换薄膜晶体管。这些替换薄膜晶体管可用于显示器的显示屏,例如液晶显示器的显示屏,特别是具有交替变换子像素排列的显示屏。这些晶体管,可以使用不同的,非传统的结构,定向在液晶显示器的显示屏上,以处理不匹配和寄生电容。
图2和3对于图1中所示的现有技术的双薄膜晶体管结构的提供了不同的替代实施例。这些结构可提供减少了的、从源极至栅的寄生电容,这些电容会对某些图像引起色度亮度干扰。然而从栅至漏极的交叠对图像品质的破坏较少。图3实施例的一个优点是它只有一个交叠132,这可以减少寄生电容。
从图5到图10示出薄膜晶体管的另一组重新设计,该组重新设计用来处理因上述薄膜晶体管重布局而引入的寄生电容不均衡。由于薄膜晶体管在显示屏上重布局,显示屏上一些薄膜晶体管有可能实现在像素不同角隅或象限内。例如,一些薄膜晶体管可构造在像素区域的上部左手角,一些薄膜晶体管可构造在像素区域的上部右手角等等。如果所有这种薄膜晶体管都以相同的方式来构造,则对于在左手角和右手角的实现,很有可能源极-漏极方向将会反过来。这种构造的不均匀性,在给定薄膜晶体管不对准的情况下可能引入不均衡寄生电容。
与以正常方向构筑的薄膜晶体管1904相比,图5是以相反方向构筑的薄膜晶体管502的实施例。为了示范的目的,薄膜晶体管504以通常的方式构筑在其关联像素的上部左手角——即没有任何交叠,以避免任何引入的寄生电容。注意到源极(S)和漏极(D)是以自左向右方式安置。图中所示的薄膜晶体管502以相反的方向构筑在像素区域的右上角——即构造了从源极传输线506出来的交叠514,使得源电极510和漏电极512还是处于自左向右的方式。因此,如果在水平方向存在薄膜晶体管未对准,薄膜晶体管502和504将接受相同数量的增加寄生电容——从而使显示屏的缺陷保持均匀。可意识到,虽然薄膜晶体管502和薄膜晶体管504被描述为靠在一起的,并连接到同一列上,这实质上是出于解释的目的。两个相邻的子像素不大可能共享同一根列/数据传输线——因此,提供薄膜晶体管504和其关联像素,仅是为了示出正常薄膜晶体管方向与相反方向薄膜晶体管502之间的区别。
图6示出薄膜晶体管602和604的另一个实施例。如所能见到的,把新的交叠606附加在薄膜晶体管604上,从而可通过交叠604来平衡增加的寄生电容。图7也是薄膜晶体管702和704的另一个实施例。如在此处所可见到的,图6中的栅电极交叠606已去除,以支持对那些单独的像素元件具有较小影响的交叠706。
图8和9为去除掉角隅810和910的像素元件的实施例,角隅2210和2310的去除,是为了匹配容纳薄膜晶体管结构的所去除角隅。如此处所设计的这些像素元件,能够比正常的像素结构更好地来平衡寄生电容。
图10是像素结构的另一实施例,该像素结构采用至少一根外部金属线1010,以帮助该像素把栅传输线与像素元件之间的寄生电容屏蔽掉。另外,如果采用点反转模式,则在两根传输线2410上相反的极性也将有助于平衡源极传输线和像素元件之间任何寄生电容。
关于此处所揭示的变化薄膜晶体管结构和像素元件,可以使用标准液晶显示器制造工艺来形成这种结构。此外,可以由透明材料(例如透明导电氧化物)形成列,栅,以及电极线,从而不降低液晶显示器的光特性。

Claims (11)

1.一种具有双薄膜晶体管的器件,该器件包括:
用于该双薄膜晶体管的至少一个漏电极;
用于该双薄膜晶体管的栅传输线,至少具有两个栅电极;以及
用于该双薄膜晶体管的源极传输线,至少具有一个源电极,其中由该漏电极和该栅传输线形成一个交叠。
2.一种薄膜晶体管,包括:
源极,包括连接到源极传输线的源电极;
栅极,包括至少第一栅电极以及第二栅电极,所述第一栅电极和第二栅电极连接到栅传输线;
漏极,连接到所述源电极,所述漏极包括至少第一漏电极和第二漏电极;
其中所述栅极和所述源极之间最多只有一个单独的交叠。
3.如权利要求2所述的薄膜晶体管,其中所述栅极和所述漏极之间至少有两个交叠。
4.一种器件,包括如权利要求2所述的多个薄膜晶体管。
5.一种器件,包括多个第一薄膜晶体管和多个第二薄膜晶体管,所述第一和所述第二薄膜晶体管包括源电极和漏电极;
其中所述第一薄膜晶体管实质上处于正常方向,而所述第二薄膜晶体管实质上处于相反方向;以及
其中进一步,所述第一薄膜晶体管和所述第二薄膜晶体管的所述源电极和所述漏电极,都按照实质上同一方向放置。
6.如权利要求5所述器件,其中所述第二薄膜晶体管包括交叠,来实现实质上与所述第一薄膜晶体管中相同的源电极和漏电极放置方向。
7.如权利要求5所述的器件,其中薄膜晶体管的任何未匹配,对于所述第一薄膜晶体管和所述第二薄膜晶体管实质上相同。
8.如权利要求6所述的器件,其中所述第一薄膜晶体管包括交叠,来实质上平衡由所述第二薄膜晶体管中所述交叠所引起的任何寄生电容。
9.如权利要求5所述的器件,其中所述器件进一步包括连接到所述第一薄膜晶体管和所述第二薄膜晶体管的像素元件;
其中进一步所述像素元件具有至少一个角隅是去除的。
10.如权利要求9所述的器件,其中所述去除的角隅的形状与容纳所述薄膜晶体管的角隅实质上形状相同。
11.一种像素,包括:
薄膜晶体管,所述薄膜晶体管连接到栅传输线和源传输线;以及
至少一根外部金属线,放置在所述栅传输线和所述像素元件之间。
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US7791679B2 (en) 2010-09-07
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