DE10147054A1 - Multiplane circuit board has planes connected via adhesive film with perpendicular inclusions made of conductive material - Google Patents

Multiplane circuit board has planes connected via adhesive film with perpendicular inclusions made of conductive material

Info

Publication number
DE10147054A1
DE10147054A1 DE2001147054 DE10147054A DE10147054A1 DE 10147054 A1 DE10147054 A1 DE 10147054A1 DE 2001147054 DE2001147054 DE 2001147054 DE 10147054 A DE10147054 A DE 10147054A DE 10147054 A1 DE10147054 A1 DE 10147054A1
Authority
DE
Germany
Prior art keywords
adhesive film
circuit board
film
printed circuit
conductive material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE2001147054
Other languages
German (de)
Inventor
Helmut Katzier
Renate Reischl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DE2001147054 priority Critical patent/DE10147054A1/en
Publication of DE10147054A1 publication Critical patent/DE10147054A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/462—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09945—Universal aspects, e.g. universal inner layers or via grid, or anisotropic interposer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10378—Interposers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

At least two planes of the circuit board are connected by means of adhesive film. The adhesive film has inclusions made of conductive material, aligned perpendicular to the adhesive foil. The inclusions extend to the edges of the film, on both sides. Electrical contacts are created between the two planes, perpendicular to the film.

Description

Der Erfindungsgegenstand betrifft eine Mehrebenenleiterplatte mit erhöhter freier Verdrahtungsfläche. The subject matter of the invention relates to a multilevel printed circuit board with increased free wiring area.

Die Baugruppen komplexer elektronischer Systeme, wie z. B. Vermittlungsanlagen in der Vermittlungstechnik, werden mit Hilfe von Mehrebenenleiterplatten aufgebaut. Die Ebenen einer Mehrebenenleiterplatte besteht aus mehreren Lagen, wie z. B. Lagen aus isolierendem Trägermaterial, Prepreg-Klebefolien, Kupferlagen etc. Lagen aus Leitermaterial sind dabei durch Lagen aus isolierendem Trägermaterial getrennt. Das Leiterbild wird in den Lagen aus Leitermaterial, z. B. Kupfer, geätzt. The assemblies of complex electronic systems, such as. B. Switching systems in switching technology are included Assembled using multilevel printed circuit boards. The levels one Multi-level circuit board consists of several layers, such as. B. Layers of insulating backing material, prepreg adhesive films, Copper layers etc. Layers of conductor material are through Separate layers of insulating carrier material. The The conductor pattern is made in the layers of conductor material, e.g. B. copper, etched.

Ein wichtiger Schritt bei der Herstellung von Mehrebenenleiterplatten ist die Bohrung der Durchkontaktierungen zwischen verschiedenen Ebenen der Mehrebenenleiterplatte, die z. B. mechanisch oder mit Hilfe eines Lasers erfolgen kann. Dabei versucht man, den Raum auf der Leiterplatte, der wegen Durchkontaktierungen für das Anbringen von Leitungen und Schaltelementen verloren geht, möglichst gering zu halten. Aus herstellungstechnischen Gründen nimmt der Durchmesser der Durchkontaktierungen mit der Länge bzw. der Zahl der Ebenen, die durch die Durchkontaktierungen verbunden sind, zu. An important step in the manufacture of Multi-level printed circuit boards are the holes in the plated-through holes between different levels of the multi-level circuit board, the z. B. can be done mechanically or with the help of a laser. there one tries to find the space on the circuit board because of Vias for attaching cables and Switching elements is lost to keep as low as possible. Out manufacturing reasons the diameter of the Vias with the length or number of levels that are connected through the vias.

Ein weiteres Problem bei der Herstellung von Mehrebenenleiterplatten ist, dass die Durchkontaktierungen bei der Verwendung von Hochfrequenzsignalen parasitäre Kapazitäten bilden, die die Führung der Signale zwischen den Ebenen beeinträchtigen. Die Beeinträchtigung nimmt wie die Verminderung der freien Verdrahtungsfläche bei langen, sich über mehrere Ebenen erstreckende Durchkontaktierungen zu. Another problem in the manufacture of Multilevel printed circuit boards is that the vias at the Use parasitic capacitances using high-frequency signals, which is the routing of signals between levels affect. The impairment decreases like the diminution of free wiring area for long, spread over several Vias extending at levels.

Der Erfindung liegt die Aufgabe zugrunde, die Eigenschaften von Mehrebenenleiterplatten bezüglich der oben erwähnten Probleme zu verbessern. The invention has for its object the properties multilevel circuit boards with respect to those mentioned above Improve problems.

Die Aufgabe wird durch eine Mehrebenenleiterplatte entsprechend Anspruch 1 gelöst. The task is accomplished through a multi-level circuit board solved according to claim 1.

Bei der erfindungsgemäßen Mehrebenenleiterplatte sind wenigstens zwei Ebenen der Mehrebenenleiterplatte mit Hilfe einer Klebefolie verbunden, wobei

  • - die Klebefolie im wesentlichen vertikal zur Klebefolie ausgerichtete Einlagerungen aus einem leitfähigen Material aufweist,
  • - die Einlagerungen beidseitig bis an den Rand der Folie reichen, und
  • - mit Hilfe der Einlagerungen zwischen beiden Ebenen vertikal zur Klebefolie elektrische Kontakte herstellbar sind (Anspruch 1). Die erfindungsgemäße Mehrebenenleiterplatte erlaubt, Durchkontaktierungen mit großem Durchmesser einzusparen. Dadurch steht mehr Verdrahtungsplatz zur Verfügung. Zudem entstehen bei Durchkontaktierungen mit großem Durchmesser häufig Probleme durch parasitäre Kapazitäten bei hochfrequenten Signalen, die bei der erfindungsgemäßen Mehrebenenleiterplatte vermieden werden. Die Einlagerungen können gleichmäßig über die gesamte Klebefolie verteilt sein (Anspruch 2). Alternativ kann in der Ebene der Folie der Bereich, wo Einlagerungen vorgesehen sind, beschränkt sein, und durch die Beschränkung der Einlagerung eine anwendungsspezifische Strukturierung gegeben sein (Anspruch 3). Bei einer strukturierten Folie erspart man sich das Einbringen der Einlagerungen außerhalb des Bereichs, wo eine leitende Verbindung hergestellt werden soll. Für die Kontaktierung zwischen verschiedenen Ebenen einer Mehrebenleiterplatte sind dann wenigstens zwei Durchkontaktierungen von verschiedenen Ebenen, die durch die Klebefolie verbunden sind, so übereinander angeordnet, dass die beiden Durchkontaktierungen über die Klebefolie elektrisch verbunden sind (Anspruch 4).
In the multilevel printed circuit board according to the invention, at least two levels of the multilevel printed circuit board are connected with the aid of an adhesive film, wherein
  • the adhesive film has deposits of a conductive material that are oriented essentially vertically to the adhesive film,
  • - The deposits extend on both sides to the edge of the film, and
  • - With the help of the deposits between the two levels, vertical contacts to the adhesive film can be produced (claim 1). The multilevel printed circuit board according to the invention makes it possible to save on plated-through holes with a large diameter. This means that more wiring space is available. In addition, in the case of plated-through holes with a large diameter, problems often arise due to parasitic capacitances in the case of high-frequency signals, which are avoided in the multilevel printed circuit board according to the invention. The deposits can be evenly distributed over the entire adhesive film (claim 2). Alternatively, in the plane of the film, the area where inclusions are provided can be restricted, and application-specific structuring can be provided by restricting the inclusion (claim 3). In the case of a structured film, there is no need to insert the deposits outside the area where a conductive connection is to be made. For contacting between different levels of a multilevel printed circuit board, at least two vias from different levels, which are connected by the adhesive film, are then arranged one above the other such that the two vias are electrically connected via the adhesive film (claim 4).

Im folgenden wird die Erfindung im Rahmen eines Ausführungsbeispiels anhand von Figuren näher erläutert. Es zeigen In the following the invention within the scope of a Exemplary embodiment explained in more detail with reference to figures. Show it

Fig. 1 Herkömmlicher Aufbau einer Mehrebenenleiterplatte Fig. 1 Conventional structure of a multi-level circuit board

Fig. 2 Aufbau einer erfindungsgemäßen Mehrebenenleiterplatte mit Klebefolie Fig. 2 Structure of a multilevel circuit board according to the invention with adhesive film

Fig. 3 Struktur der Klebefolie mit Einlagerungen aus leitfähigen Material Fig. 3 structure of the adhesive film with inclusions made of conductive material

Dabei bezeichnen gleiche Bezugszeichen gleiche Elemente. In Fig. 1 ist eine Mehrebenenleiterplatte gezeigt, die mit drei Halbzeugen HZ1, HZ2, HZ3 gebildet ist. Dabei setzt sich ein Halbzeug aus drei Kupferlagen KL und zwei Lagen aus isolierenden Trägermaterial TM zusammen, die einander abwechseln. Die Halbzeuge sind mit Hilfe von Klebefolien Prepreg zu einer Mehrebenenleiterplatte zusammengefügt. Jedes der drei Halbzeuge HZ1, HZ2, HZ3 weist eine Durchkontaktierung mit kleinem Durchmesser kDK auf, die jeweils leitend mit einer großen Durchkontaktierung mit großem Durchmesser gDK verbunden ist, die sich durch alle drei Halbzeuge HZ1, HZ2, HZ3 erstreckt und den elektrischen Kontakt der einzelnen Halbzeuge mit kleinem Durchmesser kDK besorgt. Diese Durchkontaktierung mit großem Durchmesser gDK hat aus herstellungstechnisch bedingten Gründen einen deutlich größeren Durchmesser als die Durchkontaktierungen mit kleinem Durchmesser kDK, was sich aus der Anzahl der Ebenen der Mehrebenenleiterplatte begründet, durch die die jeweilige Durchkontaktierungen läuft. Die Durchkontaktierungen mit kleinem Durchmesser kDK sind mit der Durchkontaktierung mit großem Durchmesser gDK leitend verbunden, wodurch ein Kontakt der Durchkontaktierungen mit kleinem Durchmesser kDK untereinander realisiert ist. Exemplarisch wird auf die Verbindung zwischen der Durchkontaktierung mit kleinem Durchmesser des Halbzeugs HZ3 mit der Durchkontaktierung mit großem Durchmesser gDK mit dem Bezugszeichen VDK hingewiesen. The same reference numerals designate the same elements. In Fig. 1, a multi-level circuit board is shown, which is formed with three semi-finished products HZ1, HZ2, HZ3. A semi-finished product consists of three copper layers KL and two layers of insulating carrier material TM, which alternate with one another. The semi-finished products are joined together with the aid of prepreg adhesive films to form a multi-level printed circuit board. Each of the three semi-finished products HZ1, HZ2, HZ3 has a through-hole with a small diameter kDK, each of which is conductively connected to a large through-hole contact with a large diameter gDK, which extends through all three semi-finished products HZ1, HZ2, HZ3 and the electrical contact of the individual Semi-finished products with a small diameter kDK. This through-hole with a large diameter gDK has a significantly larger diameter than the through-holes with a small diameter kDK for manufacturing reasons, which is due to the number of levels of the multi-level printed circuit board through which the respective through-holes run. The small-diameter vias kDK are conductively connected to the large-diameter gDK plated-through holes, whereby the small-diameter kDK plated-through holes are in contact with one another. As an example, reference is made to the connection between the through-hole with a small diameter of the semi-finished product HZ3 and the through-hole with a large diameter gDK with the reference symbol VDK.

In Fig. 2 ist gezeigt, dass die Durchkontaktierung mit großem Durchmesser gDK bei einer erfindungsgemäßen Mehrebenenleiterplatte mit Klebefolie KF eingespart werden kann. Entsprechend steht dann mehr Verdrahtungsplatz zur Verfügung. Drei kleine Durchkontaktierungen kDK sind dargestellt, die auf Höhe des jeweiligen Halbzeuges HZ1, HZ2, bzw. HZ3 übereinander angeordnet sind. Die elektrische Verbindung zwischen den einzelnen Halbzeugen wird nicht, wie es in der herkömmlichen Anordnung von Fig. 1 der Fall ist, durch eine große Durchkontaktierung gDK hergestellt, sondern durch leitende Einlagen der Klebefolien KF. FIG. 2 shows that the through-hole with a large diameter gDK can be saved in the case of a multilevel printed circuit board according to the invention with adhesive film KF. Accordingly, more wiring space is available. Three small plated-through holes kDK are shown, which are arranged one above the other at the level of the respective semi-finished product HZ1, HZ2 or HZ3. The electrical connection between the individual semi-finished products is not made, as is the case in the conventional arrangement of FIG. 1, by a large plated-through hole gDK, but by conductive inserts of the adhesive films KF.

In Fig. 3 ist die Mehrebenenleiterplatte aus Fig. 2 und ein vergrößerter Ausschnitt der Klebefolie KF dargestellt. Die Klebefolie KF weist vertikale, z. B. stabförmige, leitfähige Einlagerungen EL (im vergrößerten Ausschnitt quer schraffiert) auf, die sich beidseitig bis an den Rand der Folie erstrecken. Die Klebefolie erhält ihre Eigenschaft, äußere Kontakte vertikal zur Klebefolie KF mit Hilfe der Einlagerungen EL leitend verbinden zu können, eventuell erst bei der Verarbeitung, z. B. beim Verpressen im Rahmen der Herstellung der Mehrebenenleiterplatte. Die Einlagerungen EL bewirken, dass vertikal zur Klebefolie KF, d. h. senkrecht zu den Halbzeugen HZ1, HZ2, HZ3 ein elektrischer Kontakt zwischen den übereinander angeordneten Durchkontaktierungen mit kleinem Durchmesser kDK entsteht. Die Halbzeuge HZ1, HZ2, HZ3 bzw. deren Durchkontaktierungen kDK sind so elektrisch verbunden. Durch die Anisotropie der Klebefolie KF wird erreicht, dass in der Klebefolie KF senkrecht zu den Einlagerungen EL kein Strom fließt. In der Folie können die Einlagerungen EL auch auf Bereiche beschränkt werden, bei dem Durchkontaktierungen gDK verschiedener Halbzeuge HZ miteinander verbunden werden sollen. FIG. 3 shows the multilevel printed circuit board from FIG. 2 and an enlarged section of the adhesive film KF. The adhesive film KF has vertical, for. B. rod-shaped, conductive inclusions EL (cross-hatched in the enlarged section), which extend on both sides to the edge of the film. The adhesive film acquires its property of being able to conductively connect external contacts vertically to the adhesive film KF with the help of the inclusions EL, possibly only during processing, e.g. B. during pressing as part of the manufacture of the multi-level circuit board. The inclusions EL have the effect that an vertical contact to the adhesive film KF, ie perpendicular to the semi-finished products HZ1, HZ2, HZ3, is made between the through-contacts with a small diameter kDK arranged one above the other. The semi-finished products HZ1, HZ2, HZ3 and their plated-through holes kDK are thus electrically connected. The anisotropy of the adhesive film KF ensures that no current flows in the adhesive film KF perpendicular to the inclusions EL. The inclusions EL in the film can also be limited to areas in which plated-through holes gDK of different semi-finished products HZ are to be connected to one another.

Claims (4)

1. Mehrebenenleiterplatte mit vergrößerter freier Verdrahtungsfläche, dadurch gekennzeichnet,
dass wenigstens zwei Ebenen der Mehrebenenleiterplatte mit Hilfe einer Klebefolie verbunden sind, wobei
die Klebefolie im wesentlichen vertikal zur Klebefolie ausgerichtete Einlagerungen aus einem leitfähigen Material aufweist,
die Einlagerungen beidseitig bis an den Rand der Folie reichen, und
mit Hilfe der Einlagerungen zwischen beiden Ebenen vertikal zur Klebefolie elektrische Kontakte herstellbar sind. 1. multilevel printed circuit board with enlarged free wiring area, characterized in that
that at least two levels of the multilevel circuit board are connected with the aid of an adhesive film, wherein
the adhesive film has inserts made of a conductive material that are oriented essentially vertically to the adhesive film,
the inclusions extend on both sides to the edge of the film, and
electrical contacts can be produced vertically to the adhesive film using the intercalations between the two levels. 2. Mehrebenenleiterplatte nach Anspruch 1, dadurch gekennzeichnet, dass die Einlagerungen gleichmäßig über die gesamte Klebefolie verteilt sind. 2. multilevel printed circuit board according to claim 1, characterized, that the deposits are even across the entire Adhesive film are distributed. 3. Mehrebenenleiterplatte nach Anspruch 1, dadurch gekennzeichnet,
dass in der Ebene der Folie der Bereich, wo Einlagerungen vorgesehen sind, beschränkt ist, und
dass durch die Beschränkung der Einlagerung eine anwendungsspezifische Strukturierung gegeben ist. 3. Multi-level circuit board according to claim 1, characterized in that
that in the plane of the film the area where deposits are intended is limited, and
that application-specific structuring is given by the limitation of storage. 4. Mehrebenenleiterplatte nach Anspruch 1, dadurch gekennzeichnet, dass wenigstens zwei Durchkontaktierungen von verschiedenen Ebenen, die durch die Klebefolie verbunden sind, so übereinander angeordnet sind, dass die beiden Durchkontaktierungen über die Klebefolie elektrisch verbunden sind. 4. multilevel printed circuit board according to claim 1, characterized, that at least two vias of different Layers that are connected by the adhesive film, so are arranged one above the other that the two plated-through holes are electrically connected via the adhesive film.
DE2001147054 2001-09-25 2001-09-25 Multiplane circuit board has planes connected via adhesive film with perpendicular inclusions made of conductive material Withdrawn DE10147054A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE2001147054 DE10147054A1 (en) 2001-09-25 2001-09-25 Multiplane circuit board has planes connected via adhesive film with perpendicular inclusions made of conductive material

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2001147054 DE10147054A1 (en) 2001-09-25 2001-09-25 Multiplane circuit board has planes connected via adhesive film with perpendicular inclusions made of conductive material

Publications (1)

Publication Number Publication Date
DE10147054A1 true DE10147054A1 (en) 2003-04-24

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DE2001147054 Withdrawn DE10147054A1 (en) 2001-09-25 2001-09-25 Multiplane circuit board has planes connected via adhesive film with perpendicular inclusions made of conductive material

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0245179A2 (en) * 1986-05-07 1987-11-11 Digital Equipment Corporation System for detachably mounting semiconductors on conductor substrate.
US5576519A (en) * 1994-01-04 1996-11-19 Dell U.S.A., L.P. Anisotropic interconnect methodology for cost effective manufacture of high density printed wiring boards
EP0526133B1 (en) * 1991-07-26 1997-03-19 Nec Corporation Polyimide multilayer wiring substrate and method for manufacturing the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0245179A2 (en) * 1986-05-07 1987-11-11 Digital Equipment Corporation System for detachably mounting semiconductors on conductor substrate.
EP0526133B1 (en) * 1991-07-26 1997-03-19 Nec Corporation Polyimide multilayer wiring substrate and method for manufacturing the same
US5576519A (en) * 1994-01-04 1996-11-19 Dell U.S.A., L.P. Anisotropic interconnect methodology for cost effective manufacture of high density printed wiring boards

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