DE10243862A1 - Decoding method for codeword of three bit-error correcting binary Bose-Chauduri-Hocquenghem code, by recurrently feeding codeword to decoder if one bit is inverted and comparing results and syndrome polynomial with stored values - Google Patents

Abstract

Three syndrome polynomials are derived from the codeword, and used to generated a correction bit sequence which is added to a buffered codeword to form a decoded codeword. A decoder using the first two syndrome polynomials is used to correct two bit errors. The codeword is recurrently fed to this decoder, provided that one bit of the codeword is inverted. The result of the respective decoding and the third syndrome polynomial are compared with stored values and a correction bit-sequence is generated accordingly, which is added to the buffered codeword to form a correctly decoded codeword. An Independent claim is included for an apparatus for decoding a codeword of a three bit error corrected binary BCH code.

Description

Method and arrangement for decoding a code word, a three bit error correcting binary Bose-Chauduri-Hocquenghem code The invention relates to a method according to the preambles of claims 1 and 2, and an arrangement according to the preamble of claim 3.

To reduce bit errors in the transfer Different coding methods are used for data bit sequences.

A group of coding methods are bit error correcting coding methods. Use this bit error correcting codes. A code is a collection of valid code words. On Codeword consists of data and check bits. Prüfbzw. Control bits are transmitted by means of the coding method from the data or information bits determined. Dependent on the number of test or control bits with the bit error correcting coding method a certain maximum number of bit errors can be corrected.

A code word is received fed to a decoder, which delivers a corrected code word or corrected data bits. Is the number of bit errors on the receive side of a code word higher than the correction skills or correction options of the code, an alarm is given.

Bose-Chauduri-Hocquenghem codes, BCH codes for short, are common used class of bit error correcting codes.

Because of their cyclical structure simple decoding is possible. On the other hand increased complexity of a BCH decoder with the length and error correction option of the BCH code. Especially for High speed applications, this is a limiting factor the powerful BCH codes.

BCH codes containing up to two bit errors can correct are also for fast applications possible.

BCH codes that have at least three bit errors can correct have a high level of complexity and need a lot of computing time. You are for fast applications currently not practical.

Object of the present invention is the decoding possibilities for Bose-Chauduri-Hocquenghem Improve codes that can correct three errors.

This task is due to the characteristics the method according to the claims 1 and 2, and by the features of the arrangement according to claim 3 solved.

The advantage of the invention is in that BCH codes that can correct three bit errors quickly and with low decoder complexity can be decoded. This allows these codes for example for high bit rate transmission systems be used.

An embodiment of the invention is shown in the drawing and is described in more detail below.

It shows:

1 an embodiment of an arrangement according to the invention for using the method according to the invention

1 shows an embodiment of an arrangement according to the invention for using the method according to the invention. The arrangement shows an input E to which a code word to be decoded is fed and which is connected to the first contact K11 of a first switch S1 and to the first contact K21 of a second switch S2. The second contact K12 of the first switch S1 is connected to the output of a device, not shown, which outputs a bit sequence with the value 0. The first switch S1 is connected to the contact K11 in a first switching state and to the contact K12 in the second switching state. The input of a shift register SR of length n, which corresponds to the length of a code word, is in the first switching state via the contact K11 to the input E connected. In the second switching state, the input of the shift register SR is connected via the contact K12 to the device (not shown), which outputs a bit sequence with the value 0.

The second switch S2 is in the first Switching state connected to contact K21 and in the second switching state with a contact K22. The entrances of three functional units F1, F2, F3 are on the second switch S2 in the first switching state the contact K21 connected to the input E.

The three functional units F1, F2, Determine F3 from the supplied binary sequences or the code word, a syndrome polynomial, which after buffering at their respective exits is delivered.

The output of the first and second functional units F1, F2 is on the one hand with one input each a table unit TE and the other connected to an alarm detection unit AE. Various function values are stored in the table unit TE and can be called up optionally. The alarm detection unit AE emits an alarm signal at its output, in the case of a non-decodable code word.

The output of the third functional unit F3 is also with the alarm detection unit AE and with a first input of a comparison unit VE connected.

A first exit of the table unit TE is connected to a second input of the comparison unit VE. The output signals of the table unit TE and the third functional unit F3 are compared with each other in the comparison unit VE in the event of a match emits a signal at its output. The output of the comparison unit VE is connected to a first input of an AND gate, the second input connected to the second output of the table unit TE is.

The output of the AND gate is on the one hand connected to the first input of an addition unit ADD and on the other hand with the second contact K22 of the second switch S2.

The output of the shift register SR is connected to the second input of the adder ADD, the Output A outputs a decoded or corrected code word.

The function is explained below. To Initially, the switches S1, S2 are in the first switching state. All units, Registers and memory are reset or in the original state.

The received code word is serial over the Input E, the contact K11 of the first switch S1 in the shift register SR and over the contact K21 of the second switch S2 in the three functional units F1, F2, F3 read. While reading or after reading into the functional units a syndrome polynomial is determined from the code word in each functional unit. This is done, for example, with a feedback shift register. A syndrome becomes a polynomial in the first functional unit F1 Sl (x) determines a syndrome in the second functional unit F2 Polynomial S3 (x) and in the third functional unit F3 a syndrome Polynomial S5 (x) determined.

After the three syndrome polynomials were determined, the switches are in the second switching state switched.

Depending on the two syndrome fed Polynomials Sl (x) and S3 (x) determine the table unit TE function values f. These are delivered to the first output of the table unit TE, at the same time the second output of the table unit TE has the binary value One. No function value f can be determined from the syndrome polynomials , the binary value becomes zero at the second output of the table unit TE issued.

For the case that the second output of the table unit TE has the binary value has one and the function value f is equal to the third syndrome polynomial S5 (x) of the third functional unit F3, bits of the shift register SR by gradually releasing it to the adder ADD this inverted. Moreover this correction of the code word given is transferred to the functional units via the Contact K22 of switch S2 supplied. These then calculate new ones Polynomial syndrome. The process is completed after n steps and the complete Code word output. At this point, the syndrome should be polynomial If this is not zero, an alarm is generated by the alarm detection unit AE delivered.

The function of the table unit TE can also use a two bit error correcting BCH decoder will be realized.

This decoder becomes the two syndrome Polynomials S1 (x) and S3 (x) supplied. Can the decoder not evaluate the syndrome polynomials, i.e. the Do not decode or correct the code word, an alarm is issued, analogous to the second output of the table unit. The decoder wants the last bit in the shift register on the output side will be inverted also issued an alarm, i.e. the second output of the decoder, analog the table unit, on the binary Value set to zero.

Otherwise the decoder gives a correction polynomial Q (x) from which a correction of the bit position indicates.

Then only this correction polynomial has to be done transformed and compared with the syndrome polynomial S5 (x). in the In case of equality, the last bit position is inverted and the process is repeated analogously to that described above.

The function is described below of equations closer explained.

A BCH code word has the length n = 2 ^m -1. This code word is usually represented as polynomial C (X). For a code word of a code correcting three errors, one writes C ₃ (x).

On the receiving side, this code word C ₃ (x) can be represented as the product of a polynomial m (x) with a so-called generator polynomial g3 (x) or as a multiple of the generator polynomial g3 (x): (1) C 3 (X) = g 3 (X) m (x)

For a code correcting three errors, g ₃ (x) is the product of three minimal polynomials M _i (x), where M _i (x) is the binary polynomial of the lowest degree, under whose roots the power α ^{1 of} a primitive Ele is contained in the Galois field GF (2 ^m ) for the case i = 1,3,5.

(2) g 3  (x) = M 1 (X) M 3 ( X ) M s (X)

The received code word is marked by a polynomial r (x) is represented and is disturbed by reception errors e (x).

(3) r (x) = C 3 (x) + e (x) .

Using the minimal polynomials results in: (4) r (x) = M 1 (X) M 3 (X) M 5 (x) m (x) + e (x) .

Syndrome polynomials are defined by: (5) p i (X) = r (x) mod M i (X) for i = 1,3,5. Mod stands for a modulo operation, i.e. the rest of a division.

If all syndrome polynomials S _i (x) = 0, the code word received contains no errors, otherwise the residues, that is to say the syndromes, contain information about the number and location of bit errors.

The decoder according to the invention checks whether the last bit position, i.e. position n-1 must be inverted.

This is determined for each bit, that is n times. The received polynomial r (x) becomes one bit position shifted from the shift register SR. After a correction each syndrome Si (x) recalculated.

To check the properties of a two bit error correcting decoder D2 is used.

A code word C ₂ (x) of a code C ₂ correcting two bit errors is a multiple of a generator polynomial g ₂ (x), which is the product of two minimal polynomials M _i (x).

(6) g 2 (x) = M 1 = (X) M 3 (X)

The two error correcting code C ₂ contains the three error correcting code C ₃ , ie all possible code words C ₃ (x) are a subset of the code words C ₂ (x). This does not mean that a two bit error correcting decoder can correct three bit errors.

First, the code word received decoded with a two bit error correcting decoder D2. This can give a correction polynomial q (x) or an alarm, in the case of a non-decodable code word.

In the event of successful decoding: (7) r (x) + q (x) + q (x) ∈C 2

The decoder according to the invention now works following principle: With every step the bit position n-1 is inverted, if the following conditions are met:

• 1. The decoder D2 can decode a modified code word that is inverted in the last bit position, that is, at position n-1. Ie he can: (8) r (x) + x n-1 decode.
• 2. Decoder D2 does not invert bit position n-1, i.e. it does not contradict the test modification of the code word.
• 3. The resulting code word (9) r (x) + x n-1 + q (x) belongs to C ₃ .

The third criterion can be reformulated as: (10) (r (x) + x n-1 + G (x)) mod M 5 (X) = 0 .

What with the definition of S _i (x) to: (11) (x n-1 )) + Q (x) mod M 5 (X) = S 5 (X) , can be reformulated.

für i=1, 3 und bezeichnen mitFor simplification or shortening one writes

for i = 1, 3 and denote by

the result of decoder D2 if the modified code word is fed to it. The result can be the correction polynomial q (x) or an alarm F.

Damit definieren wir die folgende Funktion:

Dies ist das Ergebnis welches mittels des zwei Bitfehler korrigierenden Decoders gewonnen wird oder in der Tabelleneinheit TE hinterlegt ist.The case in which the decoder D2 wishes to invert the last bit, that is to say the position n-1, is referred to as

We use it to define the following function:

This is the result which is obtained by means of the two bit error correcting decoder or which is stored in the table unit TE.

This results in the following procedure:

• 1. Read the received code word r (x) and calculate the syndrome polynomials S ₁ (x), S ₃ (x), and S ₅ (x).
• 2. Repeat n times: a) If f (S ₁ (x), S ₃ (x)) = S ₅ (x), invert the coefficient x ^{n – 1} in r (x) and modify the syndrome polynomials S _i (x) (i = 1,3,5) accordingly. b) Shift r (x) by one bit position. c) Shift S _i (x) (i = 1,3,5) cyclically by one bit position, corresponding to the polynomial M _i (x).
• 3. If S _i (x) = 0 (i = 1,3,5), there is no alarm, otherwise there is an alarm.

Claims (3)

Method for decoding a code word, a binary Bose-Chauduri-Hocquenghem code correcting three bit errors, whereby three syndrome polynomials are determined from the code word, from which a correction bit sequence is generated which is added to the buffered code word to form a decoded code word, characterized in that a decoder which uses the first two syndrome polynomials and is configured to correct two bit errors is used, that the code word is fed to this decoder repeatedly, with the proviso that one bit of the code word is inverted in each case, that the result of the respective decoding and the third syndrome polynomial is compared with stored values and, depending on the comparison result, a correction bit sequence is generated which is used to form a correctly decoded code word for the temporarily stored code word is added. Method for decoding a code word, one three bit-correcting binary Bose-Chauduri-Hocquenghem Codes, where polynomials are determined from the code word syndrome, from which a correction bit sequence is generated, which is used for the formation a decoded code word to the temporarily stored code word is added, characterized in that that the output side Bit of the buffered code word is inverted for test purposes, that from the so changed Codeword three syndrome polynomials are determined for each Bit: - out the first two syndromes a correction polynomial or an alarm is determined - in the In the event of an alarm, the output bit in the original State is given as part of the decoded code word, - in the case, that the correction polynomial wants to invert the test bit, this in the original State is given as part of the decoded code word, - otherwise the correction polynomial is compared with the third syndrome and in the event of a match the bit on the output side is inverted and as part of the decoded code word and in the case of bit correction, the syndrome polynomials be redetermined and that after these steps, the determined Syndrome polynomials to be checked and if necessary an alarm is given. Arrangement for decoding a code word, one three bit-correcting binary Bose-Chauduri-Hocquenghem Codes, using a shift register for temporary storage of the code word, three. Functional units for determining one each Syndrome polynomial and an adder to add one out correction value derived from the syndrome polynomials to the temporarily stored Code word, characterized, that the code word to the shift register and fed to the three functional units, that ever a first Output of the first and second functional unit with one input each is connected to a table unit, the first output of which is connected to a first input of a comparison unit is connected, the second Input connected to a first output of the third functional unit is that a second output of the table unit and an output the comparison unit is connected to an AND gate, the output of which on the one hand connected to a first input of an adder is the second input with an output of the shift register is connected and the output of which outputs a decoded code word that the output of the AND gate on the other hand to the respective inputs of the three functional units is returned and that each with a second output of the three functional units an alarm detection unit is connected.