DE10347622A1 - Substrate for making solder connection to second substrate or chip has solder pad with solderable adhesive surfaces in addition to electrical contact surface - Google Patents
Substrate for making solder connection to second substrate or chip has solder pad with solderable adhesive surfaces in addition to electrical contact surface Download PDFInfo
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- DE10347622A1 DE10347622A1 DE10347622A DE10347622A DE10347622A1 DE 10347622 A1 DE10347622 A1 DE 10347622A1 DE 10347622 A DE10347622 A DE 10347622A DE 10347622 A DE10347622 A DE 10347622A DE 10347622 A1 DE10347622 A1 DE 10347622A1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/1605—Shape
- H01L2224/1607—Shape of bonding interfaces, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81385—Shape, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/098—Special shape of the cross-section of conductors, e.g. very thick plated conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/0989—Coating free areas, e.g. areas other than pads or lands free of solder resist
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
Description
Die Erfindung betrifft ein Substrat zur Herstellung einer Lötverbindung mit einem zweiten Substrat oder einem Chip, wobei das Substrat ein auf der Substratoberfläche angeordnetes Lötpad mit einer Oberseite, einer der Oberseite gegenüberliegenden Unterseite, an der das Lötpad mit dem Substrat verbunden ist, und zwischen der Oberseitenfläche und der Unterseite liegende Begrenzungsflächen aufweist, wobei dieThe The invention relates to a substrate for producing a solder joint with a second substrate or a chip, the substrate a on the substrate surface arranged solder pad with a top, an underside opposite the top, on the solder pad is connected to the substrate, and between the top surface and the Has underside boundary surfaces, wherein the
Oberseite als elektrische Kontaktfläche ausgebildet ist, welche mit einer Lötkugel des zweiten Substrats oder des Chips verlötbar ist.top as electrical contact surface is formed, which with a solder ball of the second substrate or solderable to the chip is.
Die elektrische Verbindung mittels Lötkugeln zwischen einem Substrat und einem Chip oder, beispielsweise bei der Integration eines substratbasierten Packages in ein PCB (Printed Circiut Board), zwischen dem Substrat des Moduls und einem zweiten Substrat, welches als Trägersubstrat für das substratbasierte Package dient, ist besonderem mechanischen Stresseintrag ausgesetzt. In beiden Fällen sind über die Lötverbindung entweder direkt oder über das zweite Substrat indirekt Materialien mit deutlich unterschiedlichem Ausdehnungsverhalten verbunden, einerseits das Silizium des Chips und andererseits beispielsweise das Kunstharz des Substrats. Daraus resultieren insbesondere bei betriebs- und prozessgenerierter Temperaturbelastung Normal- und Scherspannung, welche auf die Lötverbindung einwirken und zum Abreißen der einzelnen Verbindung bis zum Totalausfall des Packages führen können.The electrical connection by means of solder balls between a substrate and a chip or, for example, during integration a substrate-based package in a PCB (Printed Circuit Board), between the substrate of the module and a second substrate, which as a carrier substrate for the substrate-based package serves is special mechanical stress entry exposed. In both cases are about the solder either directly or via the second substrate indirectly materials with significantly different Expansibility associated, on the one hand, the silicon of the chip and on the other hand, for example, the resin of the substrate. from that result in particular during operation and process-generated temperature load Normal and shear stress, which act on the solder joint and the Tear off the individual connection can lead to the total failure of the package.
Dieses Problem wird bei matrixartig im Raster angeordneten Lötverbindungen, wie sie bei Ball-Grid-Arrays (BGA) vorhanden sind, durch die flächige Ausdehnung der Verbindung der verschiedenen Materialien besonders verstärkt. In derartigen Anordnungen kann es bereits während des Lötprozesses zur Verwölbung der Substrate und Bauteile klommen, was zu latenten Spannungszuständen innerhalb der Verbindung und zu einer weiteren Verschlechterung der Zuverlässigkeit der Lötverbindung führt.This Problem becomes with matrix-like arranged in the grid solder joints, as in the case of ball grid arrays (BGA), due to the areal extent especially strengthened the connection of the different materials. In Such arrangements may already during the soldering process for warping the Substrates and components are increasing, leading to latent stress states within the connection and to a further deterioration of reliability the solder joint leads.
Der Abriss der Lötverbindung erfolgt vornehmlich modulseitig zwischen dem Lötpad des Substrats des Moduls auf welches während der Herstellung der Lötverbindung eine Lötkugel aufgebracht wird (Landing-Pad) und der Lötkugel selbst.Of the Demolition of the solder joint takes place primarily on the module side between the solder pad of the substrate of the module on which during the production of the solder joint a solder ball is applied (landing pad) and the solder ball itself.
Eine Möglichkeit, die Lötverbindung stressresistenter zu gestalten, ist der Einsatz größerer Lotmengen durch Vergrößerung der Lotkugeln, was jedoch die Gefahr birgt, dass durch vermehrten Lotausfluss während des Lötprozesses Kurzschlussbrücken gebildet oder die erforderlichen elektrischen Abstände nicht eingehalten werden und es zu elektrischen Überschlägen sowie zur Verbindungen zwischen benachbarter Lotkugeln oder zwischen Lotkugeln und benachbartem Leiter kommen kann. Dieser Effekt tritt besonders bei räumlich anspruchsvoller oder asymmetrischer Anordnung von rasterartigen Lötverbindungen auf.A Possibility, the solder joint more stress-resistant, is the use of larger amounts of solder by enlargement of the Lotkugeln, however, which carries the danger that by increased Lotausfluss while of the soldering process Shorting bridges formed or the required electrical distances are not met and it about electric flashovers as well for connections between adjacent solder balls or between solder balls and adjacent conductor. This effect occurs especially at spatial sophisticated or asymmetrical arrangement of grid-like solder connections on.
In einigen Anwendungsfällen wird den modulseitigen Zuverlässigkeitsproblemen dadurch begegnet, dass die Anordnung der elektrischen Kontakte zwischen Substrat und dem Substrat des Moduls entsprechend der bei definierter Temperatur- oder mechanischer Belastung festgestellten Verteilung der ausgefallenen Kontakte angepasst wurde. Dies ist jedoch insbesondere infolge der immer kleiner werden Kontaktabstände (Pitches) nicht in dem erforderlichen Maße möglich und ebenso nicht auf chipseitige Lötverbindungen anwendbar.In some applications gets the module-side reliability problems characterized in that the arrangement of the electrical contacts between Substrate and the substrate of the module according to the defined Temperature or mechanical load determined distribution of failed contacts was adjusted. This, however, is particular due to the ever smaller pitches (pitches) are not in the required dimensions possible and also not applicable to on-chip solder joints.
Eine begrenzte Verringerung der auf die Lötverbindungen einwirkenden Stressmomente wurde durch Modifizierungen der Materialkombinationen bewirkt. Dies ist jedoch nur in den Grenzen möglich, welche die immer noch vorhandenen Materialpaarungen mit den entsprechend unterschiedlichen thermischen Ausdehnungskoeffizienten zulassen.A limited reduction of the solder joints acting Stress moments were caused by modifications of the material combinations. However, this is only possible within the limits that still exist existing material pairings with the correspondingly different allow thermal expansion coefficients.
Der Erfindung liegt somit die Aufgabe zugrunde, ein Substrat anzugeben, womit die Zuverlässigkeit von Lötverbindungen insbesondere von Ball-Grid-Arrays erhöht werden kann, indem die Haftung zwischen Lötpad und Lötkugel verbessert wird.Of the Invention is therefore based on the object of specifying a substrate what the reliability of solder joints In particular, by ball grid arrays can be increased by the adhesion between solder pad and solder ball is improved.
Erfindungsgemäß wird die Aufgabe dadurch gelöst, dass das Lötpad zusätzlich zu der elektrischen Kontaktfläche lötfähige Haftflächen aufweist. Diese Haftflächen dienen der zusätzlichen mechanischen Verbindung zwischen dem Lot und dem Lötpad innerhalb jeder einzelnen Lötverbindung, wodurch den meist auf jede Lötverbindung unterschiedlich einwirkenden mechanischen Spannungen unmittelbar entgegengewirkt wird.According to the invention Task solved by that the solder pad additionally to the electrical contact surface having solderable adhesive surfaces. These surfaces serve the additional mechanical connection between the solder and the solder pad inside every single solder joint, which usually affects every solder joint different acting mechanical stresses immediately counteracted.
Indem die Haftfläche darüber hinaus lötfähig ist, wird im Verlaufe des Lötprozesses eine widerstandsfähigere, strukturelle Verbindung zwischen dem Lot, welches auch die elektrische Verbindung bewirkt, und dem Lötpad hergestellt.By doing the adhesive surface about that is solderable, becomes during the soldering process a more resilient, structural connection between the solder, which is also the electrical Connection causes, and the solder pad produced.
Die erfindungsgemäße Verbesserung der mechanischen Verbindung zwischen Lot und Lötpad durch zusätzliche Haftflächen, welche zudem nicht lediglich auf Haftung sondern auf einer festen Lötverbindung beruht, hat zum einen den Vorteil, dass sie unabhängig von weiteren Maßnahmen erfolgen kann, die zum Spannungsabbau den gesamten Chip oder das gesamte Package umfassend ergriffen werden, wie beispielsweise Kanten- und Rückseitenschutz durch Vergussmassen unterschiedlicher Eigenschaften oder Materialoptimierung der zu verbindenden Bestandteile.The improvement according to the invention of the mechanical connection between the solder and solder pad by additional adhesive surfaces, which moreover is not based merely on adhesion but on a solid solder joint, has the advantage that it takes place independently of further measures can be taken to reduce the stress throughout the entire chip or the entire package, such as edge and back protection by potting compounds of different properties or material optimization of the components to be joined.
Des Weiteren besteht ein anderer Vorteil darin, dass mit der Integration der beschriebenen zusätzlichen mechanischen Verbindung in die Lötverbindung keine wesentlich neuen Anforderungen an den Verbindungsaufbau und den Prozess des Lötens gestellt werden.Of Furthermore, another advantage is that with integration the additional described mechanical connection in the solder joint no major new requirements for connection establishment and put the process of soldering become.
In weiterer besonders vorteilhafter Ausgestaltung der Erfindung wird die mechanische Verbindung noch verstärkt, indem sich Lot und Lötpad im verlöteten Zustand gewissermaßen verhaken. Dafür wird zum einen das Lötpad so ausgestaltet, dass es zwischen seiner Oberseite und Unterseite sowie parallel zur Oberseite eine Querschnittsfläche aufweist, die kleiner ist als die Fläche der Oberseite.In Another particularly advantageous embodiment of the invention is the mechanical connection is further enhanced by solder and solder pad in the soldered state so to speak snag. For that will be on the one hand the solder pad designed so that it is between its top and bottom and parallel to the top has a cross-sectional area that is smaller as the area the top.
Wird eine derartige Querschnittsfläche beispielsweise durch Verringerung des Umfangs der Oberseite erzeugt, entsteht eine Einschnürung des Lötpads in seiner vertikalen Ausdehnung. Das führt dazu, dass während des Lötvorganges das verflüssigte Lot teilweise unter die Oberseite des Pad fließt und im gehärteten Zustand untergreift. Außerdem führt eine derartige Einschnürung zu einer Vergrößerung der Haftfläche an sich und somit zu einer weiteren Verbesserung der mechanischen Verbindung.Becomes such a cross-sectional area produced for example by reducing the circumference of the top, a constriction arises of the soldering pad in its vertical extension. This causes that during the soldering process the liquefied Lot partly flows under the top of the pad and in the hardened state engages below. In addition, one leads such constriction to an enlargement of the adhesive surface in itself and thus to a further improvement of the mechanical Connection.
Auch die Ausführung des Lötpads in der Weise, dass die Fläche der Unterseite kleiner ist als die Fläche der Oberseite, führt zu der beschriebenen Vergrößerung der Haftfläche und dem Verhaken von ausgehärtetem Lot und Lötpad. Da in dieser Ausführung das Lötpad beispielsweise bei kreisförmiger Ausführung die Form eines umgedrehten Kegelstumpfes aufweist, ist eine beträchtlichere Verringerung der Fläche der Unterseite gegenüber der Fläche der Oberseite möglich, als es bei einer Einschnürung der Fall ist.Also execution of the soldering pad in the way that the area the bottom is smaller than the surface of the top, leading to the described enlargement of the adhesive surface and the catching of hardened Solder and solder pad. Because in this version the solder pad for example, in circular design the Form of an inverted truncated cone is a considerable Reduction of area opposite the underside the area of Top possible, as it is at a constriction of Case is.
Derartige Einschürungen oder in sonstiger Weise ausgeführte Unterschneidungen in der vertikalen Ausdehnung sind mit den bekannten und erprobten Verfahren zur Herstellung des Lötpads, insbesondere durch gezieltes Unterätzen mit entsprechend gestalteten Masken nach der Strukturierung der Substratmetallisierung oder durch zumindest einen weiteren Metallisierungsschritt, welcher zu einem weiteren Höhenwachstum und somit weiteren Vergrößerung der Haftflächen führt, realisierbar. Welche Ausführung zu Anwendung kommt, hängt vor allem von den Höhen ab, die im speziellen Schaltungsaufbau möglich sind.such Einschürungen or executed in any other way Undercuts in the vertical extent are with the known and proven methods for producing the solder pad, in particular by targeted undercutting with appropriately designed masks after the structuring of the Substrate metallization or by at least one further metallization step, which leads to further height growth and thus further enlargement of the surfaces leads, realizable. Which execution depends on application depends especially from the heights which are possible in the special circuit structure.
Es ist entsprechend weiteren erfindungsgemäßen Ausgestaltungen auch möglich, dass die Haftflächen als strukturierte, seitliche Begrenzungsflächen des Lötpads ausgebildet sind. In diesem Fall sind die Haftflächen insbesondere entsprechend bestimmter, im jeweiligen Anwendungsfall speziell auftretender Wirkungsrichtungen der auf die Lötverbindung einwirkenden mechanischen Spannungen und nicht an die Form der Ober- oder Unterseite des Lötpads gebunden ausgeführt. Derartig gestaltete Haftflächen lassen insbesondere auch die Kombination mit weiteren Maßnahmen zur Verbesserung der Zuverlässigkeit der Lötverbindung, wie beispielsweise ein gezieltes Lötstoppmaskendesign zu.It is according to further embodiments of the invention also possible that the adhesive surfaces are formed as structured, lateral boundary surfaces of the solder pad. In In this case, the adhesive surfaces in particular according to certain, in the particular application specifically occurring directions of action of the solder joint mechanical stresses and not to the shape of the upper or bottom of the solder pad bound executed. Such designed adhesive surfaces let in particular the combination with further measures to improve reliability the solder joint, such as a targeted solder mask design.
Solche Strukturierungen der seitlichen Begrenzungsflächen des Lötpads schließt neben oder anstelle der Strukturierung der Form der zur Oberseite parallelen Querschnittsfläche auch eine Strukturierung in der vertikalen Ausdehnung ein, wie sie wie beschrieben beispielsweise durch zumindest einen zweiten Metallisierungsschritt möglich ist.Such Structuring of the lateral boundary surfaces of the soldering pad closes next or instead of structuring the shape of the parallel to the top Cross sectional area also a structuring in the vertical extension, as they as described for example by at least one second metallization step possible is.
Wenn dabei die Strukturierung der Begrenzungsflächen des Lötpads als eine Unterschneidung des Lötpads ausgebildet ist, wie in einer anderen vorteilhaften Gestaltung des erfindungsgemäßen Substrats vorgesehen, können diese Vorteile mit den eingangs beschriebenen, durch Unterschneidungen erzielbaren kombiniert werden.If doing the structuring of the boundary surfaces of the solder pad as an undercut of the solder pads is formed, as in another advantageous embodiment of the inventive substrate provided, can These advantages with the above-described, by undercuts be combined achievable.
Deshalb sieht eine besonders vorteilhafte Ausgestaltung vor, dass die Strukturierung der Begrenzungsflächen eine im Wesentlichen pilzartige Form des Lötpad bilden. In diesem Fall wird ein besonders ausgeprägtes Verhaken des Lots mit dem Lötpad erzielt.Therefore provides a particularly advantageous embodiment that the structuring the boundary surfaces form a substantially mushroom-like shape of the solder pad. In this case becomes a particularly pronounced Hooking the solder with the solder pad achieved.
Wenn entsprechend einer weiteren erfindungsgemäßen Ausführung das Substrat eine Lötstoppmaske aufweist und die Lötstoppmaske derart strukturiert ist, dass zwischen den Haftflächen und den diese umgebenden Umfassungsflächen der Öffnung des Lötstopplacks ein Spalt vorhanden ist, ist der Lotfluss während des Lötvorganges so zu begrenzen, dass das Lot zum einen das Lötpad und damit die in einer der beschriebenen Weisen gestalteten Haftflächen vollständig umfließt und andererseits die erforderlichen elektrischen Abstände zu benachbarten Leitungsbahnen oder Lötpads realisierbar sind.If According to a further embodiment of the invention, the substrate a solder mask and the solder mask is structured such that between the adhesive surfaces and the these surrounding perimeter areas the opening of solder resist there is a gap, the solder flow must be limited during the soldering process, that the solder on the one hand the solder pad and thus completely surrounds the adhesive surfaces designed in one of the manners described and, on the other hand, the required electrical distances can be realized to adjacent lines or solder pads.
Es ist selbstverständlich, dass dabei die Breite des Spaltes überall so bemessen sein muss, dass das Lot im verflüssigten Zustand hineinfließen kann. Bei entsprechend optimierter Breite des Spaltes ist das Hineinfließen des Lots und Umfließen der erfindungsgemäßen Haftflächen aufgrund einer Kapillarwirkung des Spaltes besonders sicher realisierbar.It is self-evident, that while the width of the gap must be sized everywhere, that the solder in the liquefied Flow state can. In accordance with optimized width of the gap is the inflow of the Lots and refills the adhesive surfaces of the invention due a capillary action of the gap particularly safe realized.
In einer Ausgestaltung der Erfindung sind die Haftflächen elektrisch leitfähig ausgebildet, so dass sie entweder insgesamt an der elektrischen Kontaktierung beteiligt sind oder über die Haftflächen gezielt spezielle Kontaktierungen zu weiteren Bauteilen ausgeführt werden.In In one embodiment of the invention, the adhesive surfaces are electrically conductive trained so that they either total of the electric Contacting are involved or specifically targeted over the adhesive surfaces Contacting to other components are performed.
Die Erfindung soll nachfolgend anhand eines Ausführungsbeispieles näher erläutert werden. Die zugehörige Zeichnung zeigt inThe Invention will be explained in more detail with reference to an embodiment. The associated Drawing shows in
Das
Substrat
Die
Oberfläche
des Substrats
Die
Lötverbindung
wird mittels einer Lötkugel
Im
vorliegenden Ausführungsbeispiel
besteht das gesamte Lötpad
Die
Herstellung des in
Die
Herstellung des Lötpads
- 11
- Substratsubstratum
- 22
- Chipchip
- 33
- Lötpadsolder pad
- 44
- vertikale Begrenzungsflächevertical boundary surface
- 55
- horizontale Begrenzungsflächehorizontal boundary surface
- 66
- Haftflächeadhesive surface
- 77
- Oberseitetop
- 88th
- elektrische Kontaktflächeelectrical contact area
- 99
- Unterschneidungkerning
- 1010
- Lötstoppmaskesolder mask
- 1111
- Umfassungsflächeenclosing surface
- 1212
- Spaltgap
- 1313
- Lötkugelsolder ball
- 1414
- Bond-PadBonding pad
- 1515
- Passivierungsschichtpassivation
- 1616
- Unterseitebottom
Claims (8)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10347622A DE10347622B4 (en) | 2003-10-09 | 2003-10-09 | Substrate with solder pad for making a solder joint |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10347622A DE10347622B4 (en) | 2003-10-09 | 2003-10-09 | Substrate with solder pad for making a solder joint |
Publications (2)
Publication Number | Publication Date |
---|---|
DE10347622A1 true DE10347622A1 (en) | 2005-05-25 |
DE10347622B4 DE10347622B4 (en) | 2006-09-07 |
Family
ID=34484754
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10347622A Expired - Fee Related DE10347622B4 (en) | 2003-10-09 | 2003-10-09 | Substrate with solder pad for making a solder joint |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE10347622B4 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010020033A1 (en) * | 2008-08-19 | 2010-02-25 | Ati Technologies Ulc | Integrated circuit package employing predetermined three-dimensional solder pad surface and method for making same |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5872051A (en) * | 1995-08-02 | 1999-02-16 | International Business Machines Corporation | Process for transferring material to semiconductor chip conductive pads using a transfer substrate |
US6201305B1 (en) * | 2000-06-09 | 2001-03-13 | Amkor Technology, Inc. | Making solder ball mounting pads on substrates |
US20020071935A1 (en) * | 2000-12-12 | 2002-06-13 | Chi-Chuan Wu | Passive element solder pad free of solder ball |
US6573610B1 (en) * | 2000-06-02 | 2003-06-03 | Siliconware Precision Industries Co., Ltd. | Substrate of semiconductor package for flip chip package |
-
2003
- 2003-10-09 DE DE10347622A patent/DE10347622B4/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5872051A (en) * | 1995-08-02 | 1999-02-16 | International Business Machines Corporation | Process for transferring material to semiconductor chip conductive pads using a transfer substrate |
US6573610B1 (en) * | 2000-06-02 | 2003-06-03 | Siliconware Precision Industries Co., Ltd. | Substrate of semiconductor package for flip chip package |
US6201305B1 (en) * | 2000-06-09 | 2001-03-13 | Amkor Technology, Inc. | Making solder ball mounting pads on substrates |
US20020071935A1 (en) * | 2000-12-12 | 2002-06-13 | Chi-Chuan Wu | Passive element solder pad free of solder ball |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010020033A1 (en) * | 2008-08-19 | 2010-02-25 | Ati Technologies Ulc | Integrated circuit package employing predetermined three-dimensional solder pad surface and method for making same |
US7888259B2 (en) | 2008-08-19 | 2011-02-15 | Ati Technologies Ulc | Integrated circuit package employing predetermined three-dimensional solder pad surface and method for making same |
TWI495063B (en) * | 2008-08-19 | 2015-08-01 | Ati Technologies Ulc | Integrated circuit package employing predetermined three-dimensional solder pad surface and method for making same |
Also Published As
Publication number | Publication date |
---|---|
DE10347622B4 (en) | 2006-09-07 |
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OP8 | Request for examination as to paragraph 44 patent law | ||
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |