DE1903342A1 - Semiconductor device - Google Patents

Description

Patent attorneys
Dipl.-Ing. R. Beetz et al.
Dipl.-Ing. Lamprecht

Munich 22, Stelnsdorhtr. 10

HITACHI, LTD., Tokyo (Japan)

Semiconductor device

The invention relates to a semiconductor device, and more particularly to improvements in a semiconductor device with a PN junction in a semiconductor body is generated and ends at the surface of the base body, the end zone of the PN junction with a Insulating film is covered, and a method of manufacturing such a semiconductor device.

Generally, in a semiconductor device, in the at least one PN junction in a semiconductor base body is generated and the end zone extends to the surface of the base body, the common practice that the end zone of the PN junction is covered with a silicon oxide film, which prevents the base body surface through the external atmosphere is affected. With such a semiconductor device, however, it is impossible to completely prevent their electrical properties from being affected by the external atmosphere. Further improvement

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Struggles were desired in order to meet the stringent requirements Reliability properties in current electronics Meet industry. In particular there is, too if the end zone of the PN junction is covered with an insulating film, such as B. is covered with a silicon oxide film, a possibility that moisture or contaminant ions such. B. Hydrogen ions, oxygen ions or sodium ions from the surrounding atmosphere adhere to or penetrate the surface of the insulating film, thereby reducing the electrical Properties of the body surface part or the end zone the PN transition are adversely affected. Cash out there is a considerable deterioration in the reliability properties of semiconductor devices, such as Ba of planar type bipolar transistors, field effect transistors of the insulated gate type or semiconductor integrated circuit devices, in which a plurality of circuit components in a single semiconductor base body be generated. The electrical properties are particularly important for field effect transistors of the insulating gate type the channel zones between the source and the drainage zone are considerably sensitive to the outside atmosphere because the thickness of the insulating films under the gate electrodes is very small.

Around the semiconductor base body with the insulating film is covered to hermetically seal against the open air, it has been proposed to make this base body in resin or to form a plastic material. In such resin or thermoplastic molded type semiconductor devices it is not yet possible to completely eliminate the influence of the outside atmosphere because of such a synthetic resin or such plastic in itself is not suitable for completely preventing the penetration of moisture.

The invention is therefore based on the object of overcoming these difficulties. Semiconductor devices should

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directions that have improved electrical properties, and methods for their preparation are given. The main aim is that the electrical properties are not adversely affected by the influence of the ambient atmosphere · The main concern here is improvement of field effect transistors of the insulating gate type » Planar type bipolar transistors, semiconductor integrated circuit devices and thermoplastic molding type semiconductor devices.

According to the invention, a semiconductor device with which this object is achieved is by a semiconductor base body with a main surface, a first semiconductor zone applied to the main surface of a first Conductivity type and a second semiconductor zone of a second lying under the first zone and surrounding it Conductivity type, with a PN junction between the two zones extending to the main surface,

a first insulating film covering the main surface of the base body and extending over the transition,

a metal contact adhering to the surface of the first zone,

a metal strip adhering to the first film, which with is electrically connected to the metal contact and extends from there on the film across the transition,

a second formed on the first film and at least the entire area of the first zone and its Surrounding insulating film,

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a metal layer adhered to the second film, the at least covers the entire surface of the first zone and its surroundings,

and an element for electrically connecting the metal layer to the base body.

Further features and advantages of the invention are based on the exemplary embodiments illustrated in the drawing explained in more detail; show in it

1 shows a plan view of a semiconductor device according to an exemplary embodiment of the invention

Figs. 2 and 3 are sectional views of the semiconductor device of FIG. 1 according to the section lines 2A-2A 'and 3B-3B ¹ j

FIGS. 4 a to h d show sectional views to illustrate the individual steps of a method for producing the semiconductor device according to FIG. 1J

5 is a plan view of a semiconductor device according to a second embodiment of the Invention j

6 and 7 are cross sections through the device according to FIG. 5 corresponding to the section lines 6C-6C and 7D-7D ¹ in FIG. 5;

Figure 8a to d β sectional views for explaining the steps in a method of manufacturing the semiconductor device of FIG. 5.

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ORtGINAL INSPECTED

Fig. 9 is a circuit diagram of a 1-bit circuit for a Shift register, which is used to explain a third embodiment of the invention in Application to a semiconductor integrated circuit device is useful;

Fig. 10 is a plan view of a semiconductor integrated circuit device according to the third embodiment of the invention;

11 shows a cross section according to the section line 11-E-11E < in Fig. 10;

12 and 15 are plan views of a semiconductor device for explaining a fourth embodiment of the invention;

13 and 14 are sectional views of the device according to FIG Fig. 12 according to the 3x sectional lines and i4g-14g »in Fig. 12;

Fig. 16 and 17 are sectional views of the device Fig. 15 according to the section lines 16ΙΙ-16Η * and 17J-17J 'in Fig. 155, respectively

18 and 21 are plan views of semiconductor devices for explaining a fifth embodiment egg invention;

19 and 20 are sections of the device according to Fig. 18 corresponding to the section lines and 20L-20L ¹ in Fig. 18;

FIGS. 22 and 23 are sectional views of the device according to FIG. 21 corresponding to the section lines 22M-22M * and 23N-23N ¹ in FIG. ₀ 21;

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BATH ORIGINAL

Pig. 24 and 25 a sectional view and FIG. a supervision a semiconductor device according to a sixth embodiment of the invention; and

Fig. 26 is a graph showing the results of measurement of

Breakdown voltage of a PN junction for explanation the stability of the electrical properties of the semiconductor device according to the present invention.

The invention will now be described in detail with reference to the drawing.

example 1

1 to 3 and 4 a to 4 d, the field effect transistor of the insulating gate type according to a first embodiment of the invention will first be explained. For a better understanding of the invention, the same parts are provided with the same reference numerals in these figures. The reference number 1 denotes a semiconductor base body, such as ζ »B. a monocrystalline silicon base body of the N conductivity type with a resistance of 1 Ω cm, the reference numbers 2 and 3 denote a source and drainage zone of the P conductivity type from about 2 to 4 / u thickness separated from each other at a distance of 5 to 12 / u. were generated in the main surface of the base body by the usual selective diffusion method, the reference numerals 4 and 5 denote first insulating films, which consist essentially of z. B. silicon oxide and cover the main surface of the base body, and the reference numerals 6 and 7 a source and a drainage metal electrode in connection with the source zone 2 and the drainage zone 3 via holes that were created in the first insulating film 4. The reference number 8 denotes a gate electrode,

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which is provided on the insulating film 5 in such a way that it bridges the body surface between the source and drainage zones. The mentioned source, drain and gate electrodes consist of contact pieces which are arranged in direct contact with the semiconductor surface, and a tape part which is electrically connected to the contact pieces and extends over the first insulating film. Numeral 9 denotes a second insulating film made of an inorganic material such as. B. silicon oxide, silicon nitride, aluminum oxide holes generated in the first and second insulating films, as shown in FIG. 2, is connected so that the metal layer 10 is kept at the same potential as the base body. It is essential that the second insulating film 9 and the metal layer 10 are provided on the first insulating film so as to cover the whole surface of the source and drainage zones, the channel between the zones and their surroundings, or the peripheral surface which these zones and surround the canal. As a result of various experiments, it has been found that it is desirable that the second insulating film 9 and the metal layer 10 are produced in such a way that they extend over an area approximately twice as large as the extent of a depletion st-chi chi, di <; occurs when a counter tension in the; vird applied to the PN junctions 12 and 13, which are defined between the Qixelle- and the drainage zone and the base body, this expansion in an example of the invention being about 2 to 3 λι, and that the film 9 and the layer 10 den Include area of depletion layer. In Fig. 2, V shows the distance over which the metal layer 10 extends from the end part of the PN junction.

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ges 12 extends over the base body surface. In the present example, W is 5 λχ or more, preferably 10 λχ or more. In other words, it is desirable that the periphery of the metal layer 10 and the second insulating film 9 extend at least 5 / u, preferably 10 / u or more from the periphery of the source and drainage zones and the channel.

Such a semiconductor device is manufactured in the following manner:

As FIG. 4 a shows, first a silicon oxide film 4, which is about 200 to 5000 Å thick, is produced on the main surface of an N-type silicon base body 1 with a resistance of 1 Cl cm. Subsequently, a pair of P-type zones 2 and 3 », each having a depth of about 2 to 4 / U, are created in the base body 1 by the usual selective diffusion technique, and then a source and a drain electrode 6 and 7, respectively provided ^m i contact with the zones 2 and 3 produced in the silicon oxide film 4 openings, which is arranged on the base body main surface. Furthermore, a gate electrode 8 is provided on the part of the silicon oxide film 5 which is located between the zones 2 and 3. In the present examples these electrodes were made of aluminum, but they can also be made of another metal, such as e.g. B. Ti, Mo, Cr, Pt, etc. can be produced. Thereafter, a second insulating film 9 is produced on the silicon oxide film 4 by chemical vapor phase reaction, vacuum evaporation, coating or deposition technique. In the exemplary embodiment, a silicon oxide film 9 with a thickness of approximately 0.3 to 1.0 λχ on the first silicon oxide film 4 by thermal decomposition of silane in one to approximately 300 to 400

C heated furnace produces like Pig. 4 b indicates.

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Subsequently, a hole 11, which extends to the semiconductor surface, is produced in the second film 9 and in the first film k with the aid of the usual photo-etching technique using an etchant, the main components of which are hydrofluoric acid and ammonium fluoride, and a metal layer 10 is formed by vapor deposition of a metal, such as B. Al, Au, Ag or the like. Applied to the entire surface, as Fig. 4c shows. Subsequently, as FIG. 4d shows, an unnecessary part of the metal layer and undesired parts of the second film 9 are removed by the usual photo-etching technique, so that desired parts of the metal electrodes 6, 7 and 8 are exposed. In the example, aluminum was evaporated to form the metal layer 10, and the unnecessary part of the aluminum layer was removed using an etchant, the main components of which are phosphoric acid, nitric acid and glacial acetic acid. This makes it possible to obtain the field effect transistor of the insulating gate type as an implementation of the invention according to FIGS. 1 to 3.

With reference to FIG. 2o, the advantages with regard to the electrical properties of the semiconductor device shown in FIGS. 1 to 3 compared to the conventional semiconductor devices are shown having no such metal layer 10 and no such metal layer thereon have provided insulating film 9.

Fig. 26 shows the test results obtained by Measurement of changes in the breakdown voltage of the PN junction were obtained before and after the semiconductor device was heat treated for 10 minutes 500 ° C in nitrogen gas with 10 to 20 # humidity. In conventional semiconductor devices was even if the breakdown voltage was in front of a such heat treatment was 75 volts, this value to 20

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dropped to 30 volts after being exposed to treatment was. On the contrary, in a semiconductor device according to the invention, the major breaking voltage remains from before such heat treatment essentially unchanged until after this. It also follows that the inventive Semiconductor device improved reliability properties having.

At present it is not possible to give an exact theoretical explanation of such a phenomenon occurs in the invention, but it can be as follows can be interpreted:

In the case of a conventional field effect transistor of the Insulating gate type with no insulating film 9 and no metal layer 10, the silicon oxide films 4 and 5 are exposed to the external atmosphere, so that moisture or vertin-cleaning ions, such as B. ¥ hydrogen ions, oxygen ions or sodium ions adhere to the films 4 and 5 or penetrate into this and thus an electrostatically unfavorable influence on the electrical properties of the base body surface exercise. The end zone of the PN junction and the channel zone of the field effect transistor become special of the insulating gate type is significantly influenced. According to the invention, however, moisture or impurity ions, such as B. hydrogen ions, oxygen ions or sodium ions prevented from reaching the silicon oxide films 4 and 5 even when the device is exposed to the external atmosphere is exposed because the second insulating film 9 and the metal layer 10 are over the silicon oxide films 4 and 5 are provided and the metal layer 10 is electrically connected to the base body. Next will be even if impurity ions adhere to the surface of the metal layer 10, resulting electrical charges through the base body absorbed so that the electrical properties

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the base body surface remain essentially unaffected by the external atmosphere.

In the insulating gate type field effect transistor, it is It is necessary that the silicon oxide film 5 », which lies under the gate electrode 8, is very thin, i.e. H. about 1000 to Is 2000 Å thick as shown in Fig. 2 in order to improve the responsiveness or mutual conductance. With one of these Transistor it is common that the threshold voltage on its channel is slightly influenced by the external atmosphere will. According to the invention, it is also possible to avoid such an influence. With this transistor it is further possible to protect the thin silicon oxide film 5 from being destroyed due to a strong external electrical Secure the field.

Although in the previous example the metal layer 10 is electrically short-circuited with respect to the base body 1 it is also possible to achieve the desired purpose and result by applying a predetermined electrical To achieve the potential of the metal layer 10, the base body 1 serving as a fleece value.

Example 2

With reference to FIGS. 5 to 7, the field effect transistor is now intended of the insulating gate type according to a second embodiment of the invention are described »

The reference number 21 designates a monocrystalline silicon base body of the N-type with a resistance of 5 11 cm, the reference numbers 22 and 23 each denote a diffused P-type source and drainage zone of about 3 / U thickness, which is in the main surface of the base body are formed

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and numerals 2k and 25 denote first insulating films provided on the major surface of the base body 21, the film 2k being about 4,000 to 7,000 pounds and the film 25 being about 1,000 to 2,000 pounds thick. The reference numerals 26, 27 and 28 denote a source, drain and gate electrode of the transistor, which extend above the already mentioned first insulating film, the reference numeral 31 denotes a metal electrode provided in contact with the base body 21, the reference numeral a second, e.g. B. an insulating film consisting essentially of silicon oxide, which is provided on the first insulating film 2k , and reference numerals 30, 34, 35 and 36 denote second metal electrodes extending over the second film 29 and with the underlying metal electrodes 31 »26 , 27 and 28 are connected via holes formed in the second insulating film 29. In this example, the metal electrode is made to cover the entire surface of the source and drainage zones and their surroundings, and is electrically connected to the base body 21 via the metal electrode 31 as in the case of the aforementioned Example 1.

In this example, it is preferable that the parts of the body surface extending within a range of at least 5 / U, preferably 10 λχ or more from the end parts of the PN junctions 32 and 33 are covered with the metal electrode or layer 30 to completely eliminate the influence of the outside atmosphere, since the insulating film underlying the gate electrode 28 is extremely thin. In particular, the distance \ ϊ in FIG. 5 is preferably 5 / ^u or more.

With reference to FIGS. 8 a to 8 d, a method for producing the transistor according to this exemplary embodiment is now intended explained.

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According to Fig. 8 a, the first silicon oxide film 24 is with a thickness of about 5,000 X on the major surface of the N-type silicon base body 21, and then boron is selectively diffused into the main surface, thereby P-type regions 22 and 23 are formed. Then aluminum is vapor-deposited so that a source, drain, Gate and base body electrodes 26 or »27 or 28 or» 31 extending over the film 24 are formed.

Then, as shown in FIG. 8 b, a second insulating film 29, which consists essentially of silicon oxide, in a thickness of 0.5 to 1.0 AX on the first film 24 by thermal decomposition of silane, as in the previous example 1 , dejected.

Then, holes are made in the second insulating film according to a predetermined pattern by the usual photo-etching technique 29 generated so that the metal electrodes 26, 27, 28 and 31 are partially exposed thereby. Then aluminum becomes evaporated onto the exposed parts and the second film, thereby forming a metal layer 40, such as Fig. 8 shows c.

Unnecessary parts of the metal layer 40 are then also removed using the usual photo-etching technique, so that metal electrodes 30, 34, 35 and $ 6 are produced which are separated from one another. Thereby, the semiconductor device according to this embodiment is obtained.

In this manufacturing process it should be noted that the Step of electrically connecting the metal electrode or layer 30 to the base body 21 in comparison with the method described in connection with FIGS. 4 a to 4 d can be carried out very easily »

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Example 3

A semiconductor integrated circuit device will now be described with reference to Figs to which the invention is applied,

Fig. 9 shows a 1-bit circuit representing a relay register circuit using common field effect transistors of the isolating gate type. In order to enable a better understanding, the circuit part with the transistors T _p , / f .. and T- is shown in FIGS. 10 and 11, which are enclosed by the dashed line of the 1-bit circuit which the transistors T ₁ to Tg, which are produced in a single semiconductor base body according to the present invention.

In FIGS. 9 to 11, the reference number 41 represents an N-type silicon base body, the reference numbers 42 to denote P-type diffusion zones, and the reference numbers 48 to 53 represent PN junctions which are produced between these zones and the base body Reference numeral 54 denotes a first insulating film composed essentially of silicon oxide, and reference numerals 55 Ms 61 denote first metal electrodes which extend over the first insulating film 54 to _{form transistors T 2 I Tr and T 1.} Reference numeral 62 denotes a second insulating film formed e.g. B. consists essentially of silicon oxide and is arranged on the first film, and the reference numerals $ 3 to 66 denote second metal electrodes, which are connected to the metal electrodes $ 6, 58, 61 and 55 via holes made in the second film. It should be noted that the metal electrode or layer 66 is provided in such a way that it covers the entire surface of the diffusion zones 42 to 47 and their surroundings and that it is electrically connected to the diffused source cells 4g and the base. ·

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body 4i is connected via the metal electrode 55. The source zone 46 of the transistor T- is electrically connected to the metal layer 66 via the metal electrode 60 and also to the base body and the zone 42 via the metal electrode 55 ″. In the present example, the metal layer 66 can also be used for the connection under the circuit elements.

Example 4

An example will now be described with reference to FIGS. 12 to 17 in which the invention is applied to a planar-type bipolar transistor is applied. In order to better understand the transistor according to the invention, the is shown in Figs. 15 »16 and 17 to enable 12, 13 and 14 are a plan view and sectional views of the semiconductor device prior to the process of attaching a second insulating film 84 and represented by second metal electrodes 85, 86 and 87 thereon. In these figures, the same parts are denoted by the same reference numerals.

As shown in Figs. 12, 13 and i4, a diffused P-type base zone 72 in the main surface of a monocrystalline Generated silicon base body 71 of the N-type, and a plurality of diffused emitter zones 73 »7 ^ and 75 of the N-type λ \ earth is generated in the base zone. On the Main surface of the base body, a first insulating film 79 is applied, the z. B. mainly made of silicon oxide and base and emitter metal electrodes are formed in a comb-like arrangement. Any of these electrodes comprises a tape portion extending across the first film. In accordance with the invention, upon the resultant Semiconductor element a second insulating film 84 is attached.

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brings, the ζ. B. of silicon oxide, aluminum oxide or silicon nitride, as shown in FIGS. 15 * 16 and 17, and a plurality of holes is produced using the usual photo-etching technique in the second film, so that the metal electrodes 80, 81 and 82 through the holes are exposed therethrough. Afterwards, metal, such as B. Al, Gr, Mo, Ti or Au, and then second metal electrodes are then formed in a desired pattern using the usual photo-etching technique. In the transistor thus produced according to the invention, the metal electrodes 85 and 86 are connected to the base and emitter electrodes 80 and 81, respectively, and the metal electrode 87 is electrically connected to the base body 71 via the metal electrode 82. In this example it should be noted that the metal electrode 87 is provided in such a way that it covers the emitter and base zones and the base body surface in the vicinity of these zones. The width W of the metal electrode or layer 87 extending beyond the end portion of the base junction 76 is at least 5 / U, preferably 10 ai or greater.

In addition, the metal electrode 87 can also be used as a connection electrode for the collector zone 83 in this example. Finally, in order to improve the properties of the Ohm ¹ contact between the metal electrode 82 and the base body 81, it is also desirable for a highly doped diffusion zone 78 of the N-type to be produced in the main surface of the base body below the electrode 82. Such a zone 78 can by diffusing an impurity into the base body at the same time with the er. generation of the emitter zones 73 »7 ^ and 75 are formed.

In the planar type bipolar transistor according to the invention, 15 to 17, the second insulating film 84 is formed on the strip-like emitter and base elec-

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Troden designed in such a way that it is not only possible to do one Short circuit between the different strips but rather also to prevent the outer atmosphere from influencing the body surface due to the fact that the base junction 76 is the emitter junction 77 completely covered with the metal electrode or layer 87, such as has already been described in connection with example 1 » Especially when there is moisture or contaminant ions, such as »hydrogen ions» oxygen ions or sodium ions adhere to the surface of such a semiconductor device, it is possible to prevent the semiconductor base body surface from Especially the parts of the PN junctions are unfavorable due to such moisture or contamination This is because the metal electrode 87 is at a certain potential is held in relation to the base body 71 *

Example 5

A fifth embodiment of the invention will now be described with reference to Figs. 21 to 23, "Figs. 18 to 20 are a plan view and two cross sections for showing a semiconductor device during the manufacturing process, which are useful" for a better one To enable understanding of the semiconductor device according to the invention. A plurality of planar-type bipolar transistors are formed in a single semiconductor wafer, as shown in FIGS. 18 to 20, wherein a Ji-type base region. 92 in the main surface of a P-type silicon base body 91 according to an impurity diffusion method, an emitter zone 93 in the base zone also according to the same method and an emitter and a base metal electrode 101 and 102 over a first insulating film 99 consisting essentially of silicon oxide Quivers produced from

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are formed "In these figures, it should be noted that a metal electrode 103 is provided made of aluminum in combination with the basic body in a ripple-like or lattice-like farm under surround each transistor" Further, a second insulating film IQC is generated on the surface of the wafer as shown in Figures «21 to 33 violin» and then holes are made in the second film using the usual photo-etching technique so that the first metal electrodes 101, 102 and 103 are partially exposed. A metal layer is then applied to the exposed parts and the second film using a vacuum deposition method _{vorges.ehen t} and then second metal electrodes are applied in a predetermined pattern by means of the usual photo-etching technique. As the figures show, the metal electrodes 105 and 106 are connected to the emitter and base zones 93 and 92 via the first metal electrodes 101 and 102, respectively, and the metal electrode 107 is connected to the base body 91 via the first metal electrode 103 connected «Finally the Faf * · fei along the scoring lines PP ¹ , QQ ^! "RR ¹ and SS * scratched, so that the individual transistors are separated from one another. With the transistors obtained in accordance with the invention, it can be seen that the metal layer 10?" The second insulating film is provided on the second insulating film such that it covers the working or active zone, covering the entire surface of the base and broittep zones and their surroundings, and is connected to the metal electrode 103 which is the same. Ba "sis, and the emitter zone surrounds _t like that. that it is electrically connected to the round body. "The conventional PNP transistor with no metal layer on it has disadvantages, such as an increase in the coil leakage current," our touch of the base, collector transitions, noticeable deterioration in properties as a result of the influence of the external ? atmo "aphäre etc. due to the fact that _for an inversion" r layer induced in the part of _{Grundkörperoberfläehe: r} _-

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is placed immediately under an insulating film, such as. B.
Silicon oxide film is provided on a P-type silicon base body surface because this insulating film is present. In this embodiment of the invention, however, such an induced inversion film is prevented from being exposed because the peripheral region of the
Semiconductor surface is surrounded by the metal electrode 103 in a ring-like shape. Thus, in PNP bipolar transistors shown in Figs. 21 to 23, the collector leakage current and the base-collector junction characteristics are improved, and the adverse influence of the external atmosphere is eliminated more effectively.

Example 6

Referring to Figs. 24 and 25, an example will now be described in which the invention is applied to a
Semiconductor device of the so-called molded type in which a semiconductor element is embedded in synthetic resin or plastic is used.

For a better understanding, FIG. 2k only shows the main part of such a device. Fig. 25 is a plan view of such a semiconductor device, wherein synthetic resin or plastic resin surrounding the semiconductor element, semiconductor regions formed in the element, first metal electrodes, etc. are omitted for better understanding. A metal layer 129 is provided on a second insulating film 128 in such a way that it covers the surfaces of the diffused zones 112, 113, and 115 and their surroundings and is electrically connected to the base body surface 131. Reference numerals 133 and denote external electrode connection wires connected to second metal electrodes 130 and 132, respectively. The dif-

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Well-established zones 112 and 113 represent the source and drain zone of a first field effect transistor of the insulating gate type and the diffused zones 114 and 115 represent the source and drain zone of a second transistor. In FIG. 25, reference numerals 134, I36, I38, 140, 142, i44, 146, 148, 150 and 152 second metal electrodes similar to those labeled 130 and 132- on the second insulating film. In such resin or plastic molded type semiconductor devices, the base body surface in which the diffused regions are formed is also prevented from being affected by moisture or impurity ions adhering to or penetrating the resin or plastic 135 by providing the metal electrode or layer 129 is. Thus, the reliability and electrical properties of the obtained semiconductor device can be greatly improved as compared with those of the conventional resin or synthetic resin molded type semiconductor devices.

Although the invention has been described in detail with reference to preferred exemplary embodiments, it should be understood it goes without saying that the invention is not limited to such special exemplary embodiments and various modifications can be made which will readily occur to those skilled in the art.

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Claims (2)

Patent claims 1. Semiconductor device, featured by a semiconductor base body (ζ. B. 1) with one main surface, one attached to the main surface first semiconductor zone (z. B. 2) of a first conductivity type and one lying below the first zone and this surrounding second semiconductor zone (e.g. i) of a second conductivity type, with a PN junction (e.g. 12) extends between the two zones up to the main surface, a first insulating film covering the main surface of the base body and extending beyond the transition (e.g. 4, 5), a metal contact adhering to the surface of the first zone (e.g. 6), a metal strip adhered to the first film, electrically connected to the metal contact and separated from it there extends over the film over the transition, a second formed on the first film and at least the entire area of the first zone and its surroundings covering insulating film (e.g. ° -)> a metal layer (e.g. 10) adhered to the second film covering at least the entire surface of the first zone and covers their surroundings, and an element for electrically connecting the metal layer to the base body. 2. Field effect semiconductor device, characterized by a semiconductor base body (i) of a first conductivity type with a main surface, 909837/0923 a pair of source and drainage zones (2, 3) of a second, the conductivity type opposite in the main surface, a first insulating film covering the main surface one created on the first film and part of the major surface gate electrode (8) covering between the source and drainage zones, a source and a drain electrode (6 and 7, respectively)> the holes created in the first film with the source or "drainage" zone (2 or 3) are connected, a second attached to the first film and at least the entire surface of the source and drainage zones and the surrounding insulating film (9) » one attached to the second film and at least the entire surface of the source and drainage zones and theirs Surrounding metal layer (10), and an element for electrically connecting the metal layer to the base body. 3 · Semiconductor device characterized by a Semiconductor base body (71) with a main surface and a first semiconductor zone of a first conductivity type (e.g. N) extending up to this, a second, generated in the main surface and with the first zone a first, extending to the surface and a semiconductor zone (72) forming a first perimeter of the second zone forming a PN junction (76) second conductivity type opposite to the first (e.g. P), 909837/0923 a third, in the main surface and in the second Zone created and with the second zone a second, extending to the main surface and a second enclosure the transition (77) forming the third zone in the first zone forming the semiconductor zone (73, 74, 75) of the first conductivity type, a first insulating film (79) covering the main surface of the base body, a first connected to the surface of the first and second zones and extending over the first insulating film '' Metal electrode (81), a second provided on the first insulating film and the entire surface of the first and second zones as well insulating film covering their surroundings (84), a second attached to the second film and the entire surface of the first and second zones and theirs Metal electrode covering the area (87) » and a member (82) for electrically connecting the second metal electrode to the base body. 909837/0923