DE19714510A1 - Manufacturing process for a liquid crystal display - Google Patents

Abstract

A method of manufacturing an LCD on a substrate (111), the method comprising the steps of forming a thin film transistor (121, 122, 123, 124, 133, 134) on the substrate; forming an organic passivation layer (110) over the thin film transistor; forming a patterned photoresist over the organic passivation layer; etching the organic passivation layer to form a contact hole (143) over one of source (124) and drain (134) of the transistor; removing the photoresist; forming an SiO 2 layer at a surface of the organic passivation layer by O 2 ashing; and forming a pixel electrode (112) contacting one of the source and drain of the transistor through the contact hole.

Description

The invention relates to a manufacturing method for a Liquid crystal display (LCD) and in particular a manufacturing process for a Liquid crystal display with a thin film transistor (TFT: thin film transistor) as a switching element.

In a liquid crystal display with thin film transistors as switching elements, these are integrated so that they each drive one pixel. As can be seen from FIG. 1, in a conventional liquid crystal display with a thin-film transistor arrangement, approximately rectangular pixel electrodes 12 are arranged in rows and columns on a substrate 11 . Gate lines 13 are arranged along the rows and data lines 14 are arranged along the columns.

From Fig. 2a is a plan view of a part of a liquid crystal display thin film transistor array. As can be seen from FIG. 2a, a gate electrode 23 is formed on the substrate, and a plurality of data lines 14 , which cross the gate lines 13 perpendicularly, are arranged parallel to one another. Thin film transistors are formed near each crossover point of the gate lines 13 with the data lines 14 .

FIG. 2b shows a section along the line II from FIG. 2a. As can be seen from FIG. 2 b, a gate electrode 23 made of Ta is formed on the substrate 11 . A gate insulation layer 21 made of SiN _x is formed on the entire surface including the gate electrode 23 , and a semiconductor layer 22 made of a-Si (amorphous silicon) is formed on the gate insulation layer 21 in a region above the gate electrode 23 . An ohmic connection layer 33 made of n-doped a-Si is formed on the semiconductor layer. A source electrode 24 and a drain electrode 34 made of No are formed on the ohmic connection layer 33 , the region of the ohmic connection layer 33 between the source electrode 24 and the drain electrode 34 being removed. An organic layer 10 made of an organic material is formed as a passivation layer.

The organic material has a smoother surface profile as inorganic materials. Thus the tiered Surface to be smoothed when the organic material is on the surface of the liquid crystal display is applied, the an uneven due to multi-layered elements Has surface profile. Thus, defects such as uneven ones Alignment conditions or misalignments of the Liquid crystal molecules due to the stepped surface be reduced. You can also by increasing the area the pixel electrodes achieved a larger opening ratio will.

Next, an inorganic insulation layer 15 made of SiO₂ or SiN _{x is formed} on the organic passivation layer 10 . A connection hole is formed in the insulation layers 10 , 15 above the drain electrode 34 and finally a pixel electrode 12 is formed from a transparent, conductive material such as ITO (indium tin oxide) and with the drain electrode through the connection hole connected through.

As described above, the overall passivation layer achieved in the conventional liquid crystal display has a layer structure of an organic insulation layer 10 and an inorganic insulation layer 15 . The inorganic insulation layer 15 is formed on the organic passivation layer 10 in order to support the adhesive properties of the ITO layer on the passivation layer. The reason for this is that the organic passivation layer does not ensure good adhesion for the ITO layer.

There are two ways to use the organic insulation layer and to form the inorganic insulation layer. One exists in it, the organic insulation layer and the  to apply inorganic insulation layer and them structure at the same time. The other is first to apply and close the organic passivation layer structure and then the inorganic insulation layer form.

First, the first possibility has the following problem: The Process step of structuring the organic Insulation layer and the inorganic insulation layer involves the use of an organic solution such as one Mixture of N-methyl-pyrolidone ("NMP"), alcohol and amine to to remove the photoresist. The insulation layers can then swell or expand as the organic solution in the border area between the organic passivation layer and can penetrate the inorganic insulation layer.

Second, the second possibility has a problem that two structuring steps are required in order to Form passivation layer. In addition, the connection be interrupted with the drain electrode because of the difference between the coefficient of thermal expansion of the organic insulation layer and the thermal Expansion coefficient of the inorganic reeling layer can lead to breaks in the area of the connection hole.

Accordingly, the invention relates to a manufacturing process for a liquid crystal display, the one or avoids several of the problems related to restrictions and Disadvantages of the prior art are due.

It is an object of the invention, a manufacturing process specify for a thin film transistor that the above problems mentioned.

To achieve these and other benefits, instruct The inventive method of a liquid crystal display the following steps: forming gate lines, Data lines and a thin film transistor arrangement on one  Substrate; Apply an organic passivation layer to the above items including the Thin-film transistor arrangement to cover, coating the organic passivation layer with a photoresist; Develop of the photoresist; selective etching of the organic Passivation layer along the developed structure of the Photoresists; Remove the photoresist and convert the surface the organic passivation layer in SiO₂ by ashing the same with O₂; Apply an ITO layer, i. H. one transparent, conductive layer; Coating the ITO layer with a photoresist and developing the photoresist; Form a pixel electrode by selective etching of the ITO layer along the developed structure of the photoresist and removal of the photoresist by ashing with O₂.

According to another aspect, the invention Liquid crystal display with a substrate, gate lines Gate electrodes on the substrate, one of the gate lines covering gate insulation layer, semiconductor layer islands on the gate insulation layer in areas over the corresponding gate electrodes, each a source electrode and a drain electrode on the semiconductor layer islands, one the entire surface of the substrate including the Source electrodes and the drain electrodes covering organic passivation layer, one by converting the Surface of the organic passivation layer to SiO₂ by means of Ashing with an inorganic insulating layer formed with O₂, Connection holes in the insulation layer over the respective Drain electrodes and pixel electrodes on the inorganic Insulation layer, with each pixel electrode with the corresponding drain electrode through the connection hole is connected through.

According to another aspect, the invention Liquid crystal display with a thin film transistor arrangement of a staggered type (TFT) a substrate, Source electrodes and drain electrodes on the substrate, one Semiconductor layer on and between a source  Electrode and the corresponding drain electrode, one Gate insulation layer on the semiconductor layer, gate electrodes on the gate insulation layer, one the entire surface of the substrate including the gate electrodes organic passivation layer, one by converting the Surface of the organic passivation layer in SiO₂ formed inorganic insulation layer and connection holes in the insulation layer over the drain electrodes and the Pixel electrodes on the inorganic insulation layer, each of the pixel electrodes being associated with the respective one Drain electrode through a corresponding connection hole connected is.

In another aspect, the invention Method of manufacturing a liquid crystal display the following steps on a substrate: forming a Thin film transistor on the substrate; Applying one organic passivation layer on the thin film transistor; Form a structured photoresist on the organic Passivation layer; selective etching of the organic Passivation layer around a connection hole above the To form the source region or the drain region of the transistor; Removing the photoresist; Form a SiO₂ layer on the Surface of the organic passivation layer by ashing the same with O₂; and forming a pixel electrode using through the source region or the drain region of the transistor the connection hole is connected through.

According to another aspect, one according to the invention Method of manufacturing a liquid crystal display the following steps on a substrate: forming a Transistor with a gate electrode, one Gate insulation layer, a source electrode and one Drain electrode on the substrate; Train one with the Source electrode of the transistor connected data line; Form one connected to the gate electrode of the transistor Gate line; Form an organic passivation layer the transistor, the passivation layer being at least one  Compound from the group consisting of fluorinated polyimide, Teflon, fluorinated polycycloalkyl polymethylene (Cytop), Fluoropolyaryl ether, fluorinated paraxylene, PFCB (Perfluorocyclobutane) and BCB (benzocyclobutene) as well as preferred has a dielectric constant of less than 3; and Performing a plasma treatment of the passivation layer using a gas with oxygen.

In another aspect, the invention Manufacturing process for a liquid crystal display on a Substrate following steps: Form one Thin film transistor with a gate electrode, a Gate insulation layer, a source electrode and one Drain electrode on the substrate; Train one with the Source electrode of the transistor connected data line; Form one connected to the gate electrode of the transistor Gate line; Form an organic passivation layer the thin film transistor, the organic Passivation layer at least one compound from the group consisting of fluorinated polyimide, teflon, fluorinated Polycycloalkyl polymethylene (cytop), fluoropolyaryl ether, fluorinated paraxylene, PFCB (perfluorocyclobutane) and BCB (Benzocyclobutene) and preferably a dielectric constant less than 3; Form a structured Photoresists on the organic passivation layer; selective Etch the organic passivation layer to a Connection hole over the source electrode or the To form the drain electrode of the transistor; Removing the photoresist; Form a SiO₂ layer on the surface of the organic Passivation layer by ashing it with O₂; and Form a pixel electrode with the source electrode or the drain electrode of the thin film transistor through the Connection hole is connected through.

The drawing shows preferred embodiments of the invention and serve together with the description for more details Explanation of the principles of the invention.  

The drawing shows:

Fig. 1 is a circuit diagram of a conventional liquid crystal display;

Fig. 2 is an enlarged plan view of thin film transistors and parts of pixel electrodes in accordance with a conventional liquid crystal display;

3 shows a section along the line II of Fig. 2a.

Figures 3a to 3f-sectional views explaining the manufacturing method for a liquid crystal display according to a first embodiment of the invention. and

FIGS. 4a to 4d-sectional views explaining the manufacturing method for a liquid crystal display according to a second embodiment of the invention.

In the following, preferred embodiments of the Invention, which can be seen by way of example from the drawings are referred to.

As seen from Fig. 3, a metal such as aluminum, applied to the entire surface of a substrate 111 and patterned such that a gate line (not shown) and a gate electrode are formed 123rd A gate insulation layer 121 is applied to the entire surface of the substrate on which the metal layer has already been structured ( FIG. 3a). An a-Si layer 122 and an n⁺-doped a-Si layer 133 are applied ( FIG. 3b) and patterned around an a-Si layer island 122 and an n⁺-doped a-Si layer -Isle 133 ( FIG. 3c) to form in an area above the gate electrode 123 . A Cr layer, for example, is deposited and patterned to form a source electrode 124 and a drain electrode 134 . Then the area of the n⁺-doped a-Si layer 133 which is exposed between the source electrode 123 and the drain electrode 134 is etched off ( FIG. 3d).

As can be seen from FIG. 3e, a passivation layer 110 is formed on the entire surface by applying an organic material with an --O bond structure. The passivation layer is coated with a photoresist and this is developed. A connection hole 143 is then formed, for example by means of a dry etching process. The photoresist is removed by ashing with O₂. An inorganic passivation layer 115 is generated by oxidizing the surface of the organic passivation layer, whereby it is converted into SiO₂ ( Fig. 3e). If the organic passivation layer covers the gate line connections and the data line connections, the organic passivation layer can be etched selectively in these areas at the same time when the connection hole is formed by means of the dry etching method (not shown in the drawing).

As can be seen from FIG. 3f, an ITO layer is applied next. This is coated with a photoresist and the photoresist is developed. A pixel electrode 112 is formed by selectively etching the ITO layer in accordance with the developed structure of the photoresist. The remaining photoresist can be removed by ashing with O₂ ( Fig. 3f).

FIGS. 4a to 4d show a second embodiment of the inventive method. As can be seen from FIG. 4a, a metal, such as Cr, is applied to the entire surface of a substrate 11 and structured in such a way that a data line (not shown), a source electrode 124 and a drain electrode 134 are formed. An a-Si layer, an SiN _x layer and an Al layer are applied to the entire surface of the substrate on which the Cr layer has already been structured ( FIG. 4a). These layers are patterned to form a semiconductor layer 122 , a gate insulation layer 121 , a gate line (not shown) and a gate electrode 123 ( FIG. 4b).

A passivation layer 110 is formed by applying an organic material with an --O bond structure to the entire surface. Many different compounds with an --O bond structure can be considered for the invention. An example of such a compound is benzocyclobutene (BCB). The passivation layer is coated with a photoresist and this is developed. A via hole 143 is formed in the passivation layer 110 over the drain electrode 134 , for example using a dry etch process. The photoresist is removed by ashing with O₂. An inorganic insulation layer 115 is formed by ashing the organic passivation layer 110 with O₂ for a certain period of time, whereby the surface of the organic passivation layer 110 is converted into an SiO₂ layer ( FIG. 4c). If the organic passivation layer covers the gate line connections and the data line connections, the organic passivation layer can be selectively etched away at the same time when the connection hole is formed using the dry etching method (not shown in the drawing).

As can be seen from FIG. 4d, an ITO layer is then applied. Afterwards a photoresist is applied and developed. The pixel electrode 112 is formed by selectively etching the ITO layer according to the developed structure of the photoresist using a dry etching method or a wet etching method. The remaining photoresist can be removed by ashing with O₂ ( Fig. 4d).

The features of the inventive method explained above are described below. A photoresist is applied to an organic passivation layer. The photoresist is exposed and developed, the desired structure being achieved by using a mask. The organic passivation layer is structured according to the developed structure of the photoresist using a dry etching process. The remaining photoresist is removed by ashing with O₂ or using a wet etching process (wet strip). In the case of O₂ ashing, an inorganic insulation layer 115 can be formed by continuously ashing the organic passivation layer with O₂ for a certain period of time, the surface of the organic passivation layer being converted into SiO₂. Accordingly, the three process steps of (1) etching the organic passivation layer, (2) removing the photoresist and (3) ashing the organic passivation layer with O₂ can be carried out in succession in a dry etching chamber. Thus, since the three operations in a dry etching chamber are performed sequentially in one step, the number of process steps in the invention is reduced.

Alternatively, the photoresist can be removed using a wet etch process. In this case, a mixture of alcohol, acetone, H₂SO₄ and HNO₃ can be used as a solution for the wet strip process in addition to various other processes for removing the photoresist. Then, an inorganic insulation layer can be formed by converting the surface of the organic passivation layer 110 into an SiO₂ layer by ashing the organic passivation layer with O₂ after the photoresist on the organic passivation layer has been removed.

In addition, the undesirable swelling of the Insulation layer according to the conventional method, which Swelling on the penetration of an organic solution, such as a mixture of NMP, alcohol and amine in the limit between the organic passivation layer and the inorganic insulation layer is prevented be because of the inorganic insulation layer Converting the surface of the organic passivation layer is formed in a SiO₂ layer.

Furthermore, the SiO₂ layer prevents according to the Insulation layer the problem that the connection between the pixel electrode and the drain electrode breaks off or  resolves what breaks in the area of the connection hole due to a difference between the thermal Expansion coefficient of the organic insulation layer and the coefficient of thermal expansion of the inorganic Insulation layer is due. Problems from such Differences between the coefficients of thermal expansion are overcome by the invention.

The structural formulas and the dielectric constants exemplary materials used for organic Passivation layer or the organic insulation layer can be used in Table 1 below shown. To ensure an inorganic To be able to form a layer on the organic layer should in the organic layer is an inorganic layer Connection included. Silicon containing materials are preferred. In the organic passivation layer can contain the silicon in the polymeric compounds or be dispersed in the layer as a silicon compound.  

Table 1

Claims (15)

1. A method for producing a liquid crystal display on a substrate ( 111 ), comprising the following steps: forming a thin-film transistor on the substrate ( 111 )
Forming an organic insulation layer ( 110 ) on the thin film transistor;
Forming a patterned photoresist on the organic insulation layer ( 110 );
selectively etching the organic insulation layer ( 110 ) to form a via ( 143 ) on the source ( 124 ) or drain ( 134 ) of the transistor;
Removing the photoresist;
Forming an inorganic layer ( 115 ) on the surface of the organic insulation layer ( 110 ) by ashing it with O₂; and
Forming a pixel electrode ( 112 ) connected to the source electrode ( 124 ) or the drain electrode ( 134 ) of the transistor through the connection hole ( 143 ). 2. Manufacturing method for a liquid crystal display on a substrate ( 111 ) with the following steps: Forming a thin film transistor having a gate electrode ( 123 ), a gate insulation layer ( 121 ), a source electrode ( 124 ) and a drain electrode ( 134 ) on the substrate ( 111 );
Forming a data line connected to the source electrode ( 124 ) of the transistor;
Forming a gate line connected to the gate electrode ( 123 ) of the transistor;
Forming an organic insulation layer ( 110 ) on the thin film transistor, the organic insulation layer ( 110 ) comprising one of the following compounds: fluorinated polyimide, Teflon, fluorinated polycycloalkyl polymethylene (Cytop), fluoropolyaryl ether, fluorinated paraxylene, PFCB (perfluorocyclobutane) and BCB (benzocyclobutene)
Forming a patterned photoresist on the organic insulation layer ( 110 );
selectively etching the organic insulation layer ( 110 ) to form a via ( 143 ) on the source ( 124 ) or drain ( 134 ) of the transistor;
Removing the photoresist;
Forming an inorganic layer ( 115 ) on the surface of the organic insulation layer ( 110 ) by ashing with O₂; and
Forming a pixel electrode ( 112 ) connected to the source electrode ( 124 ) or the drain electrode ( 134 ) of the thin film transistor through the connection hole ( 143 ). 3. Manufacturing process for a liquid crystal display according to Claim 1 or 2, wherein the step of removing the Has a lacquer ashing with O₂. 4. A manufacturing method for a liquid crystal display according to claim 3, wherein the step of ashing with O₂ continuously continues until the photoresist is removed and the inorganic layer ( 115 ) is formed on the surface of the organic insulation layer ( 110 ). 5. A manufacturing method for a liquid crystal display according to one of claims 1 to 3, wherein the organic insulation layer ( 110 ) has at least one Si bond structure. 6. A liquid crystal display manufacturing method according to claim 5, wherein the step of removing the resist by ashing with 0₂ and the step of manufacturing an inorganic layer ( 115 ) are carried out continuously. 7. A liquid crystal display manufacturing method according to claim 6, wherein the step of forming the inorganic layer ( 115 ) comprises a step in which the surface of the organic insulating layer ( 110 ) is converted to SiO₂ by ashing with O₂. 8. Manufacturing process for a liquid crystal display any one of claims 1 to 3, wherein the step of removing of the photoresist has a wet etching process. 9. Manufacturing method for a liquid crystal display according to Claim 8, wherein for the wet etching process a mixture of Alcohol, acetone, HNO₃ and H₂SO₄ is used. 10. A liquid crystal display manufacturing method according to claim 1, wherein the organic insulating layer ( 110 ) comprises one of the following compounds: fluorinated polyimide, Teflon, fluorinated polycycloalkyl polymethylene (Cytop), fluoropolyaryl ether, fluorinated paraxylene, PFCB (perfluorocyclobutane) and BCB (benzocyclobutene). 11. A manufacturing method for a liquid crystal display on a substrate ( 111 ), comprising the following steps: Forming a transistor having a gate electrode ( 123 ), a gate insulation layer ( 121 ), a source electrode ( 124 ) and a drain electrode ( 134 ) on the substrate (III);
Forming a data line connected to the source electrode ( 124 ) of the transistor;
Forming a gate line connected to the gate electrode ( 123 ) of the transistor;
Forming a passivation layer ( 110 ) on the transistor, the passivation layer ( 110 ) comprising at least one of the following compounds: fluorinated polyimide, Teflon, fluorinated polycycloalkyl polymethylene (Cytop), fluoropolyaryl ether, fluorinated paraxylene, PFCB (perfluorocyclobutane) and BCB (benzocyclobutene); and
Perform a plasma treatment of the passivation layer ( 110 ) using a gas with oxygen. 12. A manufacturing method for a liquid crystal display according to claim 11, wherein the passivation layer ( 110 ) has an Si bond structure. The manufacturing method for a liquid crystal display according to claim 11, wherein silicon oxide is formed on the surface of the passivation layer ( 110 ) in the step in which the plasma treatment is carried out.