DE19729176C2 - Manufacturing method for an active matrix liquid crystal display and structure of the liquid crystal display manufactured by this manufacturing method - Google Patents

Description

The invention relates to a liquid crystal display with active Matrix (AMLCD, Active Matrix Liquid Cristal Display) with one Thin film transistor (TFT) as Switching element and a manufacturing method for a TFT and the structure of using this method manufactured TFTs.

No. 4,956,680 describes a method for producing a Thin film transistor known, in which the semiconductor layer is hydrogenated before the insulation layer is formed thereon becomes.

Furthermore, in J.D. Bernstein et al, "Hydrogenation of Polycrystalline Silicon Thin Film Transistors by Plasma Ion Implantation ", IEEE Electron Device Letters, Volume 16, No. 10, October 1995, pp. 421 to 423, an N-channel and P-channel described polycrystalline silicon thin film transistor, which is manufactured by means of plasma ion implantation.

Furthermore, from US 4,636,038 is an electronic circuit known with a thin film transistor array, which on the Is formed with an inorganic substrate Isolation layer, which over the thin film transistor array is formed and with an organic insulation layer, which are formed over the inorganic insulation layer is.

DE-37 14 482 describes a method for passivating the return channel described by field-effect transistors made of amorphous silicon, in which an organic or inorganic basic solution as a means is used to cut the back channel section one on amorphous silicon based FET device after plasma passivation of the return channel area.  

Furthermore, from US 5,313,075 is a gate-insulated Thin film transistor known, in which the Thin film transistor on a substrate through a Blocking layer is formed so that it is possible to prevent the thin film transistor from using Contamination ions, for example alkali ions, which in the substrate exist, is contaminated.

As can be seen from FIG. 1, in a conventional liquid crystal display with an active matrix, the structure of the AMLCD has two substrates (a first substrate and a second substrate), of which pixels (pixels) arranged in a matrix arrangement are determined.

Pixel electrodes 4 are arranged on the first substrate 3 between the crossings between the gate bus lines 17 and the data bus lines 15 . The gate bus lines 17 run in the horizontal direction and have gate electrodes (not shown) branching off from them. Furthermore, data bus lines 15 which run at right angles to the gate bus lines 17 and have data electrodes (not shown) which branch off from the data bus lines are formed. TFTs 8 , which are electrically connected to the pixel electrodes 4 , are arranged adjacent to the crossings between the gate bus lines and the data bus lines.

Color filter layers 38 and a common electrode 37 are formed on the second substrate 2 .

The first substrate and the second substrate are aligned opposite one another and connected to one another. In the case of a finished liquid crystal panel with an active matrix, the space between the substrates is filled with a liquid crystal material 40 . Before the substrates are assembled, polarizing plates 1 are arranged on their respective outer sides, and the reference numerals 11 and 11 'in FIG. 1 denote the transparent glass substrates.

The structure of the first substrate 3 and the production method for the first substrate 3 are explained in more detail below with reference to FIGS. 2 and 3.

Fig. 2 is a plan view showing the structure of a conventional AMLCD, and Fig. 3 is a section along the line III-III of Fig. 2.

An AMLCD according to the conventional manufacturing method is manufactured with the following structure: On a transparent glass substrate 11 , a horizontally extending gate bus line 17 and a gate electrode 17 a branching from it are formed. The gate electrode can be anodized so that an anodization layer 35 is formed to improve the insulation properties and to prevent unevenness on the surface of the gate electrode. On the substrate 11 with the gate electrode 17 a, a gate insulation layer 23 is formed using an inorganic material such as SiN _x or SiO ₂ . A semiconductor layer 22 using amorphous silicon (a-Si) is formed on the region of the gate insulation layer 23 lying above the gate electrode 17 a. Separate ohmic contact layers 25 are formed on the a-Si semiconductor layer using n ⁺ -doped a-Si. On the surface having the ohmic contact layers 25 , a data bus line 15 running at right angles to the gate bus line 17 , a source electrode 15 a connected to the data bus line 15 and a drain electrode 15 b are formed therefrom at a predetermined distance. At the same time, the source electrode 15 a and the drain electrode 15 b come into electrical connection with the corresponding ohmic contact layer 25 .

Then a protective layer 26 is formed using an inorganic material such as SiN _x , which covers the substrate including the source electrode 15 a and the drain electrode 15 b, as well as the semiconductor layer 22 between the source electrode 15 a and the drain -Electrode 15 covered. A pixel electrode 4 is transparent, using a conductive material such as indium tin oxide (ITO, Indium Tin Oxide) is formed on the protective layer, so that an electrical connection between the pixel electrode 4 and the drain electrode 15 b by an connection hole 31 formed in the protective layer 26 is produced therethrough.

Since the first substrate of the AMLCD, as can be seen from FIG. 4, has a TFT and bus lines with a stepped surface, the pixel electrode 4 must be at a distance determined by this structure from the gate bus line 17 , the data bus line 15 and the TFT be formed. This is the case because an inorganic material such as SiN _x or SiO _{2 is} used for the gate insulation layer 23 or the protective layer 26 .

In addition, the tiered TFT and the tiered Lines to problems in making the AMLCD. In particular is when an orientation layer on the tiered Surface is formed, the initial orientation of the Liquid crystal due to possible rubbing effects on the graded areas of the orientation layer inhomogeneous what causes the quality of the LCD to deteriorate.

To solve these problems, an organic material with particularly high flatness properties is used for the gate insulation layer 23 or the protective layer 26 . Poor operation of the LCD can thus be prevented, since at least no friction effects due to a stepped surface occur. Furthermore, an improvement in the opening ratio can be achieved since the pixel electrode 4 can be designed such that it covers the bus lines.

However, introducing the organic material into a TFT structure leads to other problems. The characteristic of the TFT in the switched-on state becomes unstable, which means that the course of the curve, which describes the dependence of the current (I _DS ) between drain and source on the voltage (V _GS ) between gate and source, is shifted in the negative direction 5 ( FIG. 5), since the surface of the semiconductor layer 22 which is connected to the organic layer acts as a charge trap.

The invention is therefore based on the object Liquid crystal display and a process for its manufacture specify where the problems listed no longer apply occur.

This is achieved by a method according to claim 1 and a liquid crystal display according to claim 14.

According to the surface of the semiconductor layer Treated using a plasma procedure.

This is advantageously done using N ₂ , O ₂ or a gas which has N or F, which leads to stable binding structures Si-O or Si-N on the surface of the semiconductor layer. In this way, the problems at the transition between the semiconductor layer and the organic protective layer, such as problems with charge traps and detachment problems, can be eliminated.

Similarly, in conjunction with the Semiconductor layer standing and made of an organic material manufactured surface of the gate insulation layer by means of of a plasma process so that the above mentioned problems can be prevented.

Further refinements of the method and Liquid crystal displays can be found in the subclaims.  

The drawing shows preferred embodiments of the invention and serves together with the description for further explanation the principles of the invention.

The drawing shows:

Fig. 1 is a perspective view of the structure of a conventional liquid crystal active matrix display;

Figure 2 is a plan view of the structure of a conventional liquid crystal active matrix display.

Fig. 3 is a sectional view of the structure of a conventional active matrix liquid crystal display along the line III-III of Fig. 2;

4 is a perspective view of a stepped surface in the region of the intersection of a gate bus line and a data bus.

FIG. 5 shows the curve of the switching characteristic of a TFT with an organic protective layer;

Fig. 6 is a sectional view of a plasma apparatus;

Fig. 7 is an illustration of the chemical structure of a semiconductor layer having dangling bonds on the surface is visible;

Fig. 8 is an illustration of the chemical structure of a semiconductor layer after the plasma treatment, it can be seen the surface using N _2, O ₂ or a gas comprising N or F;

9 shows the curve of the switching characteristic of a TFT with an organic protective layer to a plasma treatment according to the invention.

FIG. 10 is a plan view of the structure of a liquid crystal display having an active matrix according to a preferred embodiment of the invention;

Figs. 11 and 12 sections along the line VV of Figure 10, from which manufacturing steps of a first substrate of a liquid crystal active matrix display, a preferred embodiment of the invention according visible.

. 13 to 15 are sections along the line VV of Figure 10, from which a first substrate TFT structures according to preferred embodiments of the invention are shown a liquid crystal display having an active matrix with different. and

FIGS. 16 and 17 sectional views taken along the line VV of Fig. 10, from which another first substrate to another preferred embodiment of the invention is a liquid crystal display having an active matrix according visible.

The following is a closer look at the preferred embodiments received the invention, which can be seen from the drawing are. The organic material for the protective layer or Gate insulation layer can be selected from a group which has: benzocyclobutene (BCB) and Perfluorocyclobutane (PFCB). The examples described here refer to a manufacturing process for the first Substrate of an AMLCD using BCB with a Dielectric constants less than 3.0 and a Si-O Bond structure.

The importance of plasma treatment of the semiconductor layer above  the application of an organic layer according to the invention is described on the basis of the production of the semiconductor layer.

As can be seen from FIG. 6, silane gas (SiH ₄ ) forms a plasma with SiH ₃ ⁺ , SiH ₂ ²⁺ and H ⁺ radicals when it is introduced into a plasma device 150 and subjected to a gas discharge. The reaction of the plasma gas leads to the deposition of amorphous silicon (a-Si: H) 122 on the substrate 100 . Chemical structures with binding effects due to free bonds on the surface are formed on the semiconductor layer made of a-Si: H, as can be seen from FIG. 7.

When the semiconductor layer 122 with such binding effects is coated with an organic protective layer by spin coating, the unstable surface of the semiconductor layer has little adhesion to the organic layer, and the organic layer peels off from the semiconductor layer. In addition, the free bonds on the surface of the semiconductor layer act as charge traps for electrons, which is why the curve of the characteristics of the TFT is shifted towards negative voltages when switched on ( FIG. 5). This leads to an unstable TFT, so that the operation must take place at a voltage which is lower than the voltage of the TFT in the on state, which is not desirable.

Therefore, the surface 136 of the semiconductor layer is plasma treated using N ₂ , O _2, or a gas having N or F to prevent binding effects and detachment of the semiconductor layer from the organic layer. The surface treatment of the semiconductor layer using N ₂ , O ₂ or a gas which has N or F leads to stable binding structures, such as Si-N or Si-O, as can be seen from FIG. 8. Therefore, the application of an organic layer on the surface 136 of the semiconductor layer 122 with Si-O bonds or Si-N bonds leads to a stable connection between the semiconductor layer and the organic layer, so that detachment of these two layers from one another is prevented and one stable characteristic of the IFT is achieved when switched on.

The experimental results of the characteristics of the TFT in the switched-on state after the application of an organic protective layer made of e.g. B. BCB on the semiconductor layer show that the curve (C2) of the TFT characteristic after the plasma treatment using N ₂ , O ₂ or a gas having N or F reveals an improved characteristic of the TFT when switched on without a shift (d) of the characteristic in comparison with the curve profile (C1) of the characteristic without plasma treatment, as can be seen from FIG. 9.

example 1

The manufacturing method for the first substrate of an AMLCD is explained with reference to FIG. 10, from which a plan view of the AMLCD according to a first embodiment of the invention can be seen, and FIG. 11, from which a section along the line VV from FIG. 10 can be seen.

A metal layer is applied to a transparent glass substrate 111 using Al, Al-Ta, Al-Mo, Ta or Ti (anodizable) or Cr and structured in such a way that a gate bus line and a gate electrode 117 a branching therefrom are formed ( Fig. 11A). If the metal layer is anodizable, an anodizing layer 135 is applied to the gate bus line and the gate electrode 177 a in order to improve the insulation properties and to prevent unevenness ( FIG. 11B).

Then the entire surface is coated with an inorganic material such as SiN _x or SiO ₂ to form a gate insulation layer 123 , and a-Si and n ⁺ -doped a-Si are successively applied to the gate insulation layer 123 ( Fig. 11C). Then the a-Si layer and the n ⁺ -doped a-Si layer are structured together in such a way that a semiconductor layer 125 and an ohmic contact layer 125 are formed ( FIG. 11D). Then a metal, such as an Al alloy, is applied to the ohmic contact layer and the gate insulation layer 123 and structured in such a way that a data bus line 115 on the gate insulation layer 123 and a source electrode 115 a branching off from the data bus line and an as Output serving drain electrode 115 b are formed on the ohmic contact layer 125 . The exposed area of the ohmic contact layer between the source electrode 115 a and the drain electrode 115 b is removed using the source electrode 115 a and the drain electrode 115 b as a mask ( FIG. 11E), thereby creating an area of the semiconductor layer 122 is exposed between the source electrode 115 a and the drain electrode 115 b.

Thereafter, the exposed region of the semiconductor layer is plasma treated using N ₂ , O _2, or a gas having N or F to form a surface treated layer 136 .

Then, a protective layer 126 made of an organic material such as BCB and PFCB is formed on the entire surface of the structure obtained ( Fig. 11F). A connection hole 131 is formed in the protective layer to expose the drain electrode 115 under the protective layer 126 . Next, ITO is applied to the substrate with the protective layer and structured in such a way that a pixel electrode 104 is formed which is in electrical connection with the drain electrode 115b through the connection hole 131 and overlaps the data bus line 115 ( FIG. 11H).

This embodiment is based on the IOP (ITO On Passivation) structure for forming the pixel electrode on the protective layer. However, the invention can be applied to other structures regardless of when the step in which the pixel electrode is formed is performed. For example, the pixel electrode can be formed before or immediately after the source electrode 115a and the drain electrode 115b have been formed ( Figs. 12A and 12B, respectively).

Furthermore, as can be seen from FIGS. 13 to 15, the invention can be applied to TFTs with layered structures (staggered type), coplanar structures or self-aligning structures and to TFTs with reverse layered structures (reverse staggered type), as can be seen from FIG. 11 , be applied.

Thus, according to the invention, the pixel electrode 104 can be designed such that it overlaps regions of the TFT and regions of the gate bus lines 117 and the data bus lines 115 , as can be seen from FIG. 10, as a result of which the opening ratio is improved.

In addition, the pixel electrode 104 overlapping the gate bus line 117 acts as a storage capacitor electrode.

Example 2

Another example of the manufacturing method of the first substrate of an AMLCD according to another preferred embodiment of the invention is explained with reference to FIG. 16, from which a section along the line VV from FIG. 10 can be seen.

A metal layer is applied to a transparent glass substrate 11 using Al, Al-Ta, Al-Mo, Ta or Ti (anodizable) or Cr and structured in such a way that a gate bus line and a gate electrode 117 a branching therefrom are formed ( Fig. 16A). If the metal layer is anodizable, an anodizing layer 135 is formed on the gate bus line and the gate electrode 117 a in order to improve the insulation properties and to prevent unevenness ( FIG. 16B).

Then the entire surface is coated with an organic material, such as BCB and PFCB, so that a gate insulation layer is formed and plasma-treated using N ₂ , O ₂ or a gas containing N or F. to form a surface treated layer 136a ( Fig. 16C).

Then a-Si and n ⁺ -doped a-Si are successively applied to the organic insulation layer 123 and structured in such a way that a semiconductor layer 122 and an ohmic contact layer 125 are formed ( FIG. 16D). Next, a metal, such as an Al alloy, is applied to the ohmic contact layer 125 and the organic insulation layer 123 and structured in such a way that a data bus line 115 on the organic insulation layer 123 as well as a source electrode 115 a branching off the data bus line and one Drain electrode 115 b are formed as an output, which overlap the ohmic contact layer 125 . The exposed area of the ohmic contact layer between the source electrode 115 a and the drain electrode 115 b is removed using the source electrode 115 a and the drain electrode 115 b as a mask, whereby the area of the semiconductor layer 122 between the source Electrode 115 a and the drain electrode 115 b is exposed ( Fig. 16E).

Thereafter, the exposed area of the semiconductor layer is plasma treated using N ₂ , O _2, or a gas having N or F to form a surface-treated layer 136 b. Then a protective layer 126 made of an organic material, such as BCB and / or PFCB, is formed on the entire surface of the structure obtained ( FIG. 16F).

A connection hole 131 is formed in the protective layer 126 to expose the drain electrode 115 b ( FIG. 16G). Next, ITO is applied to the substrate with the protective layer and structured in such a way that a pixel electrode 104 is formed which is in electrical connection with the drain electrode 115b through the connection hole 131 and overlaps the data bus line 115 ( FIG. 16H ).

Plasma treatment of the organic gate insulation layer 123 and the semiconductor layer 122 using N ₂ , O ₂ or a gas having N or F changes the surface binding structure of the organic layer and the semiconductor layer such that the TFT characteristic is on State is stabilized and no charge trap arises at the transition between the semiconductor layer 122 and the organic layer and detachment of the inorganic layer from the organic layer and structuring effects of the inorganic layer are prevented. B. can be a metal layer, an ITO layer or an a-Si layer.

This embodiment also relates, as in Example 1, to an IOP structure for forming the pixel electrode on the protective layer. However, the invention can also be applied to other TFT structures, regardless of the step in which the pixel electrode is formed. For example, the pixel electrode may be formed before or immediately after the source and drain are formed ( FIGS. 17A and 17B, respectively).

Thus, the plasma treatment of the organic insulation layer 123 and the semiconductor layer 122 when using organic material such as BCB and / or PFCB for the gate insulation layer 123 and the protective layer 126 enables an improved opening ratio of the AMLCD with a more stable characteristic of the TFT when switched on Status.

Similarly, fluorinated polyimide, Teflon, Cytop, Fluoropolyaryl ether and fluorinated paraxylene, all one Dielectric constant of less than 3 than gate Insulation layer and / or used as a passivation layer become. These materials are shown in Table 1.  

Table 1

Dielectric constants of organic materials used in the invention

Claims (26)

1. A manufacturing method for a liquid crystal display comprising a thin film transistor with a gate electrode ( 117 a) branching off a gate line ( 117 ), a first insulation layer ( 123 ) covering the gate electrode ( 117 a) and a semiconductor layer ( 122 ), an ohmic contact layer ( 125 ), a drain electrode ( 115 b), a source electrode ( 115 a) branching off from a data bus line ( 115 ) and a second insulation layer ( 126 ) covering the semiconductor layer ( 122 ), wherein the manufacturing process for the LCD comprises the following steps:
Surface treatment of the surface of the semiconductor layer ( 122 ) by means of a plasma process; and
Forming the second insulation layer ( 126 ) on the surface-treated surface of the semiconductor layer ( 122 ) using an organic material. 2. The method according to claim 1, wherein the first insulation layer ( 123 ) between the semiconductor layer ( 122 ) and the gate electrode ( 117 a) is formed and comprises an organic material. 3. The method according to claim 2, comprising a step in which the surface of the first insulation layer ( 123 ) is surface-treated on the side provided for the application of the semiconductor layer ( 122 ). 4. The method of claim 1 or 3, wherein the Surface treatment is a plasma treatment. 5. The method according to claim 4, wherein at least one of the following substances is used in the plasma treatment: N ₂ , O ₂ , N-containing gas and F-containing gas. 6. The method according to any one of claims 1 to 5, comprising a step in which a pixel electrode ( 104 ) is formed on the first insulation layer ( 123 ) or on the second insulation layer ( 126 ). 7. The method of claim 6, wherein the pixel electrode ( 104 ) partially overlaps the data bus line ( 115 ). 8. The method of claim 6, wherein the pixel electrode ( 104 ) partially overlaps the data bus line ( 115 ) and the gate bus line ( 117 ). 9. The method of claim 6, wherein the pixel electrode ( 104 ) is formed before the formation of the source electrode ( 115 a) and the drain electrode ( 115 b). 10. The method of claim 6, wherein the pixel electrode ( 104 ) is formed after the formation of the source electrode ( 115 a) and the drain electrode ( 115 b). 11. The method according to any one of claims 1 to 10, wherein the organic material has a Si-O bond structure. 12. The method according to any one of claims 1 to 11, wherein the organic material has a dielectric constant of less than 3.0. 13. The method according to any one of claims 1 to 12, wherein the organic material benzocyclobutene (BCB) and / or Perfluorocyclobutane (PFCB) has.   14. Liquid crystal display with:
a thin film transistor with:
one of a gate line ( 117 ) branching gate electrode ( 117 a);
a first insulation layer ( 123 ) covering the gate electrode ( 117 a);
a semiconductor layer ( 122 );
an ohmic contact layer ( 125 );
a source electrode ( 115 a) branching off the data bus line and a drain electrode ( 115 b); and
a second insulation layer ( 126 ) covering the semiconductor layer ( 122 ), the second insulation layer comprising organic material;
wherein the surface of the semiconductor layer ( 122 ) is surface-treated by means of a plasma process. 15. A liquid crystal display according to claim 14, wherein the first insulation layer ( 123 ) between the semiconductor layer ( 122 ) and the gate electrode ( 117 a) is formed and comprises organic material. 16. The liquid crystal display according to claim 15, wherein the surface of the first insulation layer ( 123 ) is surface-treated. 17. A liquid crystal display according to one of claims 14 and 16, wherein the surface of the first insulation layer ( 123 ) is plasma-treated. 18. A liquid crystal display according to claim 17, wherein at least one of the following substances is used in the plasma treatment: N ₂ , O ₂ , N-containing gas and F-containing gas. 19. Liquid crystal display according to one of claims 14 to 18, which has a pixel electrode ( 104 ) on the first insulation layer ( 123 ) or the second insulation layer ( 126 ). 20. A liquid crystal display according to claim 19, wherein the pixel electrode ( 104 ) partially overlaps the data bus line ( 115 ). 21. A liquid crystal display according to claim 19, wherein the pixel electrode ( 104 ) partially overlaps the data bus line ( 115 ) and the gate bus line ( 117 ). 22. A liquid crystal display according to claim 19, wherein the pixel electrode ( 104 ) is formed before the formation of the source electrode ( 115 a) and the drain electrode ( 115 b). 23. A liquid crystal display according to claim 19, wherein the pixel electrode ( 104 ) is formed after the formation of the source electrode ( 115 a) and the drain electrode ( 115 b). 24. Liquid crystal display according to one of claims 14 to 23, wherein the organic material has a Si-O bond structure having. 25. Liquid crystal display according to one of claims 14 to 24, wherein the organic material has a dielectric constant of has less than 3.0. 26. Liquid crystal display according to one of claims 14 to 25, the organic material being benzocyclobutene (BCB) and / or Perfluorocyclobutane (PFCB) has.