DE2810054C2 - - Google Patents
Info
- Publication number
- DE2810054C2 DE2810054C2 DE2810054A DE2810054A DE2810054C2 DE 2810054 C2 DE2810054 C2 DE 2810054C2 DE 2810054 A DE2810054 A DE 2810054A DE 2810054 A DE2810054 A DE 2810054A DE 2810054 C2 DE2810054 C2 DE 2810054C2
- Authority
- DE
- Germany
- Prior art keywords
- face
- resin film
- specified
- conductor films
- wiring conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
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- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H01L2924/301—Electrical effects
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- H01L2924/3511—Warping
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52025603A JPS5826667B2 (ja) | 1977-03-08 | 1977-03-08 | 半導体装置 |
JP52040022A JPS5929145B2 (ja) | 1977-04-07 | 1977-04-07 | 電子部品の装着方法 |
JP5562477A JPS53139972A (en) | 1977-05-13 | 1977-05-13 | Production of semiconductor device |
JP52114296A JPS5811113B2 (ja) | 1977-09-21 | 1977-09-21 | 電子回路装置 |
JP52117068A JPS586951B2 (ja) | 1977-09-28 | 1977-09-28 | 電子回路装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE2810054A1 DE2810054A1 (de) | 1978-09-14 |
DE2810054C2 true DE2810054C2 (de) | 1987-02-12 |
Family
ID=27520752
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19782810054 Granted DE2810054A1 (de) | 1977-03-08 | 1978-03-08 | Elektronische schaltungsvorrichtung und verfahren zu deren herstellung |
Country Status (4)
Country | Link |
---|---|
US (2) | US4246595A (de) |
CA (1) | CA1108305A (de) |
DE (1) | DE2810054A1 (de) |
GB (1) | GB1588377A (de) |
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US7688206B2 (en) | 2004-11-22 | 2010-03-30 | Alien Technology Corporation | Radio frequency identification (RFID) tag for an item having a conductive layer included or attached |
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- 1978-03-03 GB GB8586/78A patent/GB1588377A/en not_active Expired
- 1978-03-06 CA CA298,234A patent/CA1108305A/en not_active Expired
- 1978-03-08 DE DE19782810054 patent/DE2810054A1/de active Granted
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1980
- 1980-07-10 US US06/168,418 patent/US4356374A/en not_active Expired - Lifetime
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US9418328B2 (en) | 2003-03-24 | 2016-08-16 | Ruizhang Technology Limited Company | RFID tags and processes for producing RFID tags |
US7688206B2 (en) | 2004-11-22 | 2010-03-30 | Alien Technology Corporation | Radio frequency identification (RFID) tag for an item having a conductive layer included or attached |
US9070063B2 (en) | 2004-11-22 | 2015-06-30 | Ruizhang Technology Limited Company | Radio frequency identification (RFID) tag for an item having a conductive layer included or attached |
Also Published As
Publication number | Publication date |
---|---|
US4356374A (en) | 1982-10-26 |
GB1588377A (en) | 1981-04-23 |
CA1108305A (en) | 1981-09-01 |
US4246595A (en) | 1981-01-20 |
DE2810054A1 (de) | 1978-09-14 |
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