DE2964965D1 - Semiconductor chip with improved ability for testing the large scale integrated circuits - Google Patents

Semiconductor chip with improved ability for testing the large scale integrated circuits

Info

Publication number
DE2964965D1
DE2964965D1 DE7979103513T DE2964965T DE2964965D1 DE 2964965 D1 DE2964965 D1 DE 2964965D1 DE 7979103513 T DE7979103513 T DE 7979103513T DE 2964965 T DE2964965 T DE 2964965T DE 2964965 D1 DE2964965 D1 DE 2964965D1
Authority
DE
Germany
Prior art keywords
testing
semiconductor chip
integrated circuits
large scale
scale integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE7979103513T
Other languages
English (en)
Inventor
Jr Charles Randall Doty
Eugen Igor Muehldorf
Himanshu Gamanlal Shah
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE2964965D1 publication Critical patent/DE2964965D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318516—Test of programmable logic devices [PLDs]
DE7979103513T 1978-10-16 1979-09-19 Semiconductor chip with improved ability for testing the large scale integrated circuits Expired DE2964965D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/951,891 US4225957A (en) 1978-10-16 1978-10-16 Testing macros embedded in LSI chips

Publications (1)

Publication Number Publication Date
DE2964965D1 true DE2964965D1 (en) 1983-04-07

Family

ID=25492281

Family Applications (1)

Application Number Title Priority Date Filing Date
DE7979103513T Expired DE2964965D1 (en) 1978-10-16 1979-09-19 Semiconductor chip with improved ability for testing the large scale integrated circuits

Country Status (5)

Country Link
US (1) US4225957A (de)
EP (1) EP0010173B1 (de)
JP (1) JPS5832780B2 (de)
DE (1) DE2964965D1 (de)
IT (1) IT1162586B (de)

Families Citing this family (33)

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DE2842750A1 (de) * 1978-09-30 1980-04-10 Ibm Deutschland Verfahren und anordnung zur pruefung von durch monolithisch integrierten halbleiterschaltungen dargestellten sequentiellen schaltungen
DE2951946A1 (de) * 1979-12-22 1981-07-02 Ibm Deutschland Gmbh, 7000 Stuttgart Fehlererkennungs- und -korrektureinrichtung fuer eine logische anordnung
US4482953A (en) * 1980-05-30 1984-11-13 Fairchild Camera & Instrument Corporation Computer with console addressable PLA storing control microcode and microinstructions for self-test of internal registers and ALU
DE3029883A1 (de) * 1980-08-07 1982-03-11 Ibm Deutschland Gmbh, 7000 Stuttgart Schieberegister fuer pruef- und test-zwecke
US4441075A (en) * 1981-07-02 1984-04-03 International Business Machines Corporation Circuit arrangement which permits the testing of each individual chip and interchip connection in a high density packaging structure having a plurality of interconnected chips, without any physical disconnection
AU8963582A (en) * 1981-10-30 1983-05-05 Honeywell Information Systems Incorp. Design and testing electronic components
US4556840A (en) * 1981-10-30 1985-12-03 Honeywell Information Systems Inc. Method for testing electronic assemblies
US4808915A (en) * 1981-10-30 1989-02-28 Honeywell Bull, Inc. Assembly of electronic components testable by a reciprocal quiescent testing technique
US4503386A (en) * 1982-04-20 1985-03-05 International Business Machines Corporation Chip partitioning aid (CPA)-A structure for test pattern generation for large logic networks
DE3220302C2 (de) * 1982-05-28 1984-03-15 Siemens AG, 1000 Berlin und 8000 München Programmierbare Logikanordnung in ECL-Technik
US4503537A (en) * 1982-11-08 1985-03-05 International Business Machines Corporation Parallel path self-testing system
US4499579A (en) * 1983-03-10 1985-02-12 Honeywell Information Systems Inc. Programmable logic array with dynamic test capability in the unprogrammed state
US4551838A (en) * 1983-06-20 1985-11-05 At&T Bell Laboratories Self-testing digital circuits
US4575674A (en) * 1983-07-01 1986-03-11 Motorola, Inc. Macrocell array having real time diagnostics
US4542508A (en) * 1983-11-21 1985-09-17 Aerojet-General Corporation Amenable logic gate and method of testing
US4680539A (en) * 1983-12-30 1987-07-14 International Business Machines Corp. General linear shift register
US4625310A (en) * 1984-04-23 1986-11-25 Mercer M Ray Universally testable logic elements and method for structural testing of logic circuits formed of such logic elements
JPS62501519A (ja) * 1984-12-11 1987-06-18 エアロジェット・ジェネラル・コ−ポレ−ション 御しやすい論理ゲ−トとテスト方法
NL8502476A (nl) * 1985-09-11 1987-04-01 Philips Nv Werkwijze voor het testen van dragers met meerdere digitaal-werkende geintegreerde schakelingen, drager voorzien van zulke schakelingen, geintegreerde schakeling geschikt voor het aanbrengen op zo'n drager, en testinrichting voor het testen van zulke dragers.
US4680761A (en) * 1986-01-30 1987-07-14 Burkness Donald C Self diagnostic Cyclic Analysis Testing System (CATS) for LSI/VLSI
US4726023A (en) * 1986-05-14 1988-02-16 International Business Machines Corporation Determination of testability of combined logic end memory by ignoring memory
FR2605112B1 (fr) * 1986-10-10 1989-04-07 Thomson Csf Dispositif et procede de generation de vecteurs de test et procede de test pour circuit integre
US4878209A (en) * 1988-03-17 1989-10-31 International Business Machines Corporation Macro performance test
US5377198A (en) * 1991-11-27 1994-12-27 Ncr Corporation (Nka At&T Global Information Solutions Company JTAG instruction error detection
US5423050A (en) * 1991-11-27 1995-06-06 Ncr Corporation Intermodule test across system bus utilizing serial test bus
US5325368A (en) * 1991-11-27 1994-06-28 Ncr Corporation JTAG component description via nonvolatile memory
US5343478A (en) * 1991-11-27 1994-08-30 Ncr Corporation Computer system configuration via test bus
US5450414A (en) * 1993-05-17 1995-09-12 At&T Corp. Partial-scan built-in self-testing circuit having improved testability
US5732246A (en) * 1995-06-07 1998-03-24 International Business Machines Corporation Programmable array interconnect latch
US5651013A (en) * 1995-11-14 1997-07-22 International Business Machines Corporation Programmable circuits for test and operation of programmable gate arrays
US6097889A (en) * 1997-06-23 2000-08-01 Motorola, Inc. Signal processing apparatus with stages in a signal path operating as LFSR of alternable type and method for processing signals
US7315972B1 (en) * 2004-05-20 2008-01-01 Xilinx, Inc. Method and apparatus for automated generation of expected value data for circuit designs
JP2013113665A (ja) * 2011-11-28 2013-06-10 Advantest Corp 試験パターン生成装置、試験プログラム生成装置、生成方法、プログラム、および試験装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3815025A (en) * 1971-10-18 1974-06-04 Ibm Large-scale integrated circuit testing structure
US3790885A (en) * 1972-03-27 1974-02-05 Ibm Serial test patterns for mosfet testing
US3784907A (en) * 1972-10-16 1974-01-08 Ibm Method of propagation delay testing a functional logic system
US3783254A (en) * 1972-10-16 1974-01-01 Ibm Level sensitive logic system
US3761695A (en) * 1972-10-16 1973-09-25 Ibm Method of level sensitive testing a functional logic system
FR2330014A1 (fr) * 1973-05-11 1977-05-27 Ibm France Procede de test de bloc de circuits logiques integres et blocs en faisant application
US3961254A (en) * 1974-12-20 1976-06-01 International Business Machines Corporation Testing embedded arrays
US3961252A (en) * 1974-12-20 1976-06-01 International Business Machines Corporation Testing embedded arrays
US3961251A (en) * 1974-12-20 1976-06-01 International Business Machines Corporation Testing embedded arrays
US4058767A (en) * 1975-04-29 1977-11-15 International Business Machines Corporation Apparatus and process for testing AC performance of LSI components
US4051353A (en) * 1976-06-30 1977-09-27 International Business Machines Corporation Accordion shift register and its application in the implementation of level sensitive logic system
US4063080A (en) * 1976-06-30 1977-12-13 International Business Machines Corporation Method of propagation delay testing a level sensitive array logic system

Also Published As

Publication number Publication date
EP0010173B1 (de) 1983-03-02
IT1162586B (it) 1987-04-01
JPS5553453A (en) 1980-04-18
JPS5832780B2 (ja) 1983-07-15
IT7926078A0 (it) 1979-09-28
EP0010173A1 (de) 1980-04-30
US4225957A (en) 1980-09-30

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee