DE3107405A1 - MULTI-LAYER, FINISHABLE PRINTED CIRCUIT BOARD - Google Patents

Description

29/31 -J- 07 .81 EEA-2722 Patent attorney 14th ρ 13105 H.E. ELlmer 627 Idstein Pri e dens str a s s e

SPEEiRT GOEPOEATIOiT, New York, H.Y. / U. S. Δ.

Multi-layer, reworkable printed circuit board

The invention relates to a multilayer printed circuit board, which has an additional sewing layer, which simplifies the post-processing process and the density possible post-processing increases. . '

As the content and complexity of an integrated circuit increase, so does the complexity the signal layers and the number of layers required for the multilayer, printed circuit boards are required. As a result however, the increased "complexity becomes the extent limited in post-processing that can be performed using current post-processing procedures.

As the density and complexity of the integrated circuits increase, so do the propagation time and the associated Length and impedance of the signal path more critical. Therefore, the wiring in the post-processing must be to the differences of the Match impedance in a multilayer sheet and ax them come in line. ·.

At present, when there arises a problem that rewiring of a multilayer printed circuit board is necessary use two wires twisted together with one conductor grounded and the other to perform the repair is used; but one must use a heavier wire and twice the number of wire terminations, which is a large number Earth connections are available. Thus, the density of possible post-processing is limited.

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So far there are examples of how separate wires are either embedded in the circuit board or pushed through channels, to connect the components attached to it; see U.S. Patent Nos. 3,711,626 and 3,701,838. Also there there are examples of circuit boards with written wires that are an alternative to the boggy printed circuit boards form; see U.S. Patent No. 3,674 · .602 and Guide No. O5785OOOKC of the Multiwire Division in the Kollmorgen Corporation. Furthermore, ladder patterns are used, to balance the impedances of the signal layers, which are unevenly spaced from a conductive ground plane are located; see U.S. Patent No. 4-037.132!

For the multilayer printed circuit board, see FIG the invention a reference layer, provided for post-processing;., which is at ground potential or another potential; on this is a network of wires lying one on top of the other semi-permanently attached. Thus, this combination allows post-processing of the printed circuit board at any time, thereby reducing the density of possible post-processing by at least the factor 2 compared to the previous laborious post-processing procedures is enlarged.

The reference layer is therefore separate on the printed circuit board attached to which a superimposed wire network is semi-permanently attached to the reconnection of the components mounted on the printed circuit board to facilitate new connections or Eliminate defects in the recessed signal layers. The network the wiring for post-processing is selected so that that it closely approximates the impedance properties of the recessed signal layers.

Embodiments of the invention are shown in the drawing and Tirerden explained in more detail below. Show it:

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• Figure 2

Figure 5

Figure 4

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a long, tr. new partial view of a multilayer printed circuit board having a separate pinned Layer for cache processing,

a generalized cross section through a printed one Circuit board, whose exposure layer for IT post-processing as Τθίϊ the surface of the printed Circuit board is made.;

Details of a printed circuit board, once assembled, the reference layer and wiring and in which the relationship of the paths or plated through-holes is sharply defined "from distinguishes between the wiring for the finishing touches,

a cross section through a different type of Ausfiüirungsform _r in the prepared reference layer as part of the printed circuit board and the wiring for iTachbearbeitung is then .angeheftet to the printed circuit board ·,

FIG. 5 shows a cross section through the preferred embodiment with the reference layer for post-processing Encapsulated between two insulators and attached to the ■ printed circuit board with a transfer film adhesive is pinned. . . ·

In a partial view of the Jfigur Λ is a multilayer te be print circuit board to see on one side thereof, packages of a plurality of integrated circuits are attached, and through the plated through holes or paths 17 to conductors 5 passing. The printed circuit board 1 is typically made up of several individual signal layers with one or more inner layers which are connected to earth or a reference potential, which are isolated from one another and which are

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known processes of circuit board printing technology can be produced. If so, also the pattern of each individual inner signal and Be2ugsscMent and their order in the stack of the special electrical SehALTauau for the circuit board 1 dependent are, the arrangement of the packages of their integrated circuits - in the preferred embodiment and its IL instruction is based on the uniform position and an equal distance between them to create a matrix grid above it then a reference layer 7 is attached for post-processing will,

! "After the production of the printed circuit board 1, the Reference layer 7 with an IC adhesive on the circuit board 1 attached, which is not shown for the sake of clarity. The cover layer 7 is now sent to jeäera for post-processing individual projection 9 connected to the inner layers, since all plated through openings or paths 17 to the Protrusions 9 in electrical communication with inner reference layers stand. Thus, the reporting layer 7 is available for post-processing with respect to the internal reference layers of the printed support plate 1 at a common reference potential; however, she could with a corresponding. Can also be used in another reference "ii £ ;;; ~ connected to potential.

After the reference layer 7 has been attached, a dielectric insulator 11 is placed on top of it, the shape of which corresponds to the nostril of the reference layer 7 in order to achieve an appropriate dielectric distance between the individual wires used for finishing and the reference layer 7. Then ^{, in} addition to the insulator 11, an adhesive 15 is provided which is generally used to adhere the post-processing wires to the insulator and the insulator to the cover sheet 7. These wires 13 are then attached to the adhesive in a predetermined manner Network applied, which is chosen so that the post-processability of the printed

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Circuit board 1 is as favorable as possible for various tasks that one encounters in the final inspection, and which are not otherwise anticipated. Besides, that should Adhesive 15 be such that an addition of further watchkeeping wires 13 to the network of the field is possible. Therefore, the desirable adhesive adhesives are thermoplastics that are up to their activation by heat, e.g. with ultrasonic energy, ultraviolet radiation, hot air, one of an electrical resistance heated metal pin or other heat source are fairly stable. Also activated by a solvent Adhesives are useful.

The one used in the wiring industry, the post-processing Serving wire 13 is a 34 AWG magnet wire, which in its combination with reference layer 7 of about 0.254- mm (0.01 inches) Thickness and with the insulator 11 being 0.0381 mm (0.0015 inch) thick, it produces a characteristic impedance of 50 ohms. Although this impedance of 50 ohms between a layer carrying the signals and the inner reference layer of the multilayer printed circuit Circuit board 1 is typical, it should be noted that this impedance varies depending on the number of the Signals leading layers within the circuit board 1 and from the distance between these layers in which the faults rewiring and change of the inner reference layer. Such Cases of non-uniform impedance characteristics can be taken into account according to the invention in that additional Wires 13 of varying thickness and density and / or with varying insulator thickness on the wiring network be attached, the specifically used Wire depends on the distance between the affected wiring layers.

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In FIG. 2 is a detailed cross section through that of the Post-processing reference layer 7 reproduced in the form, in which they act as a rope on the surface of the multilayered, 'Printed circuit board 1 is made. On this reference layer 7 the dielectric insulator 11 and the thermoplastic lifting means 15 are laid, with the wires 13 of the network are embedded in the adhesive in contact with the dielectric insulator 11. A typical post-production one Connection point 19 only requires a casing and a Soldering the one wire 13 to a selected conductor 5 of a circuit component. As noted, needs post-processing the insulator not to be pulled off the wire 13, since the insulator melts away during the soldering process.

In the embodiment of FIG. 3, several through openings or tracks 17 are arranged below the reference layer 7 for post-processing and are used to interconnect the individual layers of the printed circuit board 1 and the type of surface-mounted components. In this situation it is always necessary that the adhesive 3, there? the reference layer 7 binds to the circuit board 1, an insulating effect or an additional insulator between the post-processing serving network and the individual webs xirird set, u ^"1. a short circuit in the Figure 5 to prevent.

In a, cross section through a further embodiment of the Figure 4- is in the multilayer printed circuit board -'i the reference layer 7 used for post-processing as an additional Layer inserted during manufacture. After manufacture the circuit board 1 and the fastening of the wires 13 by means of the thermoplastic lifting means 15 need in this arrangement only the individual wires 13 to be guided. Because of the complexity and high density of the typical printed ones Circuit board 1, this embodiment suffers from the fact that it is difficult to accommodate the tracks 17 of FIG.

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FIG. 5 shows a further cross section through a preferred embodiment of the invention, which in combinations of main and sub-circuit boards is used in the main-frame calculating machines. the The layer used for post-processing corresponds approximately to that of FIGS. 2 and 3. The reference layer 7 for post-processing, which is now encapsulated between the insulators 11 of a vitreous epoxy resin, however, is covered with a transfer film adhesive 21 pinned. The thickness of the insulators 11 is again due to the desired characteristic impedance selected between the wires 13 and the reference layer 7 of 50 ohms. However, this reference layer 7 is used for post-processing in this preferred embodiment an improved grounding of the internal reference layers of the circuit board 1. At In some embodiments, the reference layer 7 can be provided for post-processing as a replacement for one or possibly more reference layers in order to reduce the number of To be able to reduce layers in the printed formwork panel 1 and still adapt to the increased density and to meet post-processing requirements.

Previously, a post-processing layer for a multilayer printed circuit board was described which consists of a reference layer and a wire network is composed of numerous conductors, which are designed so that a match to the impedance characteristic between the inner layers of the printed circuit board takes place, according to their Manufacturing the ladder can optionally be limited.

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Claims (3)

1., Multi-layer printed circuit board with z \ re ± or several conductive flat layers, of which at least one reference layer is under / öiner electrical bias, characterized in that a post-processing layer (15) is semi-permanent on the shuttering panel. (1) is attached and contains characteristic impedances with respect to wires (13) having the reference layer (7). which are insulated from the circuit board (1) as well as from one another, and with the aid of which connection points to the other layers of the circuit board (1) can be produced whose characteristic impedances are equivalent to those of the wires (13). 2 * circuit board according to claim 1, characterized g e k eη η ζ e'i c h η e t that for semi-permanent pinning the machining layer (15) is heated by heat activated thermoplastic adhesive is used. 3. Circuit board according to claim 1, characterized characterized in that the post-processing is used Layer (15) is adhered to a reference layer (7) applied to the surface of the circuit board (1). 4-. Circuit spX at te according to claim 3? characterized in that the post-processing layer (15) contains a flat insulator (11) in at least partial contact with the cover layer (7). 5 · circuit board according to claim 4, characterized characterized in that between the reference layer (7) and the surface of the circuit board (1) is another flat insulator (11) and a transmission film adhesive (21) introduced are. 130064 / ~ G6Ö "5