DE3174041D1 - Led module for a flat panel display unit - Google Patents
Led module for a flat panel display unitInfo
- Publication number
- DE3174041D1 DE3174041D1 DE8181104364T DE3174041T DE3174041D1 DE 3174041 D1 DE3174041 D1 DE 3174041D1 DE 8181104364 T DE8181104364 T DE 8181104364T DE 3174041 T DE3174041 T DE 3174041T DE 3174041 D1 DE3174041 D1 DE 3174041D1
- Authority
- DE
- Germany
- Prior art keywords
- display unit
- flat panel
- panel display
- led module
- led
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/302—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements characterised by the form or geometrical disposition of the individual elements
- G09F9/3026—Video wall, i.e. stackable semiconductor matrix display modules
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
- H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7893880A JPS575083A (en) | 1980-06-13 | 1980-06-13 | Display unit |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3174041D1 true DE3174041D1 (en) | 1986-04-17 |
Family
ID=13675815
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8181104364T Expired DE3174041D1 (en) | 1980-06-13 | 1981-06-05 | Led module for a flat panel display unit |
Country Status (5)
Country | Link |
---|---|
US (1) | US4445132A (de) |
EP (1) | EP0042122B1 (de) |
JP (1) | JPS575083A (de) |
KR (1) | KR840002362B1 (de) |
DE (1) | DE3174041D1 (de) |
Families Citing this family (107)
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US4733127A (en) * | 1984-06-12 | 1988-03-22 | Sanyo Electric Co., Ltd. | Unit of arrayed light emitting diodes |
DE3587772T2 (de) * | 1984-11-12 | 1994-07-07 | Takiron Co | Punktmatrix-Leuchtanzeige. |
JPS61198690A (ja) * | 1985-02-27 | 1986-09-03 | Oshino Denki Seisakusho:Kk | 発光ダイオ−ド表示素子 |
CA1233282A (en) * | 1985-05-28 | 1988-02-23 | Brent W. Brown | Solid state color display system and light emitting diode pixels therefor |
EP0206176B1 (de) * | 1985-06-28 | 1992-01-02 | Takiron Co. Ltd. | Matrix aus optischen Leitern für eine Punktmatrix-Leuchtanzeige |
JPS62124780A (ja) * | 1985-11-26 | 1987-06-06 | Hitachi Ltd | 光半導体モジユ−ル |
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CA2824756C (en) | 2011-01-14 | 2014-12-23 | Federal Law Enforcement Development Services, Inc. | Method of providing lumens and tracking of lumen consumption |
US8314566B2 (en) | 2011-02-22 | 2012-11-20 | Quarkstar Llc | Solid state lamp using light emitting strips |
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JP5935557B2 (ja) * | 2012-07-09 | 2016-06-15 | ソニー株式会社 | 実装基板および光学装置 |
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TWI505002B (zh) * | 2013-02-05 | 2015-10-21 | Lextar Electronics Corp | 發光二極體顯示面板 |
US9265112B2 (en) | 2013-03-13 | 2016-02-16 | Federal Law Enforcement Development Services, Inc. | LED light control and management system |
TWI626395B (zh) * | 2013-06-11 | 2018-06-11 | 晶元光電股份有限公司 | 發光裝置 |
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DE102016124525B4 (de) * | 2016-12-15 | 2023-08-10 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Modul mit Leuchtdiodenchips und Verfahren zum Herstellen eines Moduls mit einer Mehrzahl von Leuchtdiodenchips |
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Publication number | Priority date | Publication date | Assignee | Title |
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US3548254A (en) * | 1967-04-12 | 1970-12-15 | Aerospace Prod Res | Display apparatus |
NL7018169A (de) * | 1970-03-09 | 1971-09-13 | ||
GB1431889A (en) * | 1972-09-14 | 1976-04-14 | Secr Defence | Fabrication of electrooptic display panels |
US3783353A (en) * | 1972-10-27 | 1974-01-01 | Rca Corp | Electroluminescent semiconductor device capable of emitting light of three different wavelengths |
US4011575A (en) * | 1974-07-26 | 1977-03-08 | Litton Systems, Inc. | Light emitting diode array having a plurality of conductive paths for each light emitting diode |
JPS5138887A (en) * | 1974-09-28 | 1976-03-31 | Tokyo Shibaura Electric Co | Rinofukumu 335 zokuhandotaihatsukososhi no seizohoho |
US3942065A (en) * | 1974-11-11 | 1976-03-02 | Motorola, Inc. | Monolithic, milticolor, light emitting diode display device |
CA1082378A (en) * | 1976-08-05 | 1980-07-22 | Thomas A. Brown | Abuttable light-emitting device modules for graphic display assemblies |
JPS5567179A (en) * | 1978-11-14 | 1980-05-21 | Matsushita Electric Ind Co Ltd | Luminous display device |
JPS604991B2 (ja) * | 1979-05-11 | 1985-02-07 | 株式会社東芝 | ディスプレイ装置 |
CA1175884A (en) * | 1980-06-25 | 1984-10-09 | Hugh St. L. Dannatt | Light emitting diode assembly |
-
1980
- 1980-06-13 JP JP7893880A patent/JPS575083A/ja active Granted
-
1981
- 1981-01-17 KR KR1019810000118A patent/KR840002362B1/ko active
- 1981-06-03 US US06/270,030 patent/US4445132A/en not_active Expired - Fee Related
- 1981-06-05 EP EP81104364A patent/EP0042122B1/de not_active Expired
- 1981-06-05 DE DE8181104364T patent/DE3174041D1/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
KR830005618A (ko) | 1983-08-20 |
EP0042122B1 (de) | 1986-03-12 |
EP0042122A2 (de) | 1981-12-23 |
EP0042122A3 (en) | 1982-05-05 |
US4445132A (en) | 1984-04-24 |
KR840002362B1 (ko) | 1984-12-21 |
JPS575083A (en) | 1982-01-11 |
JPS612949B2 (de) | 1986-01-29 |
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